OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [doc/] [html/] [ref/] [brutus.html] - Blame information for rev 588

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 28 unneback
<!-- Copyright (C) 2003 Red Hat, Inc.                                -->
2
<!-- This material may be distributed only subject to the terms      -->
3
<!-- and conditions set forth in the Open Publication License, v1.0  -->
4
<!-- or later (the latest version is presently available at          -->
5
<!-- http://www.opencontent.org/openpub/).                           -->
6
<!-- Distribution of the work or derivative of the work in any       -->
7
<!-- standard (paper) book form is prohibited unless prior           -->
8
<!-- permission is obtained from the copyright holder.               -->
9
<HTML
10
><HEAD
11
><TITLE
12
>ARM/StrongARM(SA1100) Intel Brutus</TITLE
13
><meta name="MSSmartTagsPreventParsing" content="TRUE">
14
<META
15
NAME="GENERATOR"
16
CONTENT="Modular DocBook HTML Stylesheet Version 1.76b+
17
"><LINK
18
REL="HOME"
19
TITLE="eCos Reference Manual"
20
HREF="ecos-ref.html"><LINK
21
REL="UP"
22
TITLE="Installation and Testing"
23
HREF="installation-and-testing.html"><LINK
24
REL="PREVIOUS"
25
TITLE="ARM/StrongARM(SA110) Intel EBSA 285"
26
HREF="ebsa285.html"><LINK
27
REL="NEXT"
28
TITLE="ARM/StrongARM(SA1100) Intel SA1100 Multimedia Board "
29
HREF="sa1100mm.html"></HEAD
30
><BODY
31
CLASS="SECT1"
32
BGCOLOR="#FFFFFF"
33
TEXT="#000000"
34
LINK="#0000FF"
35
VLINK="#840084"
36
ALINK="#0000FF"
37
><DIV
38
CLASS="NAVHEADER"
39
><TABLE
40
SUMMARY="Header navigation table"
41
WIDTH="100%"
42
BORDER="0"
43
CELLPADDING="0"
44
CELLSPACING="0"
45
><TR
46
><TH
47
COLSPAN="3"
48
ALIGN="center"
49
>eCos Reference Manual</TH
50
></TR
51
><TR
52
><TD
53
WIDTH="10%"
54
ALIGN="left"
55
VALIGN="bottom"
56
><A
57
HREF="ebsa285.html"
58
ACCESSKEY="P"
59
>Prev</A
60
></TD
61
><TD
62
WIDTH="80%"
63
ALIGN="center"
64
VALIGN="bottom"
65
>Chapter 5. Installation and Testing</TD
66
><TD
67
WIDTH="10%"
68
ALIGN="right"
69
VALIGN="bottom"
70
><A
71
HREF="sa1100mm.html"
72
ACCESSKEY="N"
73
>Next</A
74
></TD
75
></TR
76
></TABLE
77
><HR
78
ALIGN="LEFT"
79
WIDTH="100%"></DIV
80
><DIV
81
CLASS="SECT1"
82
><H1
83
CLASS="SECT1"
84
><A
85
NAME="BRUTUS">ARM/StrongARM(SA1100) Intel Brutus</H1
86
><DIV
87
CLASS="SECT2"
88
><H2
89
CLASS="SECT2"
90
><A
91
NAME="AEN5642">Overview</H2
92
><P
93
>RedBoot
94
supports both board serial ports on the Brutus board. The default serial port
95
settings are 38400,8,N,1. flash management is not currently supported. </P
96
><P
97
>The following RedBoot configurations are supported:
98
 
99
      <DIV
100
CLASS="INFORMALTABLE"
101
><A
102
NAME="AEN5652"><P
103
></P
104
><TABLE
105
BORDER="1"
106
CLASS="CALSTABLE"
107
><THEAD
108
><TR
109
><TH
110
ALIGN="LEFT"
111
VALIGN="TOP"
112
>Configuration</TH
113
><TH
114
ALIGN="LEFT"
115
VALIGN="TOP"
116
>Mode</TH
117
><TH
118
ALIGN="LEFT"
119
VALIGN="TOP"
120
>Description</TH
121
><TH
122
ALIGN="LEFT"
123
VALIGN="TOP"
124
>File</TH
125
></TR
126
></THEAD
127
><TBODY
128
><TR
129
><TD
130
ALIGN="LEFT"
131
VALIGN="TOP"
132
>ROM</TD
133
><TD
134
ALIGN="LEFT"
135
VALIGN="TOP"
136
>[ROM]</TD
137
><TD
138
ALIGN="LEFT"
139
VALIGN="TOP"
140
>RedBoot running from the board's flash boot
141
              sector.</TD
142
><TD
143
ALIGN="LEFT"
144
VALIGN="TOP"
145
>redboot_ROM.ecm</TD
146
></TR
147
><TR
148
><TD
149
ALIGN="LEFT"
150
VALIGN="TOP"
151
>RAM</TD
152
><TD
153
ALIGN="LEFT"
154
VALIGN="TOP"
155
>[RAM]</TD
156
><TD
157
ALIGN="LEFT"
158
VALIGN="TOP"
159
>RedBoot running from RAM with RedBoot in the
160
              flash boot sector.</TD
161
><TD
162
ALIGN="LEFT"
163
VALIGN="TOP"
164
>redboot_RAM.ecm</TD
165
></TR
166
></TBODY
167
></TABLE
168
><P
169
></P
170
></DIV
171
></P
172
></DIV
173
><DIV
174
CLASS="SECT2"
175
><H2
176
CLASS="SECT2"
177
><A
178
NAME="AEN5671">Initial Installation Method</H2
179
><P
180
>Device programmer is used to program socketed flash parts.</P
181
></DIV
182
><DIV
183
CLASS="SECT2"
184
><H2
185
CLASS="SECT2"
186
><A
187
NAME="AEN5674">Special RedBoot Commands</H2
188
><P
189
>None.</P
190
></DIV
191
><DIV
192
CLASS="SECT2"
193
><H2
194
CLASS="SECT2"
195
><A
196
NAME="AEN5677">Memory Maps</H2
197
><P
198
>The first level page table is located at physical address 0xc0004000.
199
No second level tables are used.
200
 
201
<DIV
202
CLASS="NOTE"
203
><BLOCKQUOTE
204
CLASS="NOTE"
205
><P
206
><B
207
>NOTE: </B
208
>The virtual memory maps in this section use a C and B column to indicate
209
whether or not the region is cached (C) or buffered (B).</P
210
></BLOCKQUOTE
211
></DIV
212
><TABLE
213
BORDER="5"
214
BGCOLOR="#E0E0F0"
215
WIDTH="70%"
216
><TR
217
><TD
218
><PRE
219
CLASS="PROGRAMLISTING"
220
>Physical Address Range     Description
221
-----------------------    ----------------------------------
222
0x00000000 - 0x000fffff    Boot ROM
223
0x08000000 - 0x083fffff    Application flash
224
0x10000000 - 0x100fffff    SRAM
225
0x18000000 - 0x180fffff    Chip Select 3
226
0x20000000 - 0x3fffffff    PCMCIA
227
0x80000000 - 0xbfffffff    SA-1100 Internal Registers
228
0xc0000000 - 0xc7ffffff    DRAM Bank 0
229
0xc8000000 - 0xcfffffff    DRAM Bank 1
230
0xd0000000 - 0xd7ffffff    DRAM Bank 2
231
0xd8000000 - 0xdfffffff    DRAM Bank 3
232
0xe0000000 - 0xe7ffffff    Cache Clean
233
 
234
 
235
Virtual Address Range    C B  Description
236
-----------------------  - -  ----------------------------------
237
0x00000000 - 0x003fffff  Y Y  DRAM Bank 0
238
0x00400000 - 0x007fffff  Y Y  DRAM Bank 1
239
0x00800000 - 0x00bfffff  Y Y  DRAM Bank 2
240
0x00c00000 - 0x00ffffff  Y Y  DRAM Bank 3
241
0x08000000 - 0x083fffff  Y Y  Application flash
242
0x10000000 - 0x100fffff  Y N  SRAM
243
0x20000000 - 0x3fffffff  N N  PCMCIA
244
0x40000000 - 0x400fffff  Y Y  Boot ROM
245
0x80000000 - 0xbfffffff  N N  SA-1100 Internal Registers
246
0xe0000000 - 0xe7ffffff  Y Y  Cache Clean</PRE
247
></TD
248
></TR
249
></TABLE
250
></P
251
></DIV
252
><DIV
253
CLASS="SECT2"
254
><H2
255
CLASS="SECT2"
256
><A
257
NAME="AEN5684">Platform Resource Usage</H2
258
><P
259
>The SA11x0 OS timer is used as a polled timer to provide timeout
260
support for XModem file transfers.</P
261
></DIV
262
><DIV
263
CLASS="SECT2"
264
><H2
265
CLASS="SECT2"
266
><A
267
NAME="AEN5687">Rebuilding RedBoot</H2
268
><P
269
>These shell variables provide the platform-specific information
270
needed for building RedBoot according to the procedure described in
271
<A
272
HREF="rebuilding-redboot.html"
273
>Chapter 3</A
274
>:
275
<TABLE
276
BORDER="5"
277
BGCOLOR="#E0E0F0"
278
WIDTH="70%"
279
><TR
280
><TD
281
><PRE
282
CLASS="PROGRAMLISTING"
283
>export TARGET=brutus
284
export ARCH_DIR=arm
285
export PLATFORM_DIR=sa11x0/brutus</PRE
286
></TD
287
></TR
288
></TABLE
289
></P
290
><P
291
>The names of configuration files are listed above with the
292
description of the associated modes.</P
293
></DIV
294
></DIV
295
><DIV
296
CLASS="NAVFOOTER"
297
><HR
298
ALIGN="LEFT"
299
WIDTH="100%"><TABLE
300
SUMMARY="Footer navigation table"
301
WIDTH="100%"
302
BORDER="0"
303
CELLPADDING="0"
304
CELLSPACING="0"
305
><TR
306
><TD
307
WIDTH="33%"
308
ALIGN="left"
309
VALIGN="top"
310
><A
311
HREF="ebsa285.html"
312
ACCESSKEY="P"
313
>Prev</A
314
></TD
315
><TD
316
WIDTH="34%"
317
ALIGN="center"
318
VALIGN="top"
319
><A
320
HREF="ecos-ref.html"
321
ACCESSKEY="H"
322
>Home</A
323
></TD
324
><TD
325
WIDTH="33%"
326
ALIGN="right"
327
VALIGN="top"
328
><A
329
HREF="sa1100mm.html"
330
ACCESSKEY="N"
331
>Next</A
332
></TD
333
></TR
334
><TR
335
><TD
336
WIDTH="33%"
337
ALIGN="left"
338
VALIGN="top"
339
>ARM/StrongARM(SA110) Intel EBSA 285</TD
340
><TD
341
WIDTH="34%"
342
ALIGN="center"
343
VALIGN="top"
344
><A
345
HREF="installation-and-testing.html"
346
ACCESSKEY="U"
347
>Up</A
348
></TD
349
><TD
350
WIDTH="33%"
351
ALIGN="right"
352
VALIGN="top"
353
>ARM/StrongARM(SA1100) Intel SA1100 Multimedia Board</TD
354
></TR
355
></TABLE
356
></DIV
357
></BODY
358
></HTML
359
>

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.