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<!-- Copyright (C) 2003 Red Hat, Inc.                                -->
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>Exception Handling</TITLE
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TITLE="The eCos Hardware Abstraction Layer (HAL)"
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>eCos Reference Manual</TH
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><A
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><DIV
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CLASS="CHAPTER"
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><H1
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><A
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NAME="HAL-EXCEPTION-HANDLING">Chapter 10. Exception Handling</H1
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><DIV
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CLASS="TOC"
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><DL
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><DT
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><B
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>Table of Contents</B
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></DT
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><DT
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><A
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HREF="hal-exception-handling.html#HAL-STARTUP"
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>HAL Startup</A
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></DT
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><DT
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><A
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HREF="hal-vectors-and-vsrs.html"
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>Vectors and VSRs</A
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></DT
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><DT
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><A
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HREF="hal-default-synchronous-exception-handling.html"
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>Default Synchronous Exception Handling</A
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></DT
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><DT
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><A
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HREF="hal-default-interrupt-handling.html"
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>Default Interrupt Handling</A
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></DT
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></DL
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></DIV
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><P
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>Most of the HAL consists of simple macros or functions that are
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called via the interfaces described in the previous section. These
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just perform whatever operation is required by accessing the hardware
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and then return. The exception to this is the handling of exceptions:
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either synchronous hardware traps or asynchronous device
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interrupts. Here control is passed first to the HAL, which then passed
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it on to eCos or the application. After eCos has finished with it,
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control is then passed back to the HAL for it to tidy up the CPU state
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and resume processing from the point at which the exception occurred.</P
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><P
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>The HAL exceptions handling code is usually found in the file
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<TT
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CLASS="FILENAME"
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>vectors.S</TT
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> in the architecture HAL.  Since the
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reset entry point is usually implemented as one of these it also deals
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with system startup.</P
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><P
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>The exact implementation of this code is under the control of the HAL
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implementer. So long as it interacts correctly with the interfaces
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defined previously it may take any form.  However, all current
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implementation follow the same pattern, and there should be a very
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good reason to break with this. The rest of this section describes
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these operate.</P
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><P
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>Exception handling normally deals with the following broad areas of
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functionality:</P
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><P
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></P
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><UL
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><LI
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><P
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>Startup and initialization.</P
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></LI
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><LI
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><P
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>Hardware exception delivery.</P
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></LI
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><LI
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><P
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>Default handling of synchronous exceptions.</P
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></LI
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><LI
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><P
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>Default handling of asynchronous interrupts.</P
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></LI
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></UL
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><DIV
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CLASS="SECTION"
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><H1
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CLASS="SECTION"
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><A
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NAME="HAL-STARTUP">HAL Startup</H1
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><P
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>Execution normally begins at the reset vector with
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the machine in a minimal startup state. From here the HAL needs to get
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the machine running, set up the execution environment for the
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application, and finally invoke its entry point.</P
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><P
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>The following is a list of the jobs that need to be done in
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approximately the order in which they should be accomplished. Many
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of these will not be needed in some configurations.</P
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><P
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></P
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><UL
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><LI
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><P
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>  Initialize the hardware. This may involve initializing several
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  subsystems in both the architecture, variant and platform
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  HALs. These include:
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  </P
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><P
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></P
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><UL
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><LI
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><P
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>       Initialize various CPU status registers. Most importantly, the CPU
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        interrupt mask should be set to disable interrupts.
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        </P
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></LI
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><LI
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><P
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>       Initialize the MMU, if it is used. On many platforms it is
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        only possible to control the cacheability of address ranges
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        via the MMU. Also, it may be necessary to remap RAM and device
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        registers to locations other than their defaults. However, for
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        simplicity, the mapping should be kept as close to one-to-one
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        physical-to-virtual as possible.
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        </P
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></LI
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><LI
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><P
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>       Set up the memory controller to access RAM, ROM and I/O devices
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        correctly. Until this is done it may not be possible to access
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        RAM. If this is a ROMRAM startup then the program code can
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        now be copied to its RAM address and control transferred to it.
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        </P
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></LI
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><LI
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><P
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>       Set up any bus bridges and support chips. Often access to
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        device registers needs to go through various bus bridges and
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        other intermediary devices. In many systems these are combined
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        with the memory controller, so it makes sense to set these up
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        together. This is particularly important if early diagnostic
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        output needs to go through one of these devices.
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        </P
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></LI
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><LI
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><P
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>       Set up diagnostic mechanisms. If the platform includes an LED or
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        LCD output device, it often makes sense to output progress
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        indications on this during startup. This helps with diagnosing
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        hardware and software errors.
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        </P
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></LI
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><LI
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><P
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>       Initialize floating point and other extensions such as SIMD
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        and multimedia engines. It is usually necessary to enable
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        these and maybe initialize control and exception registers for
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        these extensions.
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        </P
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></LI
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><LI
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><P
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>       Initialize interrupt controller. At the very least, it should
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        be configured to mask all interrupts. It may also be necessary
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        to set up the mapping from the interrupt controller's vector
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        number space to the CPU's exception number space. Similar
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        mappings may need to be set up between primary and secondary
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        interrupt controllers.
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        </P
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></LI
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><LI
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><P
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>       Disable and initialize the caches. The caches should not
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        normally be enabled at this point, but it may be necessary to
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        clear or initialize them so that they can be enabled
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        later. Some architectures require that the caches be
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        explicitly reinitialized after a power-on reset.
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        </P
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></LI
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><LI
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><P
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>       Initialize the timer, clock etc. While the timer used for RTC
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        interrupts will be initialized later, it may be necessary to
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        set up the clocks that drive it here.
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        </P
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></LI
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></UL
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><P
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>    The exact order in which these initializations is done is
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    architecture or variant specific. It is also often not necessary
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    to do anything at all for some of these options. These fragments
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    of code should concentrate on getting the target up and running so
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    that C function calls can be made and code can be run. More
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    complex initializations that cannot be done in assembly code may
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    be postponed until calls to
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    <TT
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CLASS="FUNCTION"
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>hal_variant_init()</TT
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> or
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    <TT
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CLASS="FUNCTION"
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>hal_platform_init()</TT
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> are made.
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    </P
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><P
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>    Not all of these initializations need to be done for all startup
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    types. In particular, RAM startups can reasonably assume that the
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    ROM monitor or loader has already done most of this work.
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    </P
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></LI
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><LI
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><P
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>    Set up the stack pointer, this allows subsequent initialization
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    code to make proper procedure calls. Usually the interrupt stack
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    is used for this purpose since it is available, large enough, and
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    will be reused for other purposes later.
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    </P
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></LI
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><LI
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><P
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>    Initialize any global pointer register needed for access to
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    globally defined variables. This allows subsequent initialization
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    code to access global variables.
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    </P
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></LI
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><LI
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><P
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>    If the system is starting from ROM, copy the ROM template of the
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    <TT
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CLASS="FILENAME"
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>.data</TT
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> section out to its correct position in
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    RAM. (<A
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HREF="hal-linker-scripts.html"
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>the Section called <I
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>Linker Scripts</I
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> in Chapter 9</A
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>).
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    </P
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></LI
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><LI
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><P
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>    Zero the <TT
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CLASS="FILENAME"
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>.bss</TT
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> section.
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    </P
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></LI
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><LI
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><P
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>    Create a suitable C call stack frame. This may involve making
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    stack space for call frames, and arguments, and initializing the
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    back pointers to halt a GDB backtrace operation.
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    </P
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></LI
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><LI
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><P
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>    Call <TT
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CLASS="FUNCTION"
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>hal_variant_init()</TT
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> and
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    <TT
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CLASS="FUNCTION"
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>hal_platform_init()</TT
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>. These will perform any
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    additional initialization needed by the variant and platform. This
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    typically includes further initialization of the interrupt
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    controller, PCI bus bridges, basic IO devices and enabling the
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    caches.
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    </P
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></LI
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><LI
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><P
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>    Call <TT
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CLASS="FUNCTION"
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>cyg_hal_invoke_constructors()</TT
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> to run any
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    static constructors.
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    </P
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></LI
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><LI
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><P
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>    Call <TT
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CLASS="FUNCTION"
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>cyg_start()</TT
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>. If
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    <TT
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CLASS="FUNCTION"
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>cyg_start()</TT
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> returns, drop into an infinite
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    loop.
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    </P
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></LI
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