OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [doc/] [html/] [ref/] [installation-and-testing.html] - Blame information for rev 842

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 28 unneback
<!-- Copyright (C) 2003 Red Hat, Inc.                                -->
2
<!-- This material may be distributed only subject to the terms      -->
3
<!-- and conditions set forth in the Open Publication License, v1.0  -->
4
<!-- or later (the latest version is presently available at          -->
5
<!-- http://www.opencontent.org/openpub/).                           -->
6
<!-- Distribution of the work or derivative of the work in any       -->
7
<!-- standard (paper) book form is prohibited unless prior           -->
8
<!-- permission is obtained from the copyright holder.               -->
9
<HTML
10
><HEAD
11
><TITLE
12
>Installation and Testing</TITLE
13
><meta name="MSSmartTagsPreventParsing" content="TRUE">
14
<META
15
NAME="GENERATOR"
16
CONTENT="Modular DocBook HTML Stylesheet Version 1.76b+
17
"><LINK
18
REL="HOME"
19
TITLE="eCos Reference Manual"
20
HREF="ecos-ref.html"><LINK
21
REL="UP"
22
TITLE="RedBoot&#8482; User's Guide"
23
HREF="redboot.html"><LINK
24
REL="PREVIOUS"
25
TITLE="Updating RedBoot"
26
HREF="updating-redboot.html"><LINK
27
REL="NEXT"
28
TITLE="ARM/ARM7 ARM Evaluator7T"
29
HREF="e7t.html"></HEAD
30
><BODY
31
CLASS="CHAPTER"
32
BGCOLOR="#FFFFFF"
33
TEXT="#000000"
34
LINK="#0000FF"
35
VLINK="#840084"
36
ALINK="#0000FF"
37
><DIV
38
CLASS="NAVHEADER"
39
><TABLE
40
SUMMARY="Header navigation table"
41
WIDTH="100%"
42
BORDER="0"
43
CELLPADDING="0"
44
CELLSPACING="0"
45
><TR
46
><TH
47
COLSPAN="3"
48
ALIGN="center"
49
>eCos Reference Manual</TH
50
></TR
51
><TR
52
><TD
53
WIDTH="10%"
54
ALIGN="left"
55
VALIGN="bottom"
56
><A
57
HREF="updating-redboot.html"
58
ACCESSKEY="P"
59
>Prev</A
60
></TD
61
><TD
62
WIDTH="80%"
63
ALIGN="center"
64
VALIGN="bottom"
65
></TD
66
><TD
67
WIDTH="10%"
68
ALIGN="right"
69
VALIGN="bottom"
70
><A
71
HREF="e7t.html"
72
ACCESSKEY="N"
73
>Next</A
74
></TD
75
></TR
76
></TABLE
77
><HR
78
ALIGN="LEFT"
79
WIDTH="100%"></DIV
80
><DIV
81
CLASS="CHAPTER"
82
><H1
83
><A
84
NAME="INSTALLATION-AND-TESTING">Chapter 5. Installation and Testing</H1
85
><DIV
86
CLASS="TOC"
87
><DL
88
><DT
89
><B
90
>Table of Contents</B
91
></DT
92
><DT
93
><A
94
HREF="installation-and-testing.html#ASB2305"
95
>AM3x/MN103E010 Matsushita MN103E010 (AM33/2.0) ASB2305 Board</A
96
></DT
97
><DT
98
><A
99
HREF="e7t.html"
100
>ARM/ARM7 ARM Evaluator7T</A
101
></DT
102
><DT
103
><A
104
HREF="integrator.html"
105
>ARM/ARM7+ARM9 ARM Integrator</A
106
></DT
107
><DT
108
><A
109
HREF="pid.html"
110
>ARM/ARM7+ARM9 ARM PID Board and EPI Dev7+Dev9</A
111
></DT
112
><DT
113
><A
114
HREF="at91.html"
115
>ARM/ARM7 Atmel AT91 Evaluation Board (EB40)</A
116
></DT
117
><DT
118
><A
119
HREF="edb7xxx.html"
120
>ARM/ARM7 Cirrus Logic EP7xxx (EDB7211, EDB7212, EDB7312)</A
121
></DT
122
><DT
123
><A
124
HREF="aaed2000.html"
125
>ARM/ARM9 Agilent AAED2000</A
126
></DT
127
><DT
128
><A
129
HREF="excaliburarm9.html"
130
>ARM/ARM9 Altera Excalibur</A
131
></DT
132
><DT
133
><A
134
HREF="ebsa285.html"
135
>ARM/StrongARM(SA110) Intel EBSA 285</A
136
></DT
137
><DT
138
><A
139
HREF="brutus.html"
140
>ARM/StrongARM(SA1100) Intel Brutus</A
141
></DT
142
><DT
143
><A
144
HREF="sa1100mm.html"
145
>ARM/StrongARM(SA1100) Intel SA1100 Multimedia Board</A
146
></DT
147
><DT
148
><A
149
HREF="assabet.html"
150
>ARM/StrongARM(SA1110) Intel SA1110 (Assabet)</A
151
></DT
152
><DT
153
><A
154
HREF="nano.html"
155
>ARM/StrongARM(SA11X0) Bright Star Engineering commEngine and nanoEngine</A
156
></DT
157
><DT
158
><A
159
HREF="ipaq.html"
160
>ARM/StrongARM(SA11X0) Compaq iPAQ PocketPC</A
161
></DT
162
><DT
163
><A
164
HREF="cerfcube.html"
165
>ARM/StrongARM(SA11X0) Intrinsyc CerfCube</A
166
></DT
167
><DT
168
><A
169
HREF="iq80310.html"
170
>ARM/Xscale Cyclone IQ80310</A
171
></DT
172
><DT
173
><A
174
HREF="iq80321.html"
175
>ARM/Xscale Intel IQ80321</A
176
></DT
177
><DT
178
><A
179
HREF="calmrisc16.html"
180
>CalmRISC/CalmRISC16 Samsung CalmRISC16 Core Evaluation Board</A
181
></DT
182
><DT
183
><A
184
HREF="calmrisc32.html"
185
>CalmRISC/CalmRISC32 Samsung CalmRISC32 Core Evaluation Board</A
186
></DT
187
><DT
188
><A
189
HREF="frv400.html"
190
>FRV/FRV400 Fujitsu FR-V 400 (MB-93091)</A
191
></DT
192
><DT
193
><A
194
HREF="x86pc.html"
195
>IA32/x86 x86-Based PC</A
196
></DT
197
><DT
198
><A
199
HREF="atlas.html"
200
>MIPS/MIPS32(CoreLV 4Kc)+MIPS64(CoreLV 5Kc) Atlas Board</A
201
></DT
202
><DT
203
><A
204
HREF="malta.html"
205
>MIPS/MIPS32(CoreLV 4Kc)+MIPS64(CoreLV 5Kc) Malta Board</A
206
></DT
207
><DT
208
><A
209
HREF="ocelot.html"
210
>MIPS/RM7000 PMC-Sierra Ocelot</A
211
></DT
212
><DT
213
><A
214
HREF="vrc4375.html"
215
>MIPS/VR4375 NEC DDB-VRC4375</A
216
></DT
217
><DT
218
><A
219
HREF="viper.html"
220
>PowerPC/MPC860T Analogue &#38; Micro PowerPC 860T</A
221
></DT
222
><DT
223
><A
224
HREF="mbx.html"
225
>PowerPC/MPC8XX Motorola MBX</A
226
></DT
227
><DT
228
><A
229
HREF="edk7708.html"
230
>SuperH/SH3(SH7708) Hitachi EDK7708</A
231
></DT
232
><DT
233
><A
234
HREF="se7709.html"
235
>SuperH/SH3(SH7709) Hitachi Solution Engine 7709</A
236
></DT
237
><DT
238
><A
239
HREF="hs7729pci.html"
240
>SuperH/SH3(SH7729) Hitachi HS7729PCI</A
241
></DT
242
><DT
243
><A
244
HREF="se77x9.html"
245
>SuperH/SH3(SH77X9) Hitachi Solution Engine 77X9</A
246
></DT
247
><DT
248
><A
249
HREF="se7751.html"
250
>SuperH/SH4(SH7751) Hitachi Solution Engine 7751</A
251
></DT
252
></DL
253
></DIV
254
><DIV
255
CLASS="SECT1"
256
><H1
257
CLASS="SECT1"
258
><A
259
NAME="ASB2305">AM3x/MN103E010 Matsushita MN103E010 (AM33/2.0) ASB2305 Board</H1
260
><DIV
261
CLASS="SECT2"
262
><H2
263
CLASS="SECT2"
264
><A
265
NAME="AEN4839">Overview</H2
266
><P
267
>&#13;
268
RedBoot supports the debug serial port and the built in ethernet port for communication and
269
downloads. The default serial port settings are 115200,8,N,1 with RTS/CTS flow control. RedBoot can
270
run from either flash, and can support flash management for either the boot PROM or the system
271
flash regions.</P
272
><P
273
>The following RedBoot configurations are supported:
274
 
275
      <DIV
276
CLASS="INFORMALTABLE"
277
><A
278
NAME="AEN4849"><P
279
></P
280
><TABLE
281
BORDER="1"
282
CLASS="CALSTABLE"
283
><THEAD
284
><TR
285
><TH
286
ALIGN="LEFT"
287
VALIGN="TOP"
288
>Configuration</TH
289
><TH
290
ALIGN="LEFT"
291
VALIGN="TOP"
292
>Mode</TH
293
><TH
294
ALIGN="LEFT"
295
VALIGN="TOP"
296
>Description</TH
297
><TH
298
ALIGN="LEFT"
299
VALIGN="TOP"
300
>File</TH
301
></TR
302
></THEAD
303
><TBODY
304
><TR
305
><TD
306
ALIGN="LEFT"
307
VALIGN="TOP"
308
>PROM</TD
309
><TD
310
ALIGN="LEFT"
311
VALIGN="TOP"
312
>[ROM]</TD
313
><TD
314
ALIGN="LEFT"
315
VALIGN="TOP"
316
>RedBoot running from the boot PROM and able to
317
              access the system flash.</TD
318
><TD
319
ALIGN="LEFT"
320
VALIGN="TOP"
321
>redboot_ROM.ecm</TD
322
></TR
323
><TR
324
><TD
325
ALIGN="LEFT"
326
VALIGN="TOP"
327
>FLASH</TD
328
><TD
329
ALIGN="LEFT"
330
VALIGN="TOP"
331
>[ROM]</TD
332
><TD
333
ALIGN="LEFT"
334
VALIGN="TOP"
335
>RedBoot running from the system flash and able to
336
              access the boot PROM.</TD
337
><TD
338
ALIGN="LEFT"
339
VALIGN="TOP"
340
>redboot_FLASH.ecm</TD
341
></TR
342
><TR
343
><TD
344
ALIGN="LEFT"
345
VALIGN="TOP"
346
>RAM</TD
347
><TD
348
ALIGN="LEFT"
349
VALIGN="TOP"
350
>[RAM]</TD
351
><TD
352
ALIGN="LEFT"
353
VALIGN="TOP"
354
>RedBoot running from RAM and able to access the
355
              boot PROM.</TD
356
><TD
357
ALIGN="LEFT"
358
VALIGN="TOP"
359
>redboot_RAM.ecm</TD
360
></TR
361
></TBODY
362
></TABLE
363
><P
364
></P
365
></DIV
366
></P
367
></DIV
368
><DIV
369
CLASS="SECT2"
370
><H2
371
CLASS="SECT2"
372
><A
373
NAME="AEN4873">Initial Installation</H2
374
><P
375
>Unless a pre-programmed system flash module is available to be plugged into a new board,
376
RedBoot must be installed with the aid of a JTAG interface unit. To achieve this, the RAM mode
377
RedBoot must be loaded directly into RAM by JTAG and started, and then <SPAN
378
CLASS="emphasis"
379
><I
380
CLASS="EMPHASIS"
381
>that</I
382
></SPAN
383
>
384
must be used to store the ROM mode RedBoot into the boot PROM.</P
385
><P
386
>These instructions assume that you have binary images of the RAM-based and boot PROM-based
387
RedBoot images available.</P
388
><DIV
389
CLASS="SECT3"
390
><H3
391
CLASS="SECT3"
392
><A
393
NAME="AEN4878">Preparing to program the board</H3
394
><P
395
>If the board is to be programmed, whether via JTAG or RedBoot, some hardware settings need to
396
be changed:</P
397
><P
398
></P
399
><UL
400
><LI
401
><P
402
>Jumper across ST18 on the board to allow write access to the boot PROM.</P
403
></LI
404
><LI
405
><P
406
>Set DIP switch S1-3 to OFF to allow RedBoot to write to the system flash.</P
407
></LI
408
><LI
409
><P
410
>Set the switch S5 (on the front of the board) to boot from whichever flash is
411
<SPAN
412
CLASS="emphasis"
413
><I
414
CLASS="EMPHASIS"
415
>not</I
416
></SPAN
417
> being programmed. Note that the RedBoot image cannot access the flash from
418
which it is currently executing (it can only access the other flash).</P
419
></LI
420
></UL
421
><P
422
>The RedBoot binary image files should also be copied to the TFTP pickup area on the host providing
423
TFTP services if that is how RedBoot should pick up the images it is going to program into the
424
flash. Alternatively, the images can be passed by YMODEM over the serial link.</P
425
></DIV
426
><DIV
427
CLASS="SECT3"
428
><H3
429
CLASS="SECT3"
430
><A
431
NAME="AEN4890">Preparing to use the JTAG debugger</H3
432
><P
433
>The JTAG debugger will also need setting up:</P
434
><P
435
></P
436
><OL
437
TYPE="1"
438
><LI
439
><P
440
>Install the JTAG debugger software (WICE103E) on a PC running Windows (WinNT is
441
probably the best choice for this) in &#8220;C:/PanaX&#8221;.</P
442
></LI
443
><LI
444
><P
445
>Install the Matsushita provided &#8220;project&#8221; into the
446
&#8220;C:/Panax/wice103e/prj&#8221; directory.</P
447
></LI
448
><LI
449
><P
450
>Install the RedBoot image files into the &#8220;C:/Panax/wice103e/prj&#8221;
451
directory under the names redboot.ram and redboot.prom.</P
452
></LI
453
><LI
454
><P
455
>Make sure the PC's BIOS has the parallel port set to full bidirectional
456
mode.</P
457
></LI
458
><LI
459
><P
460
>Connect the JTAG debugger to the PC's parallel port.</P
461
></LI
462
><LI
463
><P
464
>Connect the JTAG debugger to the board.</P
465
></LI
466
><LI
467
><P
468
>Set the switch on the front of the board to boot from &#8220;boot
469
PROM&#8221;.</P
470
></LI
471
><LI
472
><P
473
>Power up the JTAG debugger and then power up the board.</P
474
></LI
475
><LI
476
><P
477
>Connect the board's Debug Serial port to a computer by a null modem cable.</P
478
></LI
479
><LI
480
><P
481
>Start minicom or some other serial communication software and set for 115200 baud,
482
1-N-8 with hardware (RTS/CTS) flow control.</P
483
></LI
484
></OL
485
></DIV
486
><DIV
487
CLASS="SECT3"
488
><H3
489
CLASS="SECT3"
490
><A
491
NAME="AEN4914">Loading the RAM-based RedBoot via JTAG</H3
492
><P
493
>To perform the first half of the operation, the following steps should be followed:</P
494
><P
495
></P
496
><OL
497
TYPE="1"
498
><LI
499
><P
500
>Start the JTAG debugger software.</P
501
></LI
502
><LI
503
><P
504
>Run the following commands at the JTAG debugger's prompt to set up the MMU registers on the
505
CPU.</P
506
><TABLE
507
BORDER="5"
508
BGCOLOR="#E0E0F0"
509
WIDTH="70%"
510
><TR
511
><TD
512
><PRE
513
CLASS="SCREEN"
514
><TT
515
CLASS="USERINPUT"
516
><B
517
>ed 0xc0002000, 0x12000580</B
518
></TT
519
>
520
 
521
<TT
522
CLASS="USERINPUT"
523
><B
524
>ed 0xd8c00100, 0x8000fe01</B
525
></TT
526
>
527
<TT
528
CLASS="USERINPUT"
529
><B
530
>ed 0xd8c00200, 0x21111000</B
531
></TT
532
>
533
<TT
534
CLASS="USERINPUT"
535
><B
536
>ed 0xd8c00204, 0x00100200</B
537
></TT
538
>
539
<TT
540
CLASS="USERINPUT"
541
><B
542
>ed 0xd8c00208, 0x00000004</B
543
></TT
544
>
545
 
546
<TT
547
CLASS="USERINPUT"
548
><B
549
>ed 0xd8c00110, 0x8400fe01</B
550
></TT
551
>
552
<TT
553
CLASS="USERINPUT"
554
><B
555
>ed 0xd8c00210, 0x21111000</B
556
></TT
557
>
558
<TT
559
CLASS="USERINPUT"
560
><B
561
>ed 0xd8c00214, 0x00100200</B
562
></TT
563
>
564
<TT
565
CLASS="USERINPUT"
566
><B
567
>ed 0xd8c00218, 0x00000004</B
568
></TT
569
>
570
 
571
<TT
572
CLASS="USERINPUT"
573
><B
574
>ed 0xd8c00120, 0x8600ff81</B
575
></TT
576
>
577
<TT
578
CLASS="USERINPUT"
579
><B
580
>ed 0xd8c00220, 0x21111000</B
581
></TT
582
>
583
<TT
584
CLASS="USERINPUT"
585
><B
586
>ed 0xd8c00224, 0x00100200</B
587
></TT
588
>
589
<TT
590
CLASS="USERINPUT"
591
><B
592
>ed 0xd8c00228, 0x00000004</B
593
></TT
594
>
595
 
596
<TT
597
CLASS="USERINPUT"
598
><B
599
>ed 0xd8c00130, 0x8680ff81</B
600
></TT
601
>
602
<TT
603
CLASS="USERINPUT"
604
><B
605
>ed 0xd8c00230, 0x21111000</B
606
></TT
607
>
608
<TT
609
CLASS="USERINPUT"
610
><B
611
>ed 0xd8c00234, 0x00100200</B
612
></TT
613
>
614
<TT
615
CLASS="USERINPUT"
616
><B
617
>ed 0xd8c00238, 0x00000004</B
618
></TT
619
>
620
 
621
<TT
622
CLASS="USERINPUT"
623
><B
624
>ed 0xd8c00140, 0x9800f801</B
625
></TT
626
>
627
<TT
628
CLASS="USERINPUT"
629
><B
630
>ed 0xd8c00240, 0x00140000</B
631
></TT
632
>
633
<TT
634
CLASS="USERINPUT"
635
><B
636
>ed 0xd8c00244, 0x11011100</B
637
></TT
638
>
639
<TT
640
CLASS="USERINPUT"
641
><B
642
>ed 0xd8c00248, 0x01000001</B
643
></TT
644
>
645
 
646
<TT
647
CLASS="USERINPUT"
648
><B
649
>ed 0xda000000, 0x55561645</B
650
></TT
651
>
652
<TT
653
CLASS="USERINPUT"
654
><B
655
>ed 0xda000004, 0x000003c0</B
656
></TT
657
>
658
<TT
659
CLASS="USERINPUT"
660
><B
661
>ed 0xda000008, 0x9000fe01</B
662
></TT
663
>
664
<TT
665
CLASS="USERINPUT"
666
><B
667
>ed 0xda00000c, 0x9200fe01</B
668
></TT
669
>
670
<TT
671
CLASS="USERINPUT"
672
><B
673
>ed 0xda000000, 0xa89b0654</B
674
></TT
675
></PRE
676
></TD
677
></TR
678
></TABLE
679
></LI
680
><LI
681
><P
682
>Run the following commands at the JTAG debugger's prompt to tell it what regions of the CPU's
683
address space it can access:</P
684
><TABLE
685
BORDER="5"
686
BGCOLOR="#E0E0F0"
687
WIDTH="70%"
688
><TR
689
><TD
690
><PRE
691
CLASS="SCREEN"
692
><TT
693
CLASS="USERINPUT"
694
><B
695
>ex 0x80000000,0x81ffffff,/mexram</B
696
></TT
697
>
698
<TT
699
CLASS="USERINPUT"
700
><B
701
>ex 0x84000000,0x85ffffff,/mexram</B
702
></TT
703
>
704
<TT
705
CLASS="USERINPUT"
706
><B
707
>ex 0x86000000,0x867fffff,/mexram</B
708
></TT
709
>
710
<TT
711
CLASS="USERINPUT"
712
><B
713
>ex 0x86800000,0x87ffffff,/mexram</B
714
></TT
715
>
716
<TT
717
CLASS="USERINPUT"
718
><B
719
>ex 0x8c000000,0x8cffffff,/mexram</B
720
></TT
721
>
722
<TT
723
CLASS="USERINPUT"
724
><B
725
>ex 0x90000000,0x93ffffff,/mexram</B
726
></TT
727
></PRE
728
></TD
729
></TR
730
></TABLE
731
></LI
732
><LI
733
><P
734
>Instruct the debugger to load the RAM RedBoot image into RAM:</P
735
><TABLE
736
BORDER="5"
737
BGCOLOR="#E0E0F0"
738
WIDTH="70%"
739
><TR
740
><TD
741
><PRE
742
CLASS="SCREEN"
743
><TT
744
CLASS="USERINPUT"
745
><B
746
>_pc=90000000</B
747
></TT
748
>
749
<TT
750
CLASS="USERINPUT"
751
><B
752
>u_pc</B
753
></TT
754
>
755
<TT
756
CLASS="USERINPUT"
757
><B
758
>rd redboot.ram,90000000</B
759
></TT
760
></PRE
761
></TD
762
></TR
763
></TABLE
764
></LI
765
><LI
766
><P
767
>Load the boot PROM RedBoot into RAM:</P
768
><TABLE
769
BORDER="5"
770
BGCOLOR="#E0E0F0"
771
WIDTH="70%"
772
><TR
773
><TD
774
><PRE
775
CLASS="SCREEN"
776
><TT
777
CLASS="USERINPUT"
778
><B
779
>rd redboot.prom,91020000</B
780
></TT
781
></PRE
782
></TD
783
></TR
784
></TABLE
785
></LI
786
><LI
787
><P
788
>Start RedBoot in RAM:</P
789
><TABLE
790
BORDER="5"
791
BGCOLOR="#E0E0F0"
792
WIDTH="70%"
793
><TR
794
><TD
795
><PRE
796
CLASS="SCREEN"
797
><TT
798
CLASS="USERINPUT"
799
><B
800
>g</B
801
></TT
802
></PRE
803
></TD
804
></TR
805
></TABLE
806
><P
807
>Note that RedBoot may take some time to start up, as it will attempt to query a BOOTP or DHCP
808
server to try and automatically get an IP address for the board. Note, however, that it should send
809
a plus over the serial port immediately, and the 7-segment LEDs should display &#8220;rh
810
8&#8221;.</P
811
></LI
812
></OL
813
></DIV
814
><DIV
815
CLASS="SECT3"
816
><H3
817
CLASS="SECT3"
818
><A
819
NAME="AEN4973">Loading the boot PROM-based RedBoot via the RAM mode RedBoot</H3
820
><P
821
>Once the RAM mode RedBoot is up and running, it can be communicated with by way of the serial
822
port. Commands can now be entered directly to RedBoot for flashing the boot PROM.</P
823
><P
824
></P
825
><OL
826
TYPE="1"
827
><LI
828
><P
829
>Instruct RedBoot to initialise the boot PROM:</P
830
><TABLE
831
BORDER="5"
832
BGCOLOR="#E0E0F0"
833
WIDTH="70%"
834
><TR
835
><TD
836
><PRE
837
CLASS="SCREEN"
838
>RedBoot&#62; <TT
839
CLASS="USERINPUT"
840
><B
841
>fi init</B
842
></TT
843
></PRE
844
></TD
845
></TR
846
></TABLE
847
></LI
848
><LI
849
><P
850
>Write the previously loaded redboot.prom image into the boot PROM:</P
851
><TABLE
852
BORDER="5"
853
BGCOLOR="#E0E0F0"
854
WIDTH="70%"
855
><TR
856
><TD
857
><PRE
858
CLASS="SCREEN"
859
>RedBoot&#62; <TT
860
CLASS="USERINPUT"
861
><B
862
>fi write -f 0x80000000 -b 0x91020000 -l 0x00020000</B
863
></TT
864
></PRE
865
></TD
866
></TR
867
></TABLE
868
></LI
869
><LI
870
><P
871
>Check that RedBoot has written the image:</P
872
><TABLE
873
BORDER="5"
874
BGCOLOR="#E0E0F0"
875
WIDTH="70%"
876
><TR
877
><TD
878
><PRE
879
CLASS="SCREEN"
880
>RedBoot&#62; <TT
881
CLASS="USERINPUT"
882
><B
883
>dump -b 0x91020000</B
884
></TT
885
>
886
RedBoot&#62; <TT
887
CLASS="USERINPUT"
888
><B
889
>dump -b 0x80000000</B
890
></TT
891
></PRE
892
></TD
893
></TR
894
></TABLE
895
><P
896
>Barring the difference in address, the two dumps should be the same.</P
897
></LI
898
><LI
899
><P
900
>Close the JTAG software and power-cycle the board. The RedBoot banners should be
901
displayed again over the serial port, followed by the RedBoot prompt. The boot PROM-based RedBoot
902
will now be running.</P
903
></LI
904
><LI
905
><P
906
>Power off the board and unjumper ST18 to write-protect the contents of the boot
907
PROM. Then power the board back up.</P
908
></LI
909
><LI
910
><P
911
>Run the following command to initialise the system flash:</P
912
><TABLE
913
BORDER="5"
914
BGCOLOR="#E0E0F0"
915
WIDTH="70%"
916
><TR
917
><TD
918
><PRE
919
CLASS="SCREEN"
920
>RedBoot&#62; <TT
921
CLASS="USERINPUT"
922
><B
923
>fi init</B
924
></TT
925
></PRE
926
></TD
927
></TR
928
></TABLE
929
><P
930
>Then program the system flash based RedBoot into the system flash:</P
931
><TABLE
932
BORDER="5"
933
BGCOLOR="#E0E0F0"
934
WIDTH="70%"
935
><TR
936
><TD
937
><PRE
938
CLASS="SCREEN"
939
>RedBoot&#62; <TT
940
CLASS="USERINPUT"
941
><B
942
>load -r -b %{FREEMEMLO} redboot_FLASH.bin</B
943
></TT
944
>
945
RedBoot&#62; <TT
946
CLASS="USERINPUT"
947
><B
948
>fi write -f 0x84000000 -b %{FREEMEMLO} -l 0x00020000</B
949
></TT
950
></PRE
951
></TD
952
></TR
953
></TABLE
954
><DIV
955
CLASS="NOTE"
956
><BLOCKQUOTE
957
CLASS="NOTE"
958
><P
959
><B
960
>NOTE: </B
961
>RedBoot arranges the flashes on booting such that they always appear at the same addresses,
962
no matter which one was booted from.</P
963
></BLOCKQUOTE
964
></DIV
965
></LI
966
><LI
967
><P
968
>A similar sequence of commands can be used to program the boot PROM when RedBoot has been
969
booted from an image stored in the system flash.</P
970
><TABLE
971
BORDER="5"
972
BGCOLOR="#E0E0F0"
973
WIDTH="70%"
974
><TR
975
><TD
976
><PRE
977
CLASS="SCREEN"
978
>RedBoot&#62; <TT
979
CLASS="USERINPUT"
980
><B
981
>load -r -b %{FREEMEMLO} /tftpboot/redboot_ROM.bin</B
982
></TT
983
>
984
RedBoot&#62; <TT
985
CLASS="USERINPUT"
986
><B
987
>fi write -f 0x80000000 -b %{FREEMEMLO} -l 0x00020000</B
988
></TT
989
></PRE
990
></TD
991
></TR
992
></TABLE
993
><P
994
>See <A
995
HREF="persistent-state-flash.html"
996
>the Section called <I
997
>Persistent State Flash-based Configuration and Control</I
998
> in Chapter 2</A
999
> for details on configuring the RedBoot in
1000
general, and also <A
1001
HREF="flash-image-system.html"
1002
>the Section called <I
1003
>Flash Image System (FIS)</I
1004
> in Chapter 2</A
1005
> for more details on programming the system
1006
flash.</P
1007
></LI
1008
></OL
1009
></DIV
1010
></DIV
1011
><DIV
1012
CLASS="SECT2"
1013
><H2
1014
CLASS="SECT2"
1015
><A
1016
NAME="AEN5014">Additional Commands</H2
1017
><P
1018
>The <B
1019
CLASS="COMMAND"
1020
>exec</B
1021
> command which allows the loading and execution of
1022
Linux kernels, is supported for this architecture (see <A
1023
HREF="executing-programs.html"
1024
>the Section called <I
1025
>Executing Programs from RedBoot</I
1026
> in Chapter 2</A
1027
>). The
1028
<B
1029
CLASS="COMMAND"
1030
>exec</B
1031
> parameters used for ASB2305 board are:</P
1032
><P
1033
></P
1034
><DIV
1035
CLASS="VARIABLELIST"
1036
><DL
1037
><DT
1038
>-w <TT
1039
CLASS="REPLACEABLE"
1040
><I
1041
>&lt;time&#62;</I
1042
></TT
1043
></DT
1044
><DD
1045
><P
1046
>Wait time in seconds before starting kernel</P
1047
></DD
1048
><DT
1049
>-c <TT
1050
CLASS="REPLACEABLE"
1051
><I
1052
>"params"</I
1053
></TT
1054
></DT
1055
><DD
1056
><P
1057
>Parameters passed to kernel</P
1058
></DD
1059
><DT
1060
><TT
1061
CLASS="REPLACEABLE"
1062
><I
1063
>&lt;addr&#62;</I
1064
></TT
1065
></DT
1066
><DD
1067
><P
1068
>Kernel entry point, defaulting to the entry point of the last image
1069
loaded</P
1070
></DD
1071
></DL
1072
></DIV
1073
><P
1074
>The parameter string is stored in the on-chip memory at location 0x8C001000, and is prefixed
1075
by &#8220;cmdline:&#8221; if it was supplied.</P
1076
></DIV
1077
><DIV
1078
CLASS="SECT2"
1079
><H2
1080
CLASS="SECT2"
1081
><A
1082
NAME="AEN5037">Memory Maps</H2
1083
><P
1084
>RedBoot sets up the following memory map on the ASB2305 board.</P
1085
><DIV
1086
CLASS="NOTE"
1087
><BLOCKQUOTE
1088
CLASS="NOTE"
1089
><P
1090
><B
1091
>NOTE: </B
1092
>The regions mapped between 0x80000000-0x9FFFFFFF are cached by the CPU. However, all those
1093
regions can be accessed uncached by adding 0x20000000 to the address.</P
1094
></BLOCKQUOTE
1095
></DIV
1096
><TABLE
1097
BORDER="5"
1098
BGCOLOR="#E0E0F0"
1099
WIDTH="70%"
1100
><TR
1101
><TD
1102
><PRE
1103
CLASS="PROGRAMLISTING"
1104
>Physical Address Range   Description
1105
-----------------------  -----------
1106
0x80000000 - 0x9FFFFFFF  Cached Region
1107
0x80000000 - 0x81FFFFFF  Boot PROM
1108
0x84000000 - 0x85FFFFFF  System Flash
1109
0x86000000 - 0x86007FFF  64Kbit Sys Config EEPROM
1110
0x86F90000 - 0x86F90003  4x 7-segment LEDs
1111
0x86FA0000 - 0x86FA0003  Software DIP Switches
1112
0x86FB0000 - 0x86FB001F  PC16550 Debug Serial Port
1113
0x8C000000 - 0x8FFFFFFF  On-Chip Memory (repeated 16Kb SRAM)
1114
0x90000000 - 0x93FFFFFF  SDRAM
1115
0x98000000 - 0x9BFFFFFF  Paged PCI Memory Space (64Mb)
1116
0x9C000000 - 0x9DFFFFFF  PCI Local SRAM (32Mb)
1117
0x9E000000 - 0x9E03FFFF  PCI I/O Space
1118
0x9E040000 - 0x9E0400FF  AM33-PCI Bridge Registers
1119
0x9FFFFFF4 - 0x9FFFFFF7  PCI Memory Page Register
1120
0x9FFFFFF8 - 0x9FFFFFFF  PCI Config Registers
1121
0xA0000000 - 0xBFFFFFFF  Uncached Mirror Region
1122
0xC0000000 - 0xDFFFFFFF  CPU Control Registers</PRE
1123
></TD
1124
></TR
1125
></TABLE
1126
><P
1127
>The ASB2305 HAL makes use of the on-chip memory in the following way:</P
1128
><TABLE
1129
BORDER="5"
1130
BGCOLOR="#E0E0F0"
1131
WIDTH="70%"
1132
><TR
1133
><TD
1134
><PRE
1135
CLASS="PROGRAMLISTING"
1136
>0x8C000000 - 0x8C0000FF  hal_vsr_table
1137
0x8C000100 - 0x8C0001FF  hal_virtual_vector_table
1138
0x8C001000 -             Linux command line (RedBoot exec command)
1139
           - 0x8C003FFF  Emergency DoubleFault Exception Stack</PRE
1140
></TD
1141
></TR
1142
></TABLE
1143
><P
1144
>Currently the CPU's interrupt table lies at the beginning of the RedBoot image, which must
1145
therefore be aligned to a 0xFF000000 mask.</P
1146
></DIV
1147
><DIV
1148
CLASS="SECT2"
1149
><H2
1150
CLASS="SECT2"
1151
><A
1152
NAME="AEN5047">Rebuilding RedBoot</H2
1153
><P
1154
>These shell variables provide the platform-specific information
1155
needed for building RedBoot according to the procedure described in
1156
<A
1157
HREF="rebuilding-redboot.html"
1158
>Chapter 3</A
1159
>:
1160
<TABLE
1161
BORDER="5"
1162
BGCOLOR="#E0E0F0"
1163
WIDTH="70%"
1164
><TR
1165
><TD
1166
><PRE
1167
CLASS="PROGRAMLISTING"
1168
>export TARGET=asb2305
1169
export ARCH_DIR=mn10300
1170
export PLATFORM_DIR=asb2305</PRE
1171
></TD
1172
></TR
1173
></TABLE
1174
></P
1175
><P
1176
>The names of configuration files are listed above with the
1177
description of the associated modes.</P
1178
></DIV
1179
></DIV
1180
></DIV
1181
><DIV
1182
CLASS="NAVFOOTER"
1183
><HR
1184
ALIGN="LEFT"
1185
WIDTH="100%"><TABLE
1186
SUMMARY="Footer navigation table"
1187
WIDTH="100%"
1188
BORDER="0"
1189
CELLPADDING="0"
1190
CELLSPACING="0"
1191
><TR
1192
><TD
1193
WIDTH="33%"
1194
ALIGN="left"
1195
VALIGN="top"
1196
><A
1197
HREF="updating-redboot.html"
1198
ACCESSKEY="P"
1199
>Prev</A
1200
></TD
1201
><TD
1202
WIDTH="34%"
1203
ALIGN="center"
1204
VALIGN="top"
1205
><A
1206
HREF="ecos-ref.html"
1207
ACCESSKEY="H"
1208
>Home</A
1209
></TD
1210
><TD
1211
WIDTH="33%"
1212
ALIGN="right"
1213
VALIGN="top"
1214
><A
1215
HREF="e7t.html"
1216
ACCESSKEY="N"
1217
>Next</A
1218
></TD
1219
></TR
1220
><TR
1221
><TD
1222
WIDTH="33%"
1223
ALIGN="left"
1224
VALIGN="top"
1225
>Updating RedBoot</TD
1226
><TD
1227
WIDTH="34%"
1228
ALIGN="center"
1229
VALIGN="top"
1230
><A
1231
HREF="redboot.html"
1232
ACCESSKEY="U"
1233
>Up</A
1234
></TD
1235
><TD
1236
WIDTH="33%"
1237
ALIGN="right"
1238
VALIGN="top"
1239
>ARM/ARM7 ARM Evaluator7T</TD
1240
></TR
1241
></TABLE
1242
></DIV
1243
></BODY
1244
></HTML
1245
>

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.