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>MIPS/MIPS32(CoreLV 4Kc)+MIPS64(CoreLV 5Kc) Malta Board </TITLE
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TITLE="MIPS/MIPS32(CoreLV 4Kc)+MIPS64(CoreLV 5Kc) Atlas Board"
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TITLE="MIPS/RM7000 PMC-Sierra Ocelot"
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>eCos Reference Manual</TH
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WIDTH="10%"
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ALIGN="left"
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><A
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HREF="atlas.html"
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ACCESSKEY="P"
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>Prev</A
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></TD
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><TD
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WIDTH="80%"
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ALIGN="center"
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VALIGN="bottom"
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>Chapter 5. Installation and Testing</TD
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><TD
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><DIV
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CLASS="SECT1"
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><H1
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CLASS="SECT1"
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><A
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NAME="MALTA">MIPS/MIPS32(CoreLV 4Kc)+MIPS64(CoreLV 5Kc) Malta Board</H1
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><DIV
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CLASS="SECT2"
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><H2
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CLASS="SECT2"
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><A
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NAME="AEN6809">Overview</H2
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><P
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>RedBoot supports both front
94
facing serial ports and the built in ethernet port for communication and downloads.
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The default serial port settings are 38400,8,N,1. RedBoot runs from and supports
96
flash management for the system flash region.</P
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><P
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>The following RedBoot configurations are supported:
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      <DIV
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CLASS="INFORMALTABLE"
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><A
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NAME="AEN6819"><P
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></P
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><TABLE
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BORDER="1"
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CLASS="CALSTABLE"
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><THEAD
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><TR
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><TH
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ALIGN="LEFT"
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VALIGN="TOP"
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>Configuration</TH
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><TH
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ALIGN="LEFT"
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VALIGN="TOP"
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>Mode</TH
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><TH
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ALIGN="LEFT"
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VALIGN="TOP"
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>Description</TH
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><TH
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ALIGN="LEFT"
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VALIGN="TOP"
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>File</TH
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></TR
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></THEAD
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><TBODY
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><TR
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><TD
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ALIGN="LEFT"
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VALIGN="TOP"
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>ROM</TD
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><TD
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ALIGN="LEFT"
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VALIGN="TOP"
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>[ROM]</TD
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><TD
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ALIGN="LEFT"
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VALIGN="TOP"
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>RedBoot running from the board's flash boot
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              sector.</TD
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><TD
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ALIGN="LEFT"
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VALIGN="TOP"
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>redboot_ROM.ecm</TD
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></TR
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><TR
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><TD
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ALIGN="LEFT"
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VALIGN="TOP"
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>RAM</TD
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><TD
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ALIGN="LEFT"
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VALIGN="TOP"
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>[RAM]</TD
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><TD
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ALIGN="LEFT"
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VALIGN="TOP"
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>RedBoot running from RAM with RedBoot in the
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              flash boot sector.</TD
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><TD
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ALIGN="LEFT"
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VALIGN="TOP"
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>redboot_RAM.ecm</TD
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></TR
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></TBODY
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></TABLE
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><P
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></P
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></DIV
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></P
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></DIV
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><DIV
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CLASS="SECT2"
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><H2
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CLASS="SECT2"
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><A
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NAME="AEN6838">Initial Installation</H2
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><P
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>RedBoot is installed using the code download facility built into the
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Malta board. See the Malta User manual for details, and also the Malta download
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format in <A
184
HREF="malta.html#MALTA-DOWNLOAD-FORMAT"
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>the Section called <I
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>Malta download format</I
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></A
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>.</P
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><DIV
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CLASS="SECT3"
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><H3
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CLASS="SECT3"
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><A
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NAME="AEN6842">Quick download instructions</H3
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><P
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>Here are quick start instructions for downloading the prebuilt RedBoot
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image. </P
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><P
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></P
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><OL
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TYPE="1"
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><LI
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><P
204
>Locate the prebuilt files in the bin directory: <TT
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CLASS="FILENAME"
206
>deleteall.fl</TT
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> and <TT
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CLASS="FILENAME"
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>redboot_ROM.fl</TT
210
>. </P
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></LI
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><LI
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><P
214
>Make sure switch S5-1 is ON. Reset the board and verify that
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the LED display reads <TT
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CLASS="COMPUTEROUTPUT"
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>Flash DL</TT
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>. </P
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></LI
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><LI
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><P
222
>Make sure your parallel port is connected to the 1284 port
223
Of the Atlas board. </P
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></LI
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><LI
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><P
227
>Send the <TT
228
CLASS="FILENAME"
229
>deleteall.fl</TT
230
> file to the
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parallel port to erase previous images:
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<TABLE
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BORDER="5"
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BGCOLOR="#E0E0F0"
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WIDTH="70%"
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><TR
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><TD
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><PRE
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CLASS="SCREEN"
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>$ <TT
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CLASS="USERINPUT"
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><B
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>cat deleteall.fl &#62;/dev/lp0</B
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></TT
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></PRE
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></TD
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></TR
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></TABLE
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>
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When this is complete, the LED display should read
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<TT
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CLASS="COMPUTEROUTPUT"
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>Deleted</TT
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>.</P
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></LI
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><LI
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><P
258
>Send the RedBoot image to the board:
259
<TABLE
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BORDER="5"
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BGCOLOR="#E0E0F0"
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WIDTH="70%"
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><TR
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><TD
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><PRE
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CLASS="SCREEN"
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>$ <TT
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CLASS="USERINPUT"
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><B
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>cat redboot_ROM.fl &#62;/dev/lp0</B
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></TT
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></PRE
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></TD
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></TR
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></TABLE
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>
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When this is complete, the LED display should show the last address
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programmed. This will be something like:
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<TT
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CLASS="COMPUTEROUTPUT"
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>1fc17000</TT
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>. </P
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></LI
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><LI
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><P
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>Change switch S5-1 to OFF and reset the board. The LED display
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should read <TT
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CLASS="COMPUTEROUTPUT"
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>RedBoot</TT
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>. </P
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></LI
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><LI
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><P
294
>Run the RedBoot <B
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CLASS="COMMAND"
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>fis init</B
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> and <B
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CLASS="COMMAND"
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>fconfig</B
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> commands to initialize the flash. See <A
301
HREF="flash-image-system.html"
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>the Section called <I
303
>Flash Image System (FIS)</I
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> in Chapter 2</A
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>
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and <A
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HREF="persistent-state-flash.html"
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>the Section called <I
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>Persistent State Flash-based Configuration and Control</I
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> in Chapter 2</A
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> for details. </P
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></LI
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></OL
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></DIV
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><DIV
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CLASS="SECT3"
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><H3
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CLASS="SECT3"
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><A
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NAME="MALTA-DOWNLOAD-FORMAT">Malta download format</H3
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><P
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>In order to download RedBoot to the Malta board, it must be converted
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to the Malta download format.</P
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><P
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>The <I
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CLASS="CITETITLE"
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>Atlas/Malta Developer's Kit</I
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> CD contains an <SPAN
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CLASS="APPLICATION"
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>srecconv.pl</SPAN
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> utility which requires Perl. This utility is part
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of the <TT
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CLASS="FILENAME"
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>yamon/yamon-src-02.00.tar.gz</TT
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> tarball
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on the Dev Kit CD. The path in the expanded tarball is <TT
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CLASS="FILENAME"
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>yamon/bin/tools</TT
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>.  To use
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<SPAN
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CLASS="APPLICATION"
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>srecconv</SPAN
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> to convert the S-record file:
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<TABLE
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BORDER="5"
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BGCOLOR="#E0E0F0"
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WIDTH="70%"
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><TR
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><TD
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><PRE
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CLASS="SCREEN"
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>$ <TT
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CLASS="USERINPUT"
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><B
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>cp redboot_ROM.srec redboot_ROM.rec</B
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></TT
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>
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$ <TT
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CLASS="USERINPUT"
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><B
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>srecconv.pl -ES L -A 29 redboot_ROM</B
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></TT
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></PRE
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></TD
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></TR
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></TABLE
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>
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The resulting file is named <TT
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CLASS="FILENAME"
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>redboot_ROM.fl</TT
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>.</P
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></DIV
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></DIV
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><DIV
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CLASS="SECT2"
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><H2
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CLASS="SECT2"
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><A
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NAME="AEN6888">Additional commands</H2
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><P
381
>The <B
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CLASS="COMMAND"
383
>exec</B
384
> command which allows the
385
loading and execution of Linux kernels, is supported for this architecture
386
 (see <A
387
HREF="executing-programs.html"
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>the Section called <I
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>Executing Programs from RedBoot</I
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> in Chapter 2</A
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>). The
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<B
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CLASS="COMMAND"
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>exec</B
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> parameters used for MIPS boards are:</P
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><P
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></P
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><DIV
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CLASS="VARIABLELIST"
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><DL
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><DT
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>-b <TT
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CLASS="REPLACEABLE"
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><I
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>&lt;addr&#62;</I
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></TT
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></DT
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><DD
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><P
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>Location to store command line and environment passed to kernel</P
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></DD
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><DT
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>-w <TT
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CLASS="REPLACEABLE"
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><I
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>&lt;time&#62;</I
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></TT
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></DT
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><DD
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><P
421
>Wait time in seconds before starting kernel</P
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></DD
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><DT
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>-c <TT
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CLASS="REPLACEABLE"
426
><I
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>"params"</I
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></TT
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></DT
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><DD
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><P
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>Parameters passed to kernel</P
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></DD
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><DT
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><TT
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CLASS="REPLACEABLE"
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><I
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>&lt;addr&#62;</I
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></TT
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></DT
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><DD
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><P
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>Kernel entry point, defaulting to the entry point of the last image
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loaded</P
445
></DD
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></DL
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></DIV
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><P
449
>Linux kernels on MIPS platforms expect the entry point to be called with arguments
450
in the registers equivalent to a C call with prototype:
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<TABLE
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BORDER="5"
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BGCOLOR="#E0E0F0"
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WIDTH="70%"
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><TR
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><TD
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><PRE
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CLASS="PROGRAMLISTING"
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>void Linux(int argc, char **argv, char **envp);</PRE
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></TD
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></TR
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></TABLE
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></P
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><P
465
>RedBoot will place the appropriate data at the offset specified by the
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<TT
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CLASS="PARAMETER"
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><I
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>-b</I
470
></TT
471
> parameter, or by default at address 0x80080000, and will set the
472
arguments accordingly when calling into the kernel.</P
473
><P
474
>The default entry point, if no image with explicit entry point has been loaded and
475
none is specified, is 0x80000750.</P
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></DIV
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><DIV
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CLASS="SECT2"
479
><H2
480
CLASS="SECT2"
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><A
482
NAME="AEN6920">Interrupts</H2
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><P
484
>RedBoot uses an interrupt vector table which is located at address 0x80000200.
485
Entries in this table are pointers to functions with this protoype:      <TABLE
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BORDER="5"
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BGCOLOR="#E0E0F0"
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WIDTH="70%"
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><TR
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><TD
491
><PRE
492
CLASS="PROGRAMLISTING"
493
>int irq_handler( unsigned vector, unsigned data )</PRE
494
></TD
495
></TR
496
></TABLE
497
>On the malta
498
board, the vector argument is one of 22 interrupts defined in <TT
499
CLASS="COMPUTEROUTPUT"
500
>hal/mips/malta/<TT
501
CLASS="REPLACEABLE"
502
><I
503
>VERSION</I
504
></TT
505
>/include/plf_intr.h</TT
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>: <TABLE
507
BORDER="5"
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BGCOLOR="#E0E0F0"
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WIDTH="70%"
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><TR
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><TD
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><PRE
513
CLASS="PROGRAMLISTING"
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>&#13;#define CYGNUM_HAL_INTERRUPT_SOUTH_BRIDGE_INTR   0
515
#define CYGNUM_HAL_INTERRUPT_SOUTH_BRIDGE_SMI    1
516
#define CYGNUM_HAL_INTERRUPT_CBUS_UART           2
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#define CYGNUM_HAL_INTERRUPT_COREHI              3
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#define CYGNUM_HAL_INTERRUPT_CORELO              4
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#define CYGNUM_HAL_INTERRUPT_COMPARE             5
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#define CYGNUM_HAL_INTERRUPT_TIMER               6
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#define CYGNUM_HAL_INTERRUPT_KEYBOARD            7
522
#define CYGNUM_HAL_INTERRUPT_CASCADE             8
523
#define CYGNUM_HAL_INTERRUPT_TTY1                9
524
#define CYGNUM_HAL_INTERRUPT_TTY0               10
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#define CYGNUM_HAL_INTERRUPT_11                 11
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#define CYGNUM_HAL_INTERRUPT_FLOPPY             12
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#define CYGNUM_HAL_INTERRUPT_PARALLEL           13
528
#define CYGNUM_HAL_INTERRUPT_REAL_TIME_CLOCK    14
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#define CYGNUM_HAL_INTERRUPT_I2C                15
530
#define CYGNUM_HAL_INTERRUPT_PCI_AB             16
531
#define CYGNUM_HAL_INTERRUPT_PCI_CD             17
532
#define CYGNUM_HAL_INTERRUPT_MOUSE              18
533
#define CYGNUM_HAL_INTERRUPT_19                 19
534
#define CYGNUM_HAL_INTERRUPT_IDE_PRIMARY        20
535
#define CYGNUM_HAL_INTERRUPT_IDE_SECONDARY      21</PRE
536
></TD
537
></TR
538
></TABLE
539
>The data
540
passed to the ISR is pulled from a data table (<TT
541
CLASS="COMPUTEROUTPUT"
542
>hal_interrupt_data</TT
543
>) which immediately follows the interrupt vector table. With
544
22 interrupts, the data table starts at address 0x80000258.</P
545
><P
546
>An application may create a normal C function with the above prototype
547
to be an ISR. Just poke its address into the table at the correct index and
548
enable the interrupt at its source. The return value of the ISR is ignored
549
by RedBoot. </P
550
></DIV
551
><DIV
552
CLASS="SECT2"
553
><H2
554
CLASS="SECT2"
555
><A
556
NAME="AEN6929">Memory Maps</H2
557
><P
558
>Memory Maps RedBoot sets up the following memory map on the Malta board.<DIV
559
CLASS="NOTE"
560
><BLOCKQUOTE
561
CLASS="NOTE"
562
><P
563
><B
564
>NOTE: </B
565
>The virtual memory maps in this section use a C and B column to indicate
566
whether or not the region is cached (C) or buffered (B).</P
567
></BLOCKQUOTE
568
></DIV
569
><TABLE
570
BORDER="5"
571
BGCOLOR="#E0E0F0"
572
WIDTH="70%"
573
><TR
574
><TD
575
><PRE
576
CLASS="PROGRAMLISTING"
577
>Physical Address Range  C B  Description
578
----------------------- - -  -----------
579
0x80000000 - 0x81ffffff Y Y  SDRAM
580
0x9e000000 - 0x9e3fffff Y N  System flash (cached)
581
0x9fc00000 - 0x9fffffff Y N  System flash (mirrored)
582
0xa8000000 - 0xb7ffffff N N  PCI Memory Space
583
0xb4000000 - 0xb40fffff N N  Galileo System Controller
584
0xb8000000 - 0xb80fffff N N  Southbridge / ISA
585
0xb8100000 - 0xbbdfffff N N  PCI I/O Space
586
0xbe000000 - 0xbe3fffff N N  System flash (noncached)
587
0xbf000000 - 0xbfffffff N N  Board logic FPGA</PRE
588
></TD
589
></TR
590
></TABLE
591
></P
592
></DIV
593
><DIV
594
CLASS="SECT2"
595
><H2
596
CLASS="SECT2"
597
><A
598
NAME="AEN6936">Rebuilding RedBoot</H2
599
><P
600
>These shell variables provide the platform-specific information
601
needed for building RedBoot according to the procedure described in
602
<A
603
HREF="rebuilding-redboot.html"
604
>Chapter 3</A
605
>:
606
<TABLE
607
BORDER="5"
608
BGCOLOR="#E0E0F0"
609
WIDTH="70%"
610
><TR
611
><TD
612
><PRE
613
CLASS="PROGRAMLISTING"
614
>export TARGET=malta_mips32_4kc
615
export ARCH_DIR=mips
616
export PLATFORM_DIR=malta</PRE
617
></TD
618
></TR
619
></TABLE
620
></P
621
><P
622
>The names of configuration files are listed above with the
623
description of the associated modes.</P
624
></DIV
625
></DIV
626
><DIV
627
CLASS="NAVFOOTER"
628
><HR
629
ALIGN="LEFT"
630
WIDTH="100%"><TABLE
631
SUMMARY="Footer navigation table"
632
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><TD
638
WIDTH="33%"
639
ALIGN="left"
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VALIGN="top"
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><A
642
HREF="atlas.html"
643
ACCESSKEY="P"
644
>Prev</A
645
></TD
646
><TD
647
WIDTH="34%"
648
ALIGN="center"
649
VALIGN="top"
650
><A
651
HREF="ecos-ref.html"
652
ACCESSKEY="H"
653
>Home</A
654
></TD
655
><TD
656
WIDTH="33%"
657
ALIGN="right"
658
VALIGN="top"
659
><A
660
HREF="ocelot.html"
661
ACCESSKEY="N"
662
>Next</A
663
></TD
664
></TR
665
><TR
666
><TD
667
WIDTH="33%"
668
ALIGN="left"
669
VALIGN="top"
670
>MIPS/MIPS32(CoreLV 4Kc)+MIPS64(CoreLV 5Kc) Atlas Board</TD
671
><TD
672
WIDTH="34%"
673
ALIGN="center"
674
VALIGN="top"
675
><A
676
HREF="installation-and-testing.html"
677
ACCESSKEY="U"
678
>Up</A
679
></TD
680
><TD
681
WIDTH="33%"
682
ALIGN="right"
683
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684
>MIPS/RM7000 PMC-Sierra Ocelot</TD
685
></TR
686
></TABLE
687
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688
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689
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690
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