OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [doc/] [html/] [ref/] [sa1100mm.html] - Blame information for rev 765

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 28 unneback
<!-- Copyright (C) 2003 Red Hat, Inc.                                -->
2
<!-- This material may be distributed only subject to the terms      -->
3
<!-- and conditions set forth in the Open Publication License, v1.0  -->
4
<!-- or later (the latest version is presently available at          -->
5
<!-- http://www.opencontent.org/openpub/).                           -->
6
<!-- Distribution of the work or derivative of the work in any       -->
7
<!-- standard (paper) book form is prohibited unless prior           -->
8
<!-- permission is obtained from the copyright holder.               -->
9
<HTML
10
><HEAD
11
><TITLE
12
>ARM/StrongARM(SA1100) Intel SA1100 Multimedia Board </TITLE
13
><meta name="MSSmartTagsPreventParsing" content="TRUE">
14
<META
15
NAME="GENERATOR"
16
CONTENT="Modular DocBook HTML Stylesheet Version 1.76b+
17
"><LINK
18
REL="HOME"
19
TITLE="eCos Reference Manual"
20
HREF="ecos-ref.html"><LINK
21
REL="UP"
22
TITLE="Installation and Testing"
23
HREF="installation-and-testing.html"><LINK
24
REL="PREVIOUS"
25
TITLE="ARM/StrongARM(SA1100) Intel Brutus"
26
HREF="brutus.html"><LINK
27
REL="NEXT"
28
TITLE="ARM/StrongARM(SA1110) Intel SA1110 (Assabet) "
29
HREF="assabet.html"></HEAD
30
><BODY
31
CLASS="SECT1"
32
BGCOLOR="#FFFFFF"
33
TEXT="#000000"
34
LINK="#0000FF"
35
VLINK="#840084"
36
ALINK="#0000FF"
37
><DIV
38
CLASS="NAVHEADER"
39
><TABLE
40
SUMMARY="Header navigation table"
41
WIDTH="100%"
42
BORDER="0"
43
CELLPADDING="0"
44
CELLSPACING="0"
45
><TR
46
><TH
47
COLSPAN="3"
48
ALIGN="center"
49
>eCos Reference Manual</TH
50
></TR
51
><TR
52
><TD
53
WIDTH="10%"
54
ALIGN="left"
55
VALIGN="bottom"
56
><A
57
HREF="brutus.html"
58
ACCESSKEY="P"
59
>Prev</A
60
></TD
61
><TD
62
WIDTH="80%"
63
ALIGN="center"
64
VALIGN="bottom"
65
>Chapter 5. Installation and Testing</TD
66
><TD
67
WIDTH="10%"
68
ALIGN="right"
69
VALIGN="bottom"
70
><A
71
HREF="assabet.html"
72
ACCESSKEY="N"
73
>Next</A
74
></TD
75
></TR
76
></TABLE
77
><HR
78
ALIGN="LEFT"
79
WIDTH="100%"></DIV
80
><DIV
81
CLASS="SECT1"
82
><H1
83
CLASS="SECT1"
84
><A
85
NAME="SA1100MM">ARM/StrongARM(SA1100) Intel SA1100 Multimedia Board</H1
86
><DIV
87
CLASS="SECT2"
88
><H2
89
CLASS="SECT2"
90
><A
91
NAME="AEN5695">Overview</H2
92
><P
93
>RedBoot supports both board serial ports. The default serial port
94
settings are 38400,8,N,1. flash management is also supported.</P
95
><P
96
>The following RedBoot configurations are supported:
97
 
98
      <DIV
99
CLASS="INFORMALTABLE"
100
><A
101
NAME="AEN5705"><P
102
></P
103
><TABLE
104
BORDER="1"
105
CLASS="CALSTABLE"
106
><THEAD
107
><TR
108
><TH
109
ALIGN="LEFT"
110
VALIGN="TOP"
111
>Configuration</TH
112
><TH
113
ALIGN="LEFT"
114
VALIGN="TOP"
115
>Mode</TH
116
><TH
117
ALIGN="LEFT"
118
VALIGN="TOP"
119
>Description</TH
120
><TH
121
ALIGN="LEFT"
122
VALIGN="TOP"
123
>File</TH
124
></TR
125
></THEAD
126
><TBODY
127
><TR
128
><TD
129
ALIGN="LEFT"
130
VALIGN="TOP"
131
>ROM</TD
132
><TD
133
ALIGN="LEFT"
134
VALIGN="TOP"
135
>[ROM]</TD
136
><TD
137
ALIGN="LEFT"
138
VALIGN="TOP"
139
>RedBoot running from the board's flash boot
140
              sector.</TD
141
><TD
142
ALIGN="LEFT"
143
VALIGN="TOP"
144
>redboot_ROM.ecm</TD
145
></TR
146
><TR
147
><TD
148
ALIGN="LEFT"
149
VALIGN="TOP"
150
>RAM</TD
151
><TD
152
ALIGN="LEFT"
153
VALIGN="TOP"
154
>[RAM]</TD
155
><TD
156
ALIGN="LEFT"
157
VALIGN="TOP"
158
>RedBoot running from RAM with RedBoot in the
159
              flash boot sector.</TD
160
><TD
161
ALIGN="LEFT"
162
VALIGN="TOP"
163
>redboot_RAM.ecm</TD
164
></TR
165
></TBODY
166
></TABLE
167
><P
168
></P
169
></DIV
170
></P
171
></DIV
172
><DIV
173
CLASS="SECT2"
174
><H2
175
CLASS="SECT2"
176
><A
177
NAME="AEN5724">Initial Installation Method</H2
178
><P
179
>A device programmer is used to program socketed flash parts.</P
180
></DIV
181
><DIV
182
CLASS="SECT2"
183
><H2
184
CLASS="SECT2"
185
><A
186
NAME="AEN5727">Special RedBoot Commands</H2
187
><P
188
>None.</P
189
></DIV
190
><DIV
191
CLASS="SECT2"
192
><H2
193
CLASS="SECT2"
194
><A
195
NAME="AEN5730">Memory Maps</H2
196
><P
197
>The first level page table is located at physical address 0xc0004000.
198
No second level tables are used.<DIV
199
CLASS="NOTE"
200
><BLOCKQUOTE
201
CLASS="NOTE"
202
><P
203
><B
204
>NOTE: </B
205
>The virtual memory maps in this section use a C and B column to indicate
206
whether or not the region is cached (C) or buffered (B).</P
207
></BLOCKQUOTE
208
></DIV
209
><TABLE
210
BORDER="5"
211
BGCOLOR="#E0E0F0"
212
WIDTH="70%"
213
><TR
214
><TD
215
><PRE
216
CLASS="PROGRAMLISTING"
217
>Physical Address Range     Description
218
-----------------------    ----------------------------------
219
0x00000000 - 0x000fffff    Boot flash
220
0x08000000 - 0x083fffff    Application flash
221
0x10000000 - 0x107fffff    SA-1101 Board Registers
222
0x18000000 - 0x180fffff    Ct8020 DSP
223
0x18400000 - 0x184fffff    XBusReg
224
0x18800000 - 0x188fffff    SysRegA
225
0x18c00000 - 0x18cfffff    SysRegB
226
0x19000000 - 0x193fffff    Spare CPLD A
227
0x19400000 - 0x197fffff    Spare CPLD B
228
0x20000000 - 0x3fffffff    PCMCIA
229
0x80000000 - 0xbfffffff    SA1100 Internal Registers
230
0xc0000000 - 0xc07fffff    DRAM Bank 0
231
0xe0000000 - 0xe7ffffff    Cache Clean
232
Virtual Address Range    C B  Description
233
 
234
 
235
-----------------------  - -  ----------------------------------
236
0x00000000 - 0x007fffff  Y Y  DRAM Bank 0
237
0x08000000 - 0x083fffff  Y Y  Application flash
238
0x10000000 - 0x100fffff  N N  SA-1101 Registers
239
0x18000000 - 0x180fffff  N N  Ct8020 DSP
240
0x18400000 - 0x184fffff  N N  XBusReg
241
0x18800000 - 0x188fffff  N N  SysRegA
242
0x18c00000 - 0x18cfffff  N N  SysRegB
243
0x19000000 - 0x193fffff  N N  Spare CPLD A
244
0x19400000 - 0x197fffff  N N  Spare CPLD B
245
0x20000000 - 0x3fffffff  N N  PCMCIA
246
0x50000000 - 0x500fffff  Y Y  Boot flash
247
0x80000000 - 0xbfffffff  N N  SA1100 Internal Registers
248
0xc0000000 - 0xc07fffff  N Y  DRAM Bank 0
249
0xe0000000 - 0xe7ffffff  Y Y  Cache Clean</PRE
250
></TD
251
></TR
252
></TABLE
253
></P
254
></DIV
255
><DIV
256
CLASS="SECT2"
257
><H2
258
CLASS="SECT2"
259
><A
260
NAME="AEN5737">Platform Resource Usage</H2
261
><P
262
> The SA11x0 OS timer is used as a polled timer to provide timeout support
263
for XModem file transfers.</P
264
></DIV
265
><DIV
266
CLASS="SECT2"
267
><H2
268
CLASS="SECT2"
269
><A
270
NAME="AEN5740">Rebuilding RedBoot</H2
271
><P
272
>These shell variables provide the platform-specific information
273
needed for building RedBoot according to the procedure described in
274
<A
275
HREF="rebuilding-redboot.html"
276
>Chapter 3</A
277
>:
278
<TABLE
279
BORDER="5"
280
BGCOLOR="#E0E0F0"
281
WIDTH="70%"
282
><TR
283
><TD
284
><PRE
285
CLASS="PROGRAMLISTING"
286
>export TARGET=sa1100mm
287
export ARCH_DIR=arm
288
export PLATFORM_DIR=sa11x0/sa1100mm</PRE
289
></TD
290
></TR
291
></TABLE
292
></P
293
><P
294
>The names of configuration files are listed above with the
295
description of the associated modes.</P
296
></DIV
297
></DIV
298
><DIV
299
CLASS="NAVFOOTER"
300
><HR
301
ALIGN="LEFT"
302
WIDTH="100%"><TABLE
303
SUMMARY="Footer navigation table"
304
WIDTH="100%"
305
BORDER="0"
306
CELLPADDING="0"
307
CELLSPACING="0"
308
><TR
309
><TD
310
WIDTH="33%"
311
ALIGN="left"
312
VALIGN="top"
313
><A
314
HREF="brutus.html"
315
ACCESSKEY="P"
316
>Prev</A
317
></TD
318
><TD
319
WIDTH="34%"
320
ALIGN="center"
321
VALIGN="top"
322
><A
323
HREF="ecos-ref.html"
324
ACCESSKEY="H"
325
>Home</A
326
></TD
327
><TD
328
WIDTH="33%"
329
ALIGN="right"
330
VALIGN="top"
331
><A
332
HREF="assabet.html"
333
ACCESSKEY="N"
334
>Next</A
335
></TD
336
></TR
337
><TR
338
><TD
339
WIDTH="33%"
340
ALIGN="left"
341
VALIGN="top"
342
>ARM/StrongARM(SA1100) Intel Brutus</TD
343
><TD
344
WIDTH="34%"
345
ALIGN="center"
346
VALIGN="top"
347
><A
348
HREF="installation-and-testing.html"
349
ACCESSKEY="U"
350
>Up</A
351
></TD
352
><TD
353
WIDTH="33%"
354
ALIGN="right"
355
VALIGN="top"
356
>ARM/StrongARM(SA1110) Intel SA1110 (Assabet)</TD
357
></TR
358
></TABLE
359
></DIV
360
></BODY
361
></HTML
362
>

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.