OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [doc/] [html/] [user-guide/] [appendix-target-setup.html] - Blame information for rev 646

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 28 unneback 
<!-- Copyright (C) 2003 Red Hat, Inc.                                -->
2 
<!-- This material may be distributed only subject to the terms      -->
3 
<!-- and conditions set forth in the Open Publication License, v1.0  -->
4 
<!-- or later (the latest version is presently available at          -->
5 
<!-- http://www.opencontent.org/openpub/).                           -->
6 
<!-- Distribution of the work or derivative of the work in any       -->
7 
<!-- standard (paper) book form is prohibited unless prior           -->
8 
<!-- permission is obtained from the copyright holder.               -->
9 
<HTML
10 
><HEAD
11 
><TITLE
12 
>Target Setup</TITLE
13 
><meta name="MSSmartTagsPreventParsing" content="TRUE">
14 
<META
15 
NAME="GENERATOR"
16 
CONTENT="Modular DocBook HTML Stylesheet Version 1.76b+
17 
"><LINK
18 
REL="HOME"
19 
TITLE="eCos User Guide"
20 
HREF="ecos-user-guide.html"><LINK
21 
REL="UP"
22 
TITLE="Appendixes"
23 
HREF="appendices.html"><LINK
24 
REL="PREVIOUS"
25 
TITLE="Appendixes"
26 
HREF="appendices.html"><LINK
27 
REL="NEXT"
28 
TITLE="MN10300 Architectural Simulator Setup"
29 
HREF="setup-mn10300-sim.html"></HEAD
30 
><BODY
31 
CLASS="APPENDIX"
32 
BGCOLOR="#FFFFFF"
33 
TEXT="#000000"
34 
LINK="#0000FF"
35 
VLINK="#840084"
36 
ALINK="#0000FF"
37 
><DIV
38 
CLASS="NAVHEADER"
39 
><TABLE
40 
SUMMARY="Header navigation table"
41 
WIDTH="100%"
42 
BORDER="0"
43 
CELLPADDING="0"
44 
CELLSPACING="0"
45 
><TR
46 
><TH
47 
COLSPAN="3"
48 
ALIGN="center"
49 
>eCos User Guide</TH
50 
></TR
51 
><TR
52 
><TD
53 
WIDTH="10%"
54 
ALIGN="left"
55 
VALIGN="bottom"
56 
><A
57 
HREF="appendices.html"
58 
ACCESSKEY="P"
59 
>Prev</A
60 
></TD
61 
><TD
62 
WIDTH="80%"
63 
ALIGN="center"
64 
VALIGN="bottom"
65 
></TD
66 
><TD
67 
WIDTH="10%"
68 
ALIGN="right"
69 
VALIGN="bottom"
70 
><A
71 
HREF="setup-mn10300-sim.html"
72 
ACCESSKEY="N"
73 
>Next</A
74 
></TD
75 
></TR
76 
></TABLE
77 
><HR
78 
ALIGN="LEFT"
79 
WIDTH="100%"></DIV
80 
><DIV
81 
CLASS="APPENDIX"
82 
><H1
83 
><A
84 
NAME="APPENDIX-TARGET-SETUP">Appendix A. Target Setup</H1
85 
><DIV
86 
CLASS="TOC"
87 
><DL
88 
><DT
89 
><B
90 
>Table of Contents</B
91 
></DT
92 
><DT
93 
><A
94 
HREF="appendix-target-setup.html#SETUP-MN10300-STDEVAL1"
95 
>MN10300 stdeval1 Hardware Setup</A
96 
></DT
97 
><DT
98 
><A
99 
HREF="setup-mn10300-sim.html"
100 
>MN10300 Architectural Simulator Setup</A
101 
></DT
102 
><DT
103 
><A
104 
HREF="setup-am33-stb.html"
105 
>AM33 STB Hardware Setup</A
106 
></DT
107 
><DT
108 
><A
109 
HREF="setup-tx39-jmr3904.html"
110 
>TX39 Hardware Setup</A
111 
></DT
112 
><DT
113 
><A
114 
HREF="setup-tx39-sim.html"
115 
>TX39 Architectural Simulator Setup</A
116 
></DT
117 
><DT
118 
><A
119 
HREF="setup-tx49-ref4955.html"
120 
>TX49 Hardware Setup</A
121 
></DT
122 
><DT
123 
><A
124 
HREF="setup-vr4300-vrc4373.html"
125 
>VR4300 Hardware Setup</A
126 
></DT
127 
><DT
128 
><A
129 
HREF="setup-vr4300-vrc4375.html"
130 
>VRC4375 Hardware Setup</A
131 
></DT
132 
><DT
133 
><A
134 
HREF="setup-mips-atlasmalta.html"
135 
>Atlas/Malta Hardware Setup</A
136 
></DT
137 
><DT
138 
><A
139 
HREF="setup-ppc-cogent.html"
140 
>PowerPC Cogent Hardware Setup</A
141 
></DT
142 
><DT
143 
><A
144 
HREF="setup-ppc-mbx860.html"
145 
>PowerPC MBX860 Hardware Setup</A
146 
></DT
147 
><DT
148 
><A
149 
HREF="setup-ppc-sim.html"
150 
>PowerPC Architectural Simulator Setup</A
151 
></DT
152 
><DT
153 
><A
154 
HREF="setup-sparclite-sleb.html"
155 
>SPARClite Hardware Setup</A
156 
></DT
157 
><DT
158 
><A
159 
HREF="setup-sparclite-sim.html"
160 
>SPARClite Architectural Simulator Setup</A
161 
></DT
162 
><DT
163 
><A
164 
HREF="setup-arm-pid.html"
165 
>ARM PID Hardware Setup</A
166 
></DT
167 
><DT
168 
><A
169 
HREF="setup-arm-aeb1.html"
170 
>ARM AEB-1 Hardware Setup</A
171 
></DT
172 
><DT
173 
><A
174 
HREF="setup-arm-cma230.html"
175 
>ARM Cogent CMA230 Hardware Setup</A
176 
></DT
177 
><DT
178 
><A
179 
HREF="setup-arm-ep7211.html"
180 
>Cirrus Logic ARM EP7211 Development
181 
Board Hardware Setup</A
182 
></DT
183 
><DT
184 
><A
185 
HREF="setup-arm-ep7212.html"
186 
>Cirrus Logic ARM EP7212 Development Board
187 
Hardware Setup</A
188 
></DT
189 
><DT
190 
><A
191 
HREF="setup-arm-ep7312.html"
192 
>Cirrus Logic ARM EP7312 Development Board
193 
Hardware Setup</A
194 
></DT
195 
><DT
196 
><A
197 
HREF="setup-arm-ep7209.html"
198 
>Cirrus Logic ARM EP7209 Development Board Hardware Setup</A
199 
></DT
200 
><DT
201 
><A
202 
HREF="setup-arm-clps7111.html"
203 
>Cirrus Logic ARM CL-PS7111 Evaluation Board Hardware Setup</A
204 
></DT
205 
><DT
206 
><A
207 
HREF="setup-arm-ebsa285.html"
208 
>StrongARM EBSA-285 Hardware Setup</A
209 
></DT
210 
><DT
211 
><A
212 
HREF="setup-arm-ipaq.html"
213 
>Compaq iPAQ PocketPC Hardware Setup</A
214 
></DT
215 
><DT
216 
><A
217 
HREF="setup-sh-edk7708.html"
218 
>SH3/EDK7708 Hardware Setup</A
219 
></DT
220 
><DT
221 
><A
222 
HREF="setup-sh-cq7708.html"
223 
>SH3/CQ7708 Hardware Setup</A
224 
></DT
225 
><DT
226 
><A
227 
HREF="setup-sh-hs7729pci.html"
228 
>SH3/HS7729PCI Hardware Setup</A
229 
></DT
230 
><DT
231 
><A
232 
HREF="setup-sh-se77x9.html"
233 
>SH3/SE77x9 Hardware Setup</A
234 
></DT
235 
><DT
236 
><A
237 
HREF="setup-sh-cq7750.html"
238 
>SH4/CQ7750 Hardware Setup</A
239 
></DT
240 
><DT
241 
><A
242 
HREF="setup-sh-se7751.html"
243 
>SH4/SE7751 Hardware Setup</A
244 
></DT
245 
><DT
246 
><A
247 
HREF="setup-v850-cebsa1.html"
248 
>NEC CEB-V850/SA1 Hardware Setup</A
249 
></DT
250 
><DT
251 
><A
252 
HREF="setup-v850-cebsb1.html"
253 
>NEC CEB-V850/SB1 Hardware Setup</A
254 
></DT
255 
><DT
256 
><A
257 
HREF="setup-i386-pc.html"
258 
>i386 PC Hardware Setup</A
259 
></DT
260 
><DT
261 
><A
262 
HREF="setup-synth-i386linux.html"
263 
>i386/Linux Synthetic Target Setup</A
264 
></DT
265 
></DL
266 
></DIV
267 
><P
268 
>The following sections detail the setup of many of the targets
269 
supported by eCos. </P
270 
><DIV
271 
CLASS="CAUTION"
272 
><P
273 
></P
274 
><TABLE
275 
CLASS="CAUTION"
276 
BORDER="1"
277 
WIDTH="100%"
278 
><TR
279 
><TD
280 
ALIGN="CENTER"
281 
><B
282 
>Caution</B
283 
></TD
284 
></TR
285 
><TR
286 
><TD
287 
ALIGN="LEFT"
288 
><P
289 
>This information is presented here only temporarily. It is intended
290 
that there will be separate documents detailing this information for
291 
each target in future releases. Consequently not much effort has been
292 
put into bringing the following documentation up to date -- much of it
293 
is obsolete, bogus or just plain wrong.</P
294 
></TD
295 
></TR
296 
></TABLE
297 
></DIV
298 
><DIV
299 
CLASS="SECT1"
300 
><H1
301 
CLASS="SECT1"
302 
><A
303 
NAME="SETUP-MN10300-STDEVAL1">MN10300 stdeval1 Hardware Setup</H1
304 
><P
305 
>The eCos Developer&#8217;s Kit package comes with a pair
306 
of EPROMs which provide GDB support for the Matsushita MN10300 (AM31)
307 
series evaluation board using CygMon, the Cygnus ROM monitor. Images
308 
of these EPROMs are also provided at <TT
309 
CLASS="FILENAME"
310 
>BASE_DIR/loaders/mn10300-stdeval1/cygmon.bin</TT
311 
>.
312 
The LSB EPROM (LROM) is installed to socket IC8 on the board and
313 
the MSB EPROM (UROM) is installed to socket IC9. Attention should
314 
be paid to the correct orientation of these EPROMs during installation.</P
315 
><P
316 
>The CygMon stubs allows communication with GDB by way of the
317 
serial port at connector CN2. The communication parameters are fixed
318 
at 38400 baud, 8 data bits, no parity bit, and 1 stop bit (8-N-1).
319 
No flow control is employed. Connection to the host computer should
320 
be made using a standard RS232C serial cable (not a null modem cable).
321 
A gender changer may also be required.</P
322 
></DIV
323 
></DIV
324 
><DIV
325 
CLASS="NAVFOOTER"
326 
><HR
327 
ALIGN="LEFT"
328 
WIDTH="100%"><TABLE
329 
SUMMARY="Footer navigation table"
330 
WIDTH="100%"
331 
BORDER="0"
332 
CELLPADDING="0"
333 
CELLSPACING="0"
334 
><TR
335 
><TD
336 
WIDTH="33%"
337 
ALIGN="left"
338 
VALIGN="top"
339 
><A
340 
HREF="appendices.html"
341 
ACCESSKEY="P"
342 
>Prev</A
343 
></TD
344 
><TD
345 
WIDTH="34%"
346 
ALIGN="center"
347 
VALIGN="top"
348 
><A
349 
HREF="ecos-user-guide.html"
350 
ACCESSKEY="H"
351 
>Home</A
352 
></TD
353 
><TD
354 
WIDTH="33%"
355 
ALIGN="right"
356 
VALIGN="top"
357 
><A
358 
HREF="setup-mn10300-sim.html"
359 
ACCESSKEY="N"
360 
>Next</A
361 
></TD
362 
></TR
363 
><TR
364 
><TD
365 
WIDTH="33%"
366 
ALIGN="left"
367 
VALIGN="top"
368 
>Appendixes</TD
369 
><TD
370 
WIDTH="34%"
371 
ALIGN="center"
372 
VALIGN="top"
373 
><A
374 
HREF="appendices.html"
375 
ACCESSKEY="U"
376 
>Up</A
377 
></TD
378 
><TD
379 
WIDTH="33%"
380 
ALIGN="right"
381 
VALIGN="top"
382 
>MN10300 Architectural Simulator Setup</TD
383 
></TR
384 
></TABLE
385 
></DIV
386 
></BODY
387 
></HTML
388 
>

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.