URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [doc/] [html/] [user-guide/] [rt-tx39-jmr3904.html] - Blame information for rev 588

Go to most recent revision | Details | Compare with Previous | View Log


<!-- Copyright (C) 2003 Red Hat, Inc.                                -->
<!-- This material may be distributed only subject to the terms      -->
<!-- and conditions set forth in the Open Publication License, v1.0  -->
<!-- or later (the latest version is presently available at          -->
<!-- http://www.opencontent.org/openpub/).                           -->
<!-- Distribution of the work or derivative of the work in any       -->
<!-- standard (paper) book form is prohibited unless prior           -->
<!-- permission is obtained from the copyright holder.               -->
<HTML
><HEAD
><TITLE
>Board: Toshiba JMR3904 Evaluation Board</TITLE
><meta name="MSSmartTagsPreventParsing" content="TRUE">
<META
NAME="GENERATOR"
CONTENT="Modular DocBook HTML Stylesheet Version 1.76b+
"><LINK
REL="HOME"
TITLE="eCos User Guide"
HREF="ecos-user-guide.html"><LINK
REL="UP"
TITLE="Real-time characterization"
HREF="real-time-characterization.html"><LINK
REL="PREVIOUS"
TITLE="Board: Intel IQ80310 XScale Development Kit"
HREF="rt-arm-iq80310.html"><LINK
REL="NEXT"
TITLE="Board: Toshiba REF 4955"
HREF="rt-tx49-ref4955.html"></HEAD
><BODY
CLASS="SECT1"
BGCOLOR="#FFFFFF"
TEXT="#000000"
LINK="#0000FF"
VLINK="#840084"
ALINK="#0000FF"
><DIV
CLASS="NAVHEADER"
><TABLE
SUMMARY="Header navigation table"
WIDTH="100%"
BORDER="0"
CELLPADDING="0"
CELLSPACING="0"
><TR
><TH
COLSPAN="3"
ALIGN="center"
>eCos User Guide</TH
></TR
><TR
><TD
WIDTH="10%"
ALIGN="left"
VALIGN="bottom"
><A
HREF="rt-arm-iq80310.html"
ACCESSKEY="P"
>Prev</A
></TD
><TD
WIDTH="80%"
ALIGN="center"
VALIGN="bottom"
>Appendix B. Real-time characterization</TD
><TD
WIDTH="10%"
ALIGN="right"
VALIGN="bottom"
><A
HREF="rt-tx49-ref4955.html"
ACCESSKEY="N"
>Next</A
></TD
></TR
></TABLE
><HR
ALIGN="LEFT"
WIDTH="100%"></DIV
><DIV
CLASS="SECT1"
><H1
CLASS="SECT1"
><A
NAME="RT-TX39-JMR3904">Board: Toshiba JMR3904 Evaluation Board</H1
><TABLE
BORDER="5"
BGCOLOR="#E0E0F0"
WIDTH="70%"
><TR
><TD
><PRE
CLASS="LITERALLAYOUT"
>&#13;Board: Toshiba JMR3904 Evaluation Board
 
CPU  : TMPR3904F 50MHz
 
 
eCOS Kernel Timings
Note: all times are in microseconds (.000001) unless otherwise stated
 
Reading the hardware clock takes 0 'ticks' overhead
... this value will be factored out of all other measurements
Clock interrupt took   29.68 microseconds (45 raw clock ticks)
 
Testing parameters:
   Clock samples:          32
   Threads:                24
   Thread switches:       128
   Mutexes:                32
   Mailboxes:              32
   Semaphores:             32
   Scheduler operations:  128
   Counters:               32
   Alarms:                 32
 
 
                                 Confidence
     Ave     Min     Max     Var  Ave  Min  Function
  ======  ======  ======  ====== ========== ========
   13.62   11.72   27.99    1.51   79%  54% Create thread
    2.77    2.60    3.91    0.26   79%  79% Yield thread [all suspended]
    3.31    2.60    6.51    0.27   83%  12% Suspend [suspended] thread
    2.58    1.95    7.81    0.47   58%  37% Resume thread
    4.94    4.56   11.07    0.60   95%  79% Set priority
    0.71    0.65    1.95    0.10   95%  95% Get priority
   14.97   14.32   25.39    0.87   95%  95% Kill [suspended] thread
    2.25    1.95    9.11    0.57   95%  95% Yield [no other] thread
    7.27    6.51   12.37    0.42   79%  16% Resume [suspended low prio] thread
    2.28    1.95    7.16    0.51   95%  79% Resume [runnable low prio] thread
    4.31    3.26   12.37    0.75   87%  79% Suspend [runnable] thread
    2.17    1.95    7.16    0.42   95%  95% Yield [only low prio] thread
    2.39    1.95    6.51    0.51   95%  58% Suspend [runnable-&#62;not runnable]
   13.43   12.37   22.79    0.80   91%  91% Kill [runnable] thread
   22.30   20.83   37.76    1.76   91%  91% Resume [high priority] thread
    4.62    4.56   11.07    0.13   98%  98% Thread switch
 
    1.51    1.30    2.60    0.29   68%  68% Scheduler lock
    2.36    1.95    3.26    0.31   61%  37% Scheduler unlock [0 threads]
    2.39    1.95    5.21    0.32   62%  36% Scheduler unlock [1 suspended]
    2.38    1.95    4.56    0.32   61%  37% Scheduler unlock [many suspended]
    2.38    1.95    5.21    0.32   61%  37% Scheduler unlock [many low prio]
 
    0.90    0.65    3.26    0.35   71%  71% Init mutex
    2.48    1.95    8.46    0.50   50%  46% Lock [unlocked] mutex
    2.83    2.60    9.11    0.42   93%  93% Unlock [locked] mutex
    2.30    1.95    6.51    0.45   96%  65% Trylock [unlocked] mutex
    1.99    1.30    5.86    0.24   84%  12% Trylock [locked] mutex
    0.04    0.00    1.30    0.08   96%  96% Destroy mutex
   42.40   42.32   44.92    0.16   96%  96% Unlock/Lock mutex
 
    1.44    1.30    5.86    0.28   96%  96% Create mbox
    0.51    0.00    1.30    0.25   71%  25% Peek [empty] mbox
    2.93    2.60    9.11    0.51   96%  78% Put [first] mbox
    0.51    0.00    1.30    0.25   71%  25% Peek [1 msg] mbox
    4.19    3.91    5.21    0.34   59%  59% Put [second] mbox
    0.45    0.00    0.65    0.28   68%  31% Peek [2 msgs] mbox
    3.28    2.60   10.42    0.45   65%  31% Get [first] mbox
    3.34    2.60    9.77    0.40   78%  18% Get [second] mbox
    2.69    1.95    9.11    0.40   78%  18% Tryput [first] mbox
    2.75    1.95    7.81    0.32   93%   3% Peek item [non-empty] mbox
    3.15    2.60    9.11    0.48   53%  43% Tryget [non-empty] mbox
    2.22    1.95    6.51    0.41   96%  78% Peek item [empty] mbox
    2.40    1.95    5.86    0.42   50%  46% Tryget [empty] mbox
    0.47    0.00    0.65    0.26   71%  28% Waiting to get mbox
    0.59    0.00    1.30    0.15   84%  12% Waiting to put mbox
    4.01    3.26   10.42    0.40   81%  15% Delete mbox
   26.18   26.04   30.60    0.28   96%  96% Put/Get mbox
 
    0.92    0.65    3.91    0.38   71%  71% Init semaphore
    2.24    1.95    6.51    0.43   96%  75% Post [0] semaphore
    2.32    1.95    7.16    0.48   96%  65% Wait [1] semaphore
    2.03    1.30    5.86    0.24   90%   6% Trywait [0] semaphore
    1.91    1.30    4.56    0.23   78%  18% Trywait [1] semaphore
    0.77    0.00    1.95    0.30   65%   9% Peek semaphore
    0.61    0.00    1.95    0.15   84%  12% Destroy semaphore
   22.62   22.14   30.60    0.61   96%  62% Post/Wait semaphore
 
    0.92    0.65    3.91    0.38   71%  71% Create counter
    0.69    0.65    1.95    0.08   96%  96% Get counter value
    0.41    0.00    1.30    0.33   56%  40% Set counter value
    3.21    2.60    5.86    0.27   71%  21% Tick counter
    0.65    0.00    3.26    0.16   84%  12% Delete counter
 
    1.57    1.30    4.56    0.38   71%  71% Create alarm
    4.52    3.91   13.02    0.57   50%  46% Initialize alarm
    0.61    0.00    1.95    0.15   84%  12% Disable alarm
    4.43    3.91    9.11    0.43   56%  40% Enable alarm
    0.87    0.65    2.60    0.32   71%  71% Delete alarm
    2.93    2.60    6.51    0.43   96%  65% Tick counter [1 alarm]
   14.83   14.32   22.79    0.60   96%  59% Tick counter [many alarms]
    4.88    4.56   11.07    0.51   96%  78% Tick &#38; fire counter [1 alarm]
   83.25   82.03  102.86    1.23   96%  93% Tick &#38; fire counters [&#62;1 together]
   17.58   16.93   27.34    0.61   50%  46% Tick &#38; fire counters [&#62;1 separately]
   26.18   24.74   40.36    0.30   97%   0% Alarm latency [0 threads]
   33.88   29.30   56.64    1.70   85%   6% Alarm latency [2 threads]
   36.37   29.30   61.20    3.25   53%  24% Alarm latency [many threads]
 
    7.85    6.51   14.97    0.00            Clock/interrupt latency
 
Timing complete - 23540 ms total
 
PASS:&lt;Basic timing OK&#62;
EXIT:&lt;done&#62;
 
        </PRE
></TD
></TR
></TABLE
></DIV
><DIV
CLASS="NAVFOOTER"
><HR
ALIGN="LEFT"
WIDTH="100%"><TABLE
SUMMARY="Footer navigation table"
WIDTH="100%"
BORDER="0"
CELLPADDING="0"
CELLSPACING="0"
><TR
><TD
WIDTH="33%"
ALIGN="left"
VALIGN="top"
><A
HREF="rt-arm-iq80310.html"
ACCESSKEY="P"
>Prev</A
></TD
><TD
WIDTH="34%"
ALIGN="center"
VALIGN="top"
><A
HREF="ecos-user-guide.html"
ACCESSKEY="H"
>Home</A
></TD
><TD
WIDTH="33%"
ALIGN="right"
VALIGN="top"
><A
HREF="rt-tx49-ref4955.html"
ACCESSKEY="N"
>Next</A
></TD
></TR
><TR
><TD
WIDTH="33%"
ALIGN="left"
VALIGN="top"
>Board: Intel IQ80310 XScale Development Kit</TD
><TD
WIDTH="34%"
ALIGN="center"
VALIGN="top"
><A
HREF="real-time-characterization.html"
ACCESSKEY="U"
>Up</A
></TD
><TD
WIDTH="33%"
ALIGN="right"
VALIGN="top"
>Board: Toshiba REF 4955</TD
></TR
></TABLE
></DIV
></BODY
></HTML
>

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [doc/] [html/] [user-guide/] [rt-tx39-jmr3904.html] - Blame information for rev 588

Line No.	Rev	Author	Line
1	28	unneback	`<!-- Copyright (C) 2003 Red Hat, Inc. -->`
2			`<!-- This material may be distributed only subject to the terms -->`
3			`<!-- and conditions set forth in the Open Publication License, v1.0 -->`
4			`<!-- or later (the latest version is presently available at -->`
5			`<!-- http://www.opencontent.org/openpub/). -->`
6			`<!-- Distribution of the work or derivative of the work in any -->`
7			`<!-- standard (paper) book form is prohibited unless prior -->`
8			`<!-- permission is obtained from the copyright holder. -->`
9			`<HTML`
10			`><HEAD`
11			`><TITLE`
12			`>Board: Toshiba JMR3904 Evaluation Board</TITLE`
13			`><meta name="MSSmartTagsPreventParsing" content="TRUE">`
14			`<META`
15			`NAME="GENERATOR"`
16			`CONTENT="Modular DocBook HTML Stylesheet Version 1.76b+`
17			`"><LINK`
18			`REL="HOME"`
19			`TITLE="eCos User Guide"`
20			`HREF="ecos-user-guide.html"><LINK`
21			`REL="UP"`
22			`TITLE="Real-time characterization"`
23			`HREF="real-time-characterization.html"><LINK`
24			`REL="PREVIOUS"`
25			`TITLE="Board: Intel IQ80310 XScale Development Kit"`
26			`HREF="rt-arm-iq80310.html"><LINK`
27			`REL="NEXT"`
28			`TITLE="Board: Toshiba REF 4955"`
29			`HREF="rt-tx49-ref4955.html"></HEAD`
30			`><BODY`
31			`CLASS="SECT1"`
32			`BGCOLOR="#FFFFFF"`
33			`TEXT="#000000"`
34			`LINK="#0000FF"`
35			`VLINK="#840084"`
36			`ALINK="#0000FF"`
37			`><DIV`
38			`CLASS="NAVHEADER"`
39			`><TABLE`
40			`SUMMARY="Header navigation table"`
41			`WIDTH="100%"`
42			`BORDER="0"`
43			`CELLPADDING="0"`
44			`CELLSPACING="0"`
45			`><TR`
46			`><TH`
47			`COLSPAN="3"`
48			`ALIGN="center"`
49			`>eCos User Guide</TH`
50			`></TR`
51			`><TR`
52			`><TD`
53			`WIDTH="10%"`
54			`ALIGN="left"`
55			`VALIGN="bottom"`
56			`><A`
57			`HREF="rt-arm-iq80310.html"`
58			`ACCESSKEY="P"`
59			`>Prev</A`
60			`></TD`
61			`><TD`
62			`WIDTH="80%"`
63			`ALIGN="center"`
64			`VALIGN="bottom"`
65			`>Appendix B. Real-time characterization</TD`
66			`><TD`
67			`WIDTH="10%"`
68			`ALIGN="right"`
69			`VALIGN="bottom"`
70			`><A`
71			`HREF="rt-tx49-ref4955.html"`
72			`ACCESSKEY="N"`
73			`>Next</A`
74			`></TD`
75			`></TR`
76			`></TABLE`
77			`><HR`
78			`ALIGN="LEFT"`
79			`WIDTH="100%"></DIV`
80			`><DIV`
81			`CLASS="SECT1"`
82			`><H1`
83			`CLASS="SECT1"`
84			`><A`
85			`NAME="RT-TX39-JMR3904">Board: Toshiba JMR3904 Evaluation Board</H1`
86			`><TABLE`
87			`BORDER="5"`
88			`BGCOLOR="#E0E0F0"`
89			`WIDTH="70%"`
90			`><TR`
91			`><TD`
92			`><PRE`
93			`CLASS="LITERALLAYOUT"`
94			`> Board: Toshiba JMR3904 Evaluation Board`
95
96			`CPU : TMPR3904F 50MHz`
97
98
99			`eCOS Kernel Timings`
100			`Note: all times are in microseconds (.000001) unless otherwise stated`
101
102			`Reading the hardware clock takes 0 'ticks' overhead`
103			`... this value will be factored out of all other measurements`
104			`Clock interrupt took 29.68 microseconds (45 raw clock ticks)`
105
106			`Testing parameters:`
107			`Clock samples: 32`
108			`Threads: 24`
109			`Thread switches: 128`
110			`Mutexes: 32`
111			`Mailboxes: 32`
112			`Semaphores: 32`
113			`Scheduler operations: 128`
114			`Counters: 32`
115			`Alarms: 32`
116
117
118			`Confidence`
119			`Ave Min Max Var Ave Min Function`
120			`====== ====== ====== ====== ========== ========`
121			`13.62 11.72 27.99 1.51 79% 54% Create thread`
122			`2.77 2.60 3.91 0.26 79% 79% Yield thread [all suspended]`
123			`3.31 2.60 6.51 0.27 83% 12% Suspend [suspended] thread`
124			`2.58 1.95 7.81 0.47 58% 37% Resume thread`
125			`4.94 4.56 11.07 0.60 95% 79% Set priority`
126			`0.71 0.65 1.95 0.10 95% 95% Get priority`
127			`14.97 14.32 25.39 0.87 95% 95% Kill [suspended] thread`
128			`2.25 1.95 9.11 0.57 95% 95% Yield [no other] thread`
129			`7.27 6.51 12.37 0.42 79% 16% Resume [suspended low prio] thread`
130			`2.28 1.95 7.16 0.51 95% 79% Resume [runnable low prio] thread`
131			`4.31 3.26 12.37 0.75 87% 79% Suspend [runnable] thread`
132			`2.17 1.95 7.16 0.42 95% 95% Yield [only low prio] thread`
133			`2.39 1.95 6.51 0.51 95% 58% Suspend [runnable->not runnable]`
134			`13.43 12.37 22.79 0.80 91% 91% Kill [runnable] thread`
135			`22.30 20.83 37.76 1.76 91% 91% Resume [high priority] thread`
136			`4.62 4.56 11.07 0.13 98% 98% Thread switch`
137
138			`1.51 1.30 2.60 0.29 68% 68% Scheduler lock`
139			`2.36 1.95 3.26 0.31 61% 37% Scheduler unlock [0 threads]`
140			`2.39 1.95 5.21 0.32 62% 36% Scheduler unlock [1 suspended]`
141			`2.38 1.95 4.56 0.32 61% 37% Scheduler unlock [many suspended]`
142			`2.38 1.95 5.21 0.32 61% 37% Scheduler unlock [many low prio]`
143
144			`0.90 0.65 3.26 0.35 71% 71% Init mutex`
145			`2.48 1.95 8.46 0.50 50% 46% Lock [unlocked] mutex`
146			`2.83 2.60 9.11 0.42 93% 93% Unlock [locked] mutex`
147			`2.30 1.95 6.51 0.45 96% 65% Trylock [unlocked] mutex`
148			`1.99 1.30 5.86 0.24 84% 12% Trylock [locked] mutex`
149			`0.04 0.00 1.30 0.08 96% 96% Destroy mutex`
150			`42.40 42.32 44.92 0.16 96% 96% Unlock/Lock mutex`
151
152			`1.44 1.30 5.86 0.28 96% 96% Create mbox`
153			`0.51 0.00 1.30 0.25 71% 25% Peek [empty] mbox`
154			`2.93 2.60 9.11 0.51 96% 78% Put [first] mbox`
155			`0.51 0.00 1.30 0.25 71% 25% Peek [1 msg] mbox`
156			`4.19 3.91 5.21 0.34 59% 59% Put [second] mbox`
157			`0.45 0.00 0.65 0.28 68% 31% Peek [2 msgs] mbox`
158			`3.28 2.60 10.42 0.45 65% 31% Get [first] mbox`
159			`3.34 2.60 9.77 0.40 78% 18% Get [second] mbox`
160			`2.69 1.95 9.11 0.40 78% 18% Tryput [first] mbox`
161			`2.75 1.95 7.81 0.32 93% 3% Peek item [non-empty] mbox`
162			`3.15 2.60 9.11 0.48 53% 43% Tryget [non-empty] mbox`
163			`2.22 1.95 6.51 0.41 96% 78% Peek item [empty] mbox`
164			`2.40 1.95 5.86 0.42 50% 46% Tryget [empty] mbox`
165			`0.47 0.00 0.65 0.26 71% 28% Waiting to get mbox`
166			`0.59 0.00 1.30 0.15 84% 12% Waiting to put mbox`
167			`4.01 3.26 10.42 0.40 81% 15% Delete mbox`
168			`26.18 26.04 30.60 0.28 96% 96% Put/Get mbox`
169
170			`0.92 0.65 3.91 0.38 71% 71% Init semaphore`
171			`2.24 1.95 6.51 0.43 96% 75% Post [0] semaphore`
172			`2.32 1.95 7.16 0.48 96% 65% Wait [1] semaphore`
173			`2.03 1.30 5.86 0.24 90% 6% Trywait [0] semaphore`
174			`1.91 1.30 4.56 0.23 78% 18% Trywait [1] semaphore`
175			`0.77 0.00 1.95 0.30 65% 9% Peek semaphore`
176			`0.61 0.00 1.95 0.15 84% 12% Destroy semaphore`
177			`22.62 22.14 30.60 0.61 96% 62% Post/Wait semaphore`
178
179			`0.92 0.65 3.91 0.38 71% 71% Create counter`
180			`0.69 0.65 1.95 0.08 96% 96% Get counter value`
181			`0.41 0.00 1.30 0.33 56% 40% Set counter value`
182			`3.21 2.60 5.86 0.27 71% 21% Tick counter`
183			`0.65 0.00 3.26 0.16 84% 12% Delete counter`
184
185			`1.57 1.30 4.56 0.38 71% 71% Create alarm`
186			`4.52 3.91 13.02 0.57 50% 46% Initialize alarm`
187			`0.61 0.00 1.95 0.15 84% 12% Disable alarm`
188			`4.43 3.91 9.11 0.43 56% 40% Enable alarm`
189			`0.87 0.65 2.60 0.32 71% 71% Delete alarm`
190			`2.93 2.60 6.51 0.43 96% 65% Tick counter [1 alarm]`
191			`14.83 14.32 22.79 0.60 96% 59% Tick counter [many alarms]`
192			`4.88 4.56 11.07 0.51 96% 78% Tick & fire counter [1 alarm]`
193			`83.25 82.03 102.86 1.23 96% 93% Tick & fire counters [>1 together]`
194			`17.58 16.93 27.34 0.61 50% 46% Tick & fire counters [>1 separately]`
195			`26.18 24.74 40.36 0.30 97% 0% Alarm latency [0 threads]`
196			`33.88 29.30 56.64 1.70 85% 6% Alarm latency [2 threads]`
197			`36.37 29.30 61.20 3.25 53% 24% Alarm latency [many threads]`
198
199			`7.85 6.51 14.97 0.00 Clock/interrupt latency`
200
201			`Timing complete - 23540 ms total`
202
203			`PASS:<Basic timing OK>`
204			`EXIT:<done>`
205
206			`</PRE`
207			`></TD`
208			`></TR`
209			`></TABLE`
210			`></DIV`
211			`><DIV`
212			`CLASS="NAVFOOTER"`
213			`><HR`
214			`ALIGN="LEFT"`
215			`WIDTH="100%"><TABLE`
216			`SUMMARY="Footer navigation table"`
217			`WIDTH="100%"`
218			`BORDER="0"`
219			`CELLPADDING="0"`
220			`CELLSPACING="0"`
221			`><TR`
222			`><TD`
223			`WIDTH="33%"`
224			`ALIGN="left"`
225			`VALIGN="top"`
226			`><A`
227			`HREF="rt-arm-iq80310.html"`
228			`ACCESSKEY="P"`
229			`>Prev</A`
230			`></TD`
231			`><TD`
232			`WIDTH="34%"`
233			`ALIGN="center"`
234			`VALIGN="top"`
235			`><A`
236			`HREF="ecos-user-guide.html"`
237			`ACCESSKEY="H"`
238			`>Home</A`
239			`></TD`
240			`><TD`
241			`WIDTH="33%"`
242			`ALIGN="right"`
243			`VALIGN="top"`
244			`><A`
245			`HREF="rt-tx49-ref4955.html"`
246			`ACCESSKEY="N"`
247			`>Next</A`
248			`></TD`
249			`></TR`
250			`><TR`
251			`><TD`
252			`WIDTH="33%"`
253			`ALIGN="left"`
254			`VALIGN="top"`
255			`>Board: Intel IQ80310 XScale Development Kit</TD`
256			`><TD`
257			`WIDTH="34%"`
258			`ALIGN="center"`
259			`VALIGN="top"`
260			`><A`
261			`HREF="real-time-characterization.html"`
262			`ACCESSKEY="U"`
263			`>Up</A`
264			`></TD`
265			`><TD`
266			`WIDTH="33%"`
267			`ALIGN="right"`
268			`VALIGN="top"`
269			`>Board: Toshiba REF 4955</TD`
270			`></TR`
271			`></TABLE`
272			`></DIV`
273			`></BODY`
274			`></HTML`
275			`>`