URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [doc/] [html/] [user-guide/] [setup-tx39-jmr3904.html] - Blame information for rev 578

Go to most recent revision | Details | Compare with Previous | View Log


<!-- Copyright (C) 2003 Red Hat, Inc.                                -->
<!-- This material may be distributed only subject to the terms      -->
<!-- and conditions set forth in the Open Publication License, v1.0  -->
<!-- or later (the latest version is presently available at          -->
<!-- http://www.opencontent.org/openpub/).                           -->
<!-- Distribution of the work or derivative of the work in any       -->
<!-- standard (paper) book form is prohibited unless prior           -->
<!-- permission is obtained from the copyright holder.               -->
<HTML
><HEAD
><TITLE
>TX39 Hardware Setup</TITLE
><meta name="MSSmartTagsPreventParsing" content="TRUE">
<META
NAME="GENERATOR"
CONTENT="Modular DocBook HTML Stylesheet Version 1.76b+
"><LINK
REL="HOME"
TITLE="eCos User Guide"
HREF="ecos-user-guide.html"><LINK
REL="UP"
TITLE="Target Setup"
HREF="appendix-target-setup.html"><LINK
REL="PREVIOUS"
TITLE="AM33 STB Hardware Setup"
HREF="setup-am33-stb.html"><LINK
REL="NEXT"
TITLE="TX39 Architectural Simulator Setup"
HREF="setup-tx39-sim.html"></HEAD
><BODY
CLASS="SECT1"
BGCOLOR="#FFFFFF"
TEXT="#000000"
LINK="#0000FF"
VLINK="#840084"
ALINK="#0000FF"
><DIV
CLASS="NAVHEADER"
><TABLE
SUMMARY="Header navigation table"
WIDTH="100%"
BORDER="0"
CELLPADDING="0"
CELLSPACING="0"
><TR
><TH
COLSPAN="3"
ALIGN="center"
>eCos User Guide</TH
></TR
><TR
><TD
WIDTH="10%"
ALIGN="left"
VALIGN="bottom"
><A
HREF="setup-am33-stb.html"
ACCESSKEY="P"
>Prev</A
></TD
><TD
WIDTH="80%"
ALIGN="center"
VALIGN="bottom"
>Appendix A. Target Setup</TD
><TD
WIDTH="10%"
ALIGN="right"
VALIGN="bottom"
><A
HREF="setup-tx39-sim.html"
ACCESSKEY="N"
>Next</A
></TD
></TR
></TABLE
><HR
ALIGN="LEFT"
WIDTH="100%"></DIV
><DIV
CLASS="SECT1"
><H1
CLASS="SECT1"
><A
NAME="SETUP-TX39-JMR3904">TX39 Hardware Setup</H1
><P
>The eCos Developer&#8217;s Kit package comes with a pair
of ROMs that provide GDB support for
the Toshiba JMR-TX3904 RISC processor reference board by way of CygMon. </P
><P
>Images of these ROMs are also provided at <TT
CLASS="FILENAME"
>BASE_DIR/loaders/tx39-jmr3904/cygmon50.bin</TT
> and <TT
CLASS="FILENAME"
>BASE_DIR/loaders/tx39-jmr3904/cygmon66.bin</TT
> for
50 MHz and 66 MHz boards respectively. The ROMs are installed to
sockets IC6 and IC7 on the memory daughterboard according to their
labels. Attention should be paid to the correct orientation of these
ROMs during installation.</P
><P
>The GDB stub allows communication with GDB using the serial
port (channel C) at connector PJ1. The communication parameters
are fixed at 38400 baud, 8 data bits, no parity bit, and 1 stop
bit (8-N-1). No handshaking is employed. Connection to the host
computer should be made using an RS232C null modem cable.</P
><P
>CygMon and eCos currently provide support for a 16Mbyte 60ns
72pin DRAM SIMM fitted to the PJ21 connector. Different size DRAMs
may require changes in the value stored in the DCCR0 register. This
value may be found near line 211 in <TT
CLASS="FILENAME"
>hal/mips/arch/<TT
CLASS="REPLACEABLE"
><I
>&#60;version&#62;</I
></TT
>/src/vectors.S</TT
>
in eCos, and near line 99 in
          <TT
CLASS="FILENAME"
>libstub/mips/tx39jmr/tx39jmr-power.S</TT
> in
CygMon. eCos does not currently use the DRAM for any purpose itself,
so it is entirely available for application use.</P
></DIV
><DIV
CLASS="NAVFOOTER"
><HR
ALIGN="LEFT"
WIDTH="100%"><TABLE
SUMMARY="Footer navigation table"
WIDTH="100%"
BORDER="0"
CELLPADDING="0"
CELLSPACING="0"
><TR
><TD
WIDTH="33%"
ALIGN="left"
VALIGN="top"
><A
HREF="setup-am33-stb.html"
ACCESSKEY="P"
>Prev</A
></TD
><TD
WIDTH="34%"
ALIGN="center"
VALIGN="top"
><A
HREF="ecos-user-guide.html"
ACCESSKEY="H"
>Home</A
></TD
><TD
WIDTH="33%"
ALIGN="right"
VALIGN="top"
><A
HREF="setup-tx39-sim.html"
ACCESSKEY="N"
>Next</A
></TD
></TR
><TR
><TD
WIDTH="33%"
ALIGN="left"
VALIGN="top"
>AM33 STB Hardware Setup</TD
><TD
WIDTH="34%"
ALIGN="center"
VALIGN="top"
><A
HREF="appendix-target-setup.html"
ACCESSKEY="U"
>Up</A
></TD
><TD
WIDTH="33%"
ALIGN="right"
VALIGN="top"
>TX39 Architectural Simulator Setup</TD
></TR
></TABLE
></DIV
></BODY
></HTML
>

Line No.	Rev	Author	Line
1	28	unneback	`<!-- Copyright (C) 2003 Red Hat, Inc. -->`
2			`<!-- This material may be distributed only subject to the terms -->`
3			`<!-- and conditions set forth in the Open Publication License, v1.0 -->`
4			`<!-- or later (the latest version is presently available at -->`
5			`<!-- http://www.opencontent.org/openpub/). -->`
6			`<!-- Distribution of the work or derivative of the work in any -->`
7			`<!-- standard (paper) book form is prohibited unless prior -->`
8			`<!-- permission is obtained from the copyright holder. -->`
9			`<HTML`
10			`><HEAD`
11			`><TITLE`
12			`>TX39 Hardware Setup</TITLE`
13			`><meta name="MSSmartTagsPreventParsing" content="TRUE">`
14			`<META`
15			`NAME="GENERATOR"`
16			`CONTENT="Modular DocBook HTML Stylesheet Version 1.76b+`
17			`"><LINK`
18			`REL="HOME"`
19			`TITLE="eCos User Guide"`
20			`HREF="ecos-user-guide.html"><LINK`
21			`REL="UP"`
22			`TITLE="Target Setup"`
23			`HREF="appendix-target-setup.html"><LINK`
24			`REL="PREVIOUS"`
25			`TITLE="AM33 STB Hardware Setup"`
26			`HREF="setup-am33-stb.html"><LINK`
27			`REL="NEXT"`
28			`TITLE="TX39 Architectural Simulator Setup"`
29			`HREF="setup-tx39-sim.html"></HEAD`
30			`><BODY`
31			`CLASS="SECT1"`
32			`BGCOLOR="#FFFFFF"`
33			`TEXT="#000000"`
34			`LINK="#0000FF"`
35			`VLINK="#840084"`
36			`ALINK="#0000FF"`
37			`><DIV`
38			`CLASS="NAVHEADER"`
39			`><TABLE`
40			`SUMMARY="Header navigation table"`
41			`WIDTH="100%"`
42			`BORDER="0"`
43			`CELLPADDING="0"`
44			`CELLSPACING="0"`
45			`><TR`
46			`><TH`
47			`COLSPAN="3"`
48			`ALIGN="center"`
49			`>eCos User Guide</TH`
50			`></TR`
51			`><TR`
52			`><TD`
53			`WIDTH="10%"`
54			`ALIGN="left"`
55			`VALIGN="bottom"`
56			`><A`
57			`HREF="setup-am33-stb.html"`
58			`ACCESSKEY="P"`
59			`>Prev</A`
60			`></TD`
61			`><TD`
62			`WIDTH="80%"`
63			`ALIGN="center"`
64			`VALIGN="bottom"`
65			`>Appendix A. Target Setup</TD`
66			`><TD`
67			`WIDTH="10%"`
68			`ALIGN="right"`
69			`VALIGN="bottom"`
70			`><A`
71			`HREF="setup-tx39-sim.html"`
72			`ACCESSKEY="N"`
73			`>Next</A`
74			`></TD`
75			`></TR`
76			`></TABLE`
77			`><HR`
78			`ALIGN="LEFT"`
79			`WIDTH="100%"></DIV`
80			`><DIV`
81			`CLASS="SECT1"`
82			`><H1`
83			`CLASS="SECT1"`
84			`><A`
85			`NAME="SETUP-TX39-JMR3904">TX39 Hardware Setup</H1`
86			`><P`
87			`>The eCos Developer’s Kit package comes with a pair`
88			`of ROMs that provide GDB support for`
89			`the Toshiba JMR-TX3904 RISC processor reference board by way of CygMon. </P`
90			`><P`
91			`>Images of these ROMs are also provided at <TT`
92			`CLASS="FILENAME"`
93			`>BASE_DIR/loaders/tx39-jmr3904/cygmon50.bin</TT`
94			`> and <TT`
95			`CLASS="FILENAME"`
96			`>BASE_DIR/loaders/tx39-jmr3904/cygmon66.bin</TT`
97			`> for`
98			`50 MHz and 66 MHz boards respectively. The ROMs are installed to`
99			`sockets IC6 and IC7 on the memory daughterboard according to their`
100			`labels. Attention should be paid to the correct orientation of these`
101			`ROMs during installation.</P`
102			`><P`
103			`>The GDB stub allows communication with GDB using the serial`
104			`port (channel C) at connector PJ1. The communication parameters`
105			`are fixed at 38400 baud, 8 data bits, no parity bit, and 1 stop`
106			`bit (8-N-1). No handshaking is employed. Connection to the host`
107			`computer should be made using an RS232C null modem cable.</P`
108			`><P`
109			`>CygMon and eCos currently provide support for a 16Mbyte 60ns`
110			`72pin DRAM SIMM fitted to the PJ21 connector. Different size DRAMs`
111			`may require changes in the value stored in the DCCR0 register. This`
112			`value may be found near line 211 in <TT`
113			`CLASS="FILENAME"`
114			`>hal/mips/arch/<TT`
115			`CLASS="REPLACEABLE"`
116			`><I`
117			`><version></I`
118			`></TT`
119			`>/src/vectors.S</TT`
120			`>`
121			`in eCos, and near line 99 in`
122			`<TT`
123			`CLASS="FILENAME"`
124			`>libstub/mips/tx39jmr/tx39jmr-power.S</TT`
125			`> in`
126			`CygMon. eCos does not currently use the DRAM for any purpose itself,`
127			`so it is entirely available for application use.</P`
128			`></DIV`
129			`><DIV`
130			`CLASS="NAVFOOTER"`
131			`><HR`
132			`ALIGN="LEFT"`
133			`WIDTH="100%"><TABLE`
134			`SUMMARY="Footer navigation table"`
135			`WIDTH="100%"`
136			`BORDER="0"`
137			`CELLPADDING="0"`
138			`CELLSPACING="0"`
139			`><TR`
140			`><TD`
141			`WIDTH="33%"`
142			`ALIGN="left"`
143			`VALIGN="top"`
144			`><A`
145			`HREF="setup-am33-stb.html"`
146			`ACCESSKEY="P"`
147			`>Prev</A`
148			`></TD`
149			`><TD`
150			`WIDTH="34%"`
151			`ALIGN="center"`
152			`VALIGN="top"`
153			`><A`
154			`HREF="ecos-user-guide.html"`
155			`ACCESSKEY="H"`
156			`>Home</A`
157			`></TD`
158			`><TD`
159			`WIDTH="33%"`
160			`ALIGN="right"`
161			`VALIGN="top"`
162			`><A`
163			`HREF="setup-tx39-sim.html"`
164			`ACCESSKEY="N"`
165			`>Next</A`
166			`></TD`
167			`></TR`
168			`><TR`
169			`><TD`
170			`WIDTH="33%"`
171			`ALIGN="left"`
172			`VALIGN="top"`
173			`>AM33 STB Hardware Setup</TD`
174			`><TD`
175			`WIDTH="34%"`
176			`ALIGN="center"`
177			`VALIGN="top"`
178			`><A`
179			`HREF="appendix-target-setup.html"`
180			`ACCESSKEY="U"`
181			`>Up</A`
182			`></TD`
183			`><TD`
184			`WIDTH="33%"`
185			`ALIGN="right"`
186			`VALIGN="top"`
187			`>TX39 Architectural Simulator Setup</TD`
188			`></TR`
189			`></TABLE`
190			`></DIV`
191			`></BODY`
192			`></HTML`
193			`>`

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [doc/] [html/] [user-guide/] [setup-tx39-jmr3904.html] - Blame information for rev 578