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<!-- Copyright (C) 2003 Red Hat, Inc.                                -->
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<HTML
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><HEAD
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><TITLE
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>TX39 Hardware Setup</TITLE
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><meta name="MSSmartTagsPreventParsing" content="TRUE">
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<META
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NAME="GENERATOR"
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CONTENT="Modular DocBook HTML Stylesheet Version 1.76b+
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"><LINK
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REL="HOME"
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TITLE="eCos User Guide"
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HREF="ecos-user-guide.html"><LINK
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REL="UP"
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TITLE="Target Setup"
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HREF="appendix-target-setup.html"><LINK
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REL="PREVIOUS"
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TITLE="AM33 STB Hardware Setup"
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HREF="setup-am33-stb.html"><LINK
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REL="NEXT"
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TITLE="TX39 Architectural Simulator Setup"
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HREF="setup-tx39-sim.html"></HEAD
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><BODY
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><TR
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><TH
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COLSPAN="3"
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>eCos User Guide</TH
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></TR
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><TR
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><TD
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WIDTH="10%"
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ALIGN="left"
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VALIGN="bottom"
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><A
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HREF="setup-am33-stb.html"
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ACCESSKEY="P"
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>Prev</A
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></TD
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><TD
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WIDTH="80%"
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ALIGN="center"
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VALIGN="bottom"
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>Appendix A. Target Setup</TD
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><TD
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WIDTH="10%"
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ALIGN="right"
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VALIGN="bottom"
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><A
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HREF="setup-tx39-sim.html"
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>Next</A
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WIDTH="100%"></DIV
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><DIV
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CLASS="SECT1"
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><H1
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CLASS="SECT1"
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><A
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NAME="SETUP-TX39-JMR3904">TX39 Hardware Setup</H1
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><P
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>The eCos Developer&#8217;s Kit package comes with a pair
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of ROMs that provide GDB support for
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the Toshiba JMR-TX3904 RISC processor reference board by way of CygMon. </P
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><P
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>Images of these ROMs are also provided at <TT
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CLASS="FILENAME"
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>BASE_DIR/loaders/tx39-jmr3904/cygmon50.bin</TT
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> and <TT
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CLASS="FILENAME"
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>BASE_DIR/loaders/tx39-jmr3904/cygmon66.bin</TT
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> for
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50 MHz and 66 MHz boards respectively. The ROMs are installed to
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sockets IC6 and IC7 on the memory daughterboard according to their
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labels. Attention should be paid to the correct orientation of these
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ROMs during installation.</P
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><P
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>The GDB stub allows communication with GDB using the serial
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port (channel C) at connector PJ1. The communication parameters
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are fixed at 38400 baud, 8 data bits, no parity bit, and 1 stop
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bit (8-N-1). No handshaking is employed. Connection to the host
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computer should be made using an RS232C null modem cable.</P
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><P
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>CygMon and eCos currently provide support for a 16Mbyte 60ns
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72pin DRAM SIMM fitted to the PJ21 connector. Different size DRAMs
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may require changes in the value stored in the DCCR0 register. This
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value may be found near line 211 in <TT
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CLASS="FILENAME"
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>hal/mips/arch/<TT
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CLASS="REPLACEABLE"
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><I
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>&#60;version&#62;</I
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></TT
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>/src/vectors.S</TT
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>
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in eCos, and near line 99 in
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          <TT
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CLASS="FILENAME"
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>libstub/mips/tx39jmr/tx39jmr-power.S</TT
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> in
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CygMon. eCos does not currently use the DRAM for any purpose itself,
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so it is entirely available for application use.</P
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></DIV
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><HR
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WIDTH="100%"><TABLE
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><TD
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WIDTH="33%"
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><A
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HREF="setup-am33-stb.html"
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>Prev</A
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></TD
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><TD
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WIDTH="34%"
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ALIGN="center"
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VALIGN="top"
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><A
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HREF="ecos-user-guide.html"
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>Home</A
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><TD
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WIDTH="33%"
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ALIGN="right"
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VALIGN="top"
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><A
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HREF="setup-tx39-sim.html"
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>Next</A
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></TD
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></TR
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><TR
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><TD
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WIDTH="33%"
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ALIGN="left"
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>AM33 STB Hardware Setup</TD
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><TD
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VALIGN="top"
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><A
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HREF="appendix-target-setup.html"
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ACCESSKEY="U"
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>Up</A
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></TD
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><TD
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WIDTH="33%"
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ALIGN="right"
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VALIGN="top"
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>TX39 Architectural Simulator Setup</TD
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></TR
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></TABLE
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></DIV
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></BODY
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></HTML
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>

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