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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [compat/] [posix/] [v2_0/] [tests/] [signal2.c] - Blame information for rev 312

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//==========================================================================
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//
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//        signal2.cxx
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//
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//        POSIX signal test 2
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):     nickg
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// Contributors:  jlarmour
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// Date:          2000-04-10
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// Description:   Tests POSIX signal functionality.
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//
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//####DESCRIPTIONEND####
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//==========================================================================
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#include <pkgconf/isoinfra.h>
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#include <cyg/hal/hal_intr.h>   // For exception codes
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#include <sys/types.h>
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#include <pthread.h>
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#include <signal.h>
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#include <semaphore.h>
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#include <setjmp.h>
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#include <cyg/infra/testcase.h>
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#if CYGINT_ISO_SETJMP == 0
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# define NA_MSG "Requires setjmp/longjmp implementation"
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#elif !defined(CYGPKG_POSIX_SIGNALS)
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# define NA_MSG "POSIX signals not enabled"
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#endif
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#ifdef NA_MSG
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void
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cyg_start(void)
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{
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    CYG_TEST_INIT();
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    CYG_TEST_NA( NA_MSG );
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}
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#else
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//--------------------------------------------------------------------------
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// Local variables
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static jmp_buf jbuf;
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//--------------------------------------------------------------------------
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// PowerPC is a special case as it has the alignment exception, but it
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// doesn't trigger for this function unless in little-endian mode (although
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// the exception exists for other instructions not used by this function so
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// CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS will still be defined
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#if defined(CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS) && !(defined(CYGPKG_HAL_POWERPC) && (CYG_BYTEORDER==CYG_MSBFIRST))
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static void
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cause_unaligned_access(void)
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{
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    volatile int x;
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    volatile CYG_ADDRESS p=(CYG_ADDRESS) &jbuf;
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    x = *(volatile int *)(p+1);
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} // cause_unaligned_access()
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#endif
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//--------------------------------------------------------------------------
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#ifdef CYGNUM_HAL_EXCEPTION_DATA_ACCESS
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static void
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cause_illegal_access(void)
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{
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#ifdef CYGPKG_HAL_I386
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    // In the x86 architecture, although we have the DATA_ACCESS
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    // exception available, it is not possible to provoke it using the
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    // normal code of this test. This is because the normal segments we
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    // have installed in the segment registers cover all of memory. Instead we
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    // set GS to a descriptor that does not cover 0xF0000000-0xFFFFFFFF and
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    // poke at that.
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    __asm__ ( "movw     $0x20,%%ax\n"
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              "movw     %%ax,%%gs\n"
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              "movl     %%gs:0xF0000000,%%eax\n"
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              :
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              :
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              : "eax"
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            );
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#else    
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    volatile int x;
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    volatile CYG_ADDRESS p=(CYG_ADDRESS) &jbuf;
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    do
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    {
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        x = *(volatile int *)(p);
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        p += (CYG_ADDRESS)0x100000;
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    } while( p != (CYG_ADDRESS)&jbuf );
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#endif    
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} // cause_illegal_access()
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#endif
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//--------------------------------------------------------------------------
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#ifdef CYGNUM_HAL_EXCEPTION_FPU_DIV_BY_ZERO
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// num must always be 0 - do it this way in case the optimizer tries to
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// get smart
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static int
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cause_fpe(int num)
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{
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    double a;
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    a = 1.0/num;                        // Depending on FPU emulation and/or
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                                        // the FPU architecture, this may
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                                        // cause an exception.
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                                        // (float division by zero)
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    return ((int)a)/num;                // This may cause an exception if
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                                        // the architecture supports it.
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                                        // (integer division by zero).
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} // cause_fpe()
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#endif
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//--------------------------------------------------------------------------
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// Signal handler functions
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static void sigsegv( int signo )
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{
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    CYG_TEST_INFO( "sigsegv() handler called" );
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    CYG_TEST_CHECK( signo == SIGSEGV, "Signal not SIGSEGV");
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    longjmp( jbuf, 1 );
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}
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static void sigbus( int signo )
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{
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    CYG_TEST_INFO( "sigbus() handler called" );
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    CYG_TEST_CHECK( signo == SIGBUS, "Signal not SIGBUS");
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    longjmp( jbuf, 1 );
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}
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static void sigfpe( int signo )
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{
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    CYG_TEST_INFO( "sigfpe() handler called" );
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    CYG_TEST_CHECK( signo == SIGFPE, "Signal not SIGFPE");
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    longjmp( jbuf, 1 );
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}
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//--------------------------------------------------------------------------
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int main(int argc, char **argv)
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{
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    int ret;
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    sigset_t mask;
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    struct sigaction sa;
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    CYG_TEST_INIT();
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    // Make a full signal set
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    sigfillset( &mask );
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    // Install signal handlers
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    sa.sa_mask = mask;
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    sa.sa_flags = 0;
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    sa.sa_handler = sigsegv;
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    ret = sigaction( SIGSEGV, &sa, NULL );
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    CYG_TEST_CHECK( ret == 0 , "sigaction returned error");
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    sa.sa_handler = sigbus;
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    ret = sigaction( SIGBUS, &sa, NULL );
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    CYG_TEST_CHECK( ret == 0 , "sigaction returned error");
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    sa.sa_handler = sigfpe;
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    ret = sigaction( SIGFPE, &sa, NULL );
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    CYG_TEST_CHECK( ret == 0 , "sigaction returned error");
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    // now make an empty signal set
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    sigemptyset( &mask );
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// Now reset the various exception handlers to eCos handlers so that we
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// have control; this is the target side equivalent of the CYG_TEST_GDBCMD
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// lines above:
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#ifdef HAL_VSR_SET_TO_ECOS_HANDLER
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    // Reclaim the VSR off CygMon possibly
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#ifdef CYGNUM_HAL_EXCEPTION_DATA_ACCESS
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    HAL_VSR_SET_TO_ECOS_HANDLER( CYGNUM_HAL_EXCEPTION_DATA_ACCESS, NULL );
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#endif
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#ifdef CYGNUM_HAL_EXCEPTION_DATA_TLBMISS_ACCESS
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    HAL_VSR_SET_TO_ECOS_HANDLER( CYGNUM_HAL_EXCEPTION_DATA_TLBMISS_ACCESS, NULL );
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#endif
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#ifdef CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS
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    HAL_VSR_SET_TO_ECOS_HANDLER( CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS, NULL );
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#endif
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#ifdef CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION
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    HAL_VSR_SET_TO_ECOS_HANDLER( CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION, NULL );
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#endif
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#ifdef CYGNUM_HAL_EXCEPTION_FPU_DIV_BY_ZERO
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    HAL_VSR_SET_TO_ECOS_HANDLER( CYGNUM_HAL_EXCEPTION_FPU_DIV_BY_ZERO, NULL );
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#endif
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#endif
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    // PowerPC is a special case as it has the alignment exception, but it
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    // doesn't trigger for this function unless in little-endian mode (although
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    // the exception exists for other instructions not used by this function so
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    // CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS will still be defined
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#if defined(CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS) && !(defined(CYGPKG_HAL_POWERPC) && (CYG_BYTEORDER==CYG_MSBFIRST))
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    CYG_TEST_INFO("Test 1 - provoke unaligned access");
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    if( setjmp( jbuf ) == 0 )
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    {
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        pthread_sigmask( SIG_SETMASK, &mask, NULL );
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        cause_unaligned_access();
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        CYG_TEST_FAIL("Didn't cause exception");
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    }
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#else
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    CYG_TEST_INFO("Test 1 - provoke unaligned access - not supported");
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#endif    
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#ifdef CYGNUM_HAL_EXCEPTION_DATA_ACCESS
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    CYG_TEST_INFO("Test 2 - provoke illegal access");
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    if( setjmp( jbuf ) == 0 )
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    {
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        pthread_sigmask( SIG_SETMASK, &mask, NULL );
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        cause_illegal_access();
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        CYG_TEST_FAIL("Didn't cause exception");
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    }
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#else
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    CYG_TEST_INFO("Test 1 - provoke illegal access - not supported");
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#endif    
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#ifdef CYGNUM_HAL_EXCEPTION_FPU_DIV_BY_ZERO
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    CYG_TEST_INFO("Test 3 - provoke FP error");
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    if( setjmp( jbuf ) == 0 )
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    {
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        pthread_sigmask( SIG_SETMASK, &mask, NULL );
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        cause_fpe(0);
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        CYG_TEST_FAIL("Didn't cause exception");
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    }
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#else
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    CYG_TEST_INFO("Test 3 - provoke FP error - not supported");
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#endif    
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    CYG_TEST_PASS_FINISH( "signal2" );
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}
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#endif // ifndef NA_MSG
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//--------------------------------------------------------------------------
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// end of signal1.c

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