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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [compat/] [uitron/] [v2_0/] [include/] [uit_ifnc.inl] - Blame information for rev 174

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#ifndef CYGONCE_COMPAT_UITRON_UIT_IFNC_INL
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#define CYGONCE_COMPAT_UITRON_UIT_IFNC_INL
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//===========================================================================
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//
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//      uit_ifnc.inl
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//
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//      uITRON compatibility functions
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//
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//===========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//===========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):   hmt
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// Contributors:        hmt
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// Date:        1999-08-16
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// Purpose:     uITRON compatibility functions
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// Description:
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//
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//####DESCRIPTIONEND####
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//
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//===========================================================================
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#ifdef CYGPKG_UITRON
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#ifdef CYGPRI_UITRON_FUNCS_HERE_AND_NOW
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class Cyg_Uit_Action {
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public:
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    typedef enum {
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        WUP_TSK,
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        SIG_SEM,
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        SET_FLG,
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        SND_MSG
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    } action;
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};
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extern volatile int cyg_uit_dsr_actions_head;
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extern volatile int cyg_uit_dsr_actions_tail;
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#define CYGNUM_UITRON_ISR_ACTION_QUEUEMASK (CYGNUM_UITRON_ISR_ACTION_QUEUESIZE-1)
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#if ((~CYGNUM_UITRON_ISR_ACTION_QUEUEMASK) &            \
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     ~((~CYGNUM_UITRON_ISR_ACTION_QUEUEMASK)-1))        \
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    != CYGNUM_UITRON_ISR_ACTION_QUEUESIZE
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#error CYGNUM_UITRON_ISR_ACTION_QUEUESIZE not a power of 2
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#endif
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extern Cyg_Uit_Action::action
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cyg_uit_dsr_actions[ CYGNUM_UITRON_ISR_ACTION_QUEUESIZE ];
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extern ID
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cyg_uit_dsr_act_ids[ CYGNUM_UITRON_ISR_ACTION_QUEUESIZE ];
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extern CYG_ADDRWORD
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cyg_uit_dsr_act_a1s[ CYGNUM_UITRON_ISR_ACTION_QUEUESIZE ];
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CYG_UIT_FUNC_INLINE
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ER
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iwup_tsk ( ID tskid )
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{
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#ifdef CYGSEM_UITRON_ISRFUNCS_TRY_IMMEDIATE_EXECUTION
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    if ( 1 >= Cyg_Scheduler::get_sched_lock() ) {
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        // then this ISR is the first one, and the sched was locked by the
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        // interrupt code.  So this is safe.
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        return wup_tsk( tskid );
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    }
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#endif
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    register int i, head;
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    i = cyg_uit_dsr_actions_head;
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    head = CYGNUM_UITRON_ISR_ACTION_QUEUEMASK & ( 1 + i );
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    // If interrupts can be recursive, then there is a race here where a
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    // slot may be overwritten by a recursive interrupt, or actions from
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    // such lost; better though than having a slot contain *mixed* data
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    // from two intermingled interrupts.
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    if ( head != cyg_uit_dsr_actions_tail ) {
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        cyg_uit_dsr_actions_head = head;
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        cyg_uit_dsr_actions[ i ] = Cyg_Uit_Action::WUP_TSK;
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        cyg_uit_dsr_act_ids[ i ] = tskid;
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    }
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    return E_OK;
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}
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#ifdef CYGPKG_UITRON_SEMAS
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#if 0 < CYG_UITRON_NUM( SEMAS )
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CYG_UIT_FUNC_INLINE
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ER
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isig_sem ( ID semid )
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{
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#ifdef CYGSEM_UITRON_ISRFUNCS_TRY_IMMEDIATE_EXECUTION
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    if ( 1 >= Cyg_Scheduler::get_sched_lock() ) {
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        // then this ISR is the first one, and the sched was locked by the
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        // interrupt code.  So this is safe.
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        return sig_sem( semid );
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    }
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#endif
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    register int i, head;
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    i = cyg_uit_dsr_actions_head;
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    head = CYGNUM_UITRON_ISR_ACTION_QUEUEMASK & ( 1 + i );
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    // If interrupts can be recursive, then there is a race here where a
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    // slot may be overwritten by a recursive interrupt, or actions from
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    // such lost; better though than having a slot contain *mixed* data
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    // from two intermingled interrupts.
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    if ( head != cyg_uit_dsr_actions_tail ) {
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        cyg_uit_dsr_actions_head = head;
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        cyg_uit_dsr_actions[ i ] = Cyg_Uit_Action::SIG_SEM;
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        cyg_uit_dsr_act_ids[ i ] = semid;
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    }
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    return E_OK;
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}
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#endif // 0 < CYG_UITRON_NUM( SEMAS )
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#endif // CYGPKG_UITRON_SEMAS
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#ifdef CYGPKG_UITRON_FLAGS
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#if 0 < CYG_UITRON_NUM( FLAGS )
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CYG_UIT_FUNC_INLINE
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ER
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iset_flg ( ID flgid, UINT setptn )
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{
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#ifdef CYGSEM_UITRON_ISRFUNCS_TRY_IMMEDIATE_EXECUTION
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    if ( 1 >= Cyg_Scheduler::get_sched_lock() ) {
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        // then this ISR is the first one, and the sched was locked by the
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        // interrupt code.  So this is safe.
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        return set_flg( flgid, setptn );
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    }
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#endif
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    register int i, head;
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    i = cyg_uit_dsr_actions_head;
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    head = CYGNUM_UITRON_ISR_ACTION_QUEUEMASK & ( 1 + i );
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    // If interrupts can be recursive, then there is a race here where a
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    // slot may be overwritten by a recursive interrupt, or actions from
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    // such lost; better though than having a slot contain *mixed* data
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    // from two intermingled interrupts.
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    if ( head != cyg_uit_dsr_actions_tail ) {
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        cyg_uit_dsr_actions_head = head;
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        cyg_uit_dsr_actions[ i ] = Cyg_Uit_Action::SET_FLG;
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        cyg_uit_dsr_act_ids[ i ] = flgid;
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        cyg_uit_dsr_act_a1s[ i ] = (CYG_ADDRWORD)setptn;
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    }
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    return E_OK;
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}
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#endif // 0 < CYG_UITRON_NUM( FLAGS )
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#endif // CYGPKG_UITRON_FLAGS
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#ifdef CYGPKG_UITRON_MBOXES
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#if 0 < CYG_UITRON_NUM( MBOXES )
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CYG_UIT_FUNC_INLINE
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ER
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isnd_msg ( ID mbxid, T_MSG *pk_msg )
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{
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#ifdef CYGSEM_UITRON_ISRFUNCS_TRY_IMMEDIATE_EXECUTION
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    if ( 1 >= Cyg_Scheduler::get_sched_lock() ) {
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        // then this ISR is the first one, and the sched was locked by the
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        // interrupt code.  So this is safe.
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        return snd_msg( mbxid, pk_msg );
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    }
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#endif
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    register int i, head;
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    i = cyg_uit_dsr_actions_head;
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    head = CYGNUM_UITRON_ISR_ACTION_QUEUEMASK & ( 1 + i );
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    // If interrupts can be recursive, then there is a race here where a
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    // slot may be overwritten by a recursive interrupt, or actions from
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    // such lost; better though than having a slot contain *mixed* data
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    // from two intermingled interrupts.
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    if ( head != cyg_uit_dsr_actions_tail ) {
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        cyg_uit_dsr_actions_head = head;
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        cyg_uit_dsr_actions[ i ] = Cyg_Uit_Action::SND_MSG;
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        cyg_uit_dsr_act_ids[ i ] = mbxid;
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        cyg_uit_dsr_act_a1s[ i ] = (CYG_ADDRWORD)pk_msg;
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    }
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    return E_OK;
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}
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#endif // 0 < CYG_UITRON_NUM( MBOXES )
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#endif // CYGPKG_UITRON_MBOXES
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// ========================================================================
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#endif // CYGPKG_UITRON
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#endif // CYGPRI_UITRON_FUNCS_HERE_AND_NOW
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#endif // CYGONCE_COMPAT_UITRON_UIT_IFNC_INL
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//EOF uit_ifnc.inl

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