OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [compat/] [uitron/] [v2_0/] [tests/] [test1.c] - Blame information for rev 174

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 27 unneback
//===========================================================================
2
//
3
//      test1.c
4
//
5
//      uITRON "C" test program one
6
//
7
//===========================================================================
8
//####ECOSGPLCOPYRIGHTBEGIN####
9
// -------------------------------------------
10
// This file is part of eCos, the Embedded Configurable Operating System.
11
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12
//
13
// eCos is free software; you can redistribute it and/or modify it under
14
// the terms of the GNU General Public License as published by the Free
15
// Software Foundation; either version 2 or (at your option) any later version.
16
//
17
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
19
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
20
// for more details.
21
//
22
// You should have received a copy of the GNU General Public License along
23
// with eCos; if not, write to the Free Software Foundation, Inc.,
24
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25
//
26
// As a special exception, if other files instantiate templates or use macros
27
// or inline functions from this file, or you compile this file and link it
28
// with other works to produce a work based on this file, this file does not
29
// by itself cause the resulting work to be covered by the GNU General Public
30
// License. However the source code for this file must still be made available
31
// in accordance with section (3) of the GNU General Public License.
32
//
33
// This exception does not invalidate any other reasons why a work based on
34
// this file might be covered by the GNU General Public License.
35
//
36
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
37
// at http://sources.redhat.com/ecos/ecos-license/
38
// -------------------------------------------
39
//####ECOSGPLCOPYRIGHTEND####
40
//===========================================================================
41
//#####DESCRIPTIONBEGIN####
42
//
43
// Author(s):   hmt
44
// Contributors:        hmt
45
// Date:        1998-03-13
46
// Purpose:     uITRON API testing
47
// Description: 
48
//
49
//####DESCRIPTIONEND####
50
//
51
//===========================================================================
52
 
53
#include <pkgconf/uitron.h>             // uITRON setup CYGNUM_UITRON_SEMAS
54
                                        // CYGPKG_UITRON et al
55
#include <cyg/infra/testcase.h>         // testing infrastructure
56
 
57
#ifdef CYGPKG_UITRON                    // we DO want the uITRON package
58
 
59
#ifdef CYGSEM_KERNEL_SCHED_MLQUEUE      // we DO want prioritized threads
60
 
61
#ifdef CYGFUN_KERNEL_THREADS_TIMER      // we DO want timout-able calls
62
 
63
#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK     // we DO want the realtime clock
64
 
65
// we're OK if it's C++ or neither of those two is defined:
66
#if defined( __cplusplus ) || \
67
    (!defined( CYGIMP_UITRON_INLINE_FUNCS ) && \
68
     !defined( CYGIMP_UITRON_CPP_OUTLINE_FUNCS) )
69
 
70
// =================== TEST CONFIGURATION ===================
71
#if \
72
    /* test configuration for enough tasks */                      \
73
    (CYGNUM_UITRON_TASKS >= 4)                                  && \
74
    (CYGNUM_UITRON_TASKS < 90)                                  && \
75
    (CYGNUM_UITRON_START_TASKS == 1)                            && \
76
    ( !defined(CYGPKG_UITRON_TASKS_CREATE_DELETE) ||               \
77
      CYGNUM_UITRON_TASKS_INITIALLY >= 4             )          && \
78
                                                                   \
79
    /* the end of the large #if statement */                       \
80
    1
81
 
82
// ============================ END ============================
83
 
84
 
85
 
86
#include <cyg/compat/uitron/uit_func.h> // uITRON
87
 
88
externC void
89
cyg_package_start( void )
90
{
91
    CYG_TEST_INIT();
92
    CYG_TEST_INFO( "Calling cyg_uitron_start()" );
93
    cyg_uitron_start();
94
}
95
 
96
volatile int intercom = 0;
97
volatile int intercount = 0;
98
INT scratch = 0;
99
 
100
#ifndef CYGSEM_KERNEL_SCHED_TIMESLICE
101
#define TIMESLICEMSG "Assuming no kernel timeslicing"
102
#define TSGO()          (1)
103
#define TSRELEASE()     CYG_EMPTY_STATEMENT
104
#define TSSTOP()        CYG_EMPTY_STATEMENT
105
#define TSLOCK()        CYG_EMPTY_STATEMENT
106
#define TSUNLOCK()      CYG_EMPTY_STATEMENT
107
#define ICWAIT( _i_ )   CYG_EMPTY_STATEMENT
108
 
109
#else
110
// Now follow some nasty bodges to control the scheduling when basically it
111
// isn't controlled ie. timeslicing is on.  It's bodgy because we're
112
// testing normal synchronization methods, so we shouldn't rely on them for
113
// comms between threads here.  Instead there's a mixture of communicating
114
// via a flag (ts_interlock) which stops the "controlled" thread running
115
// away, and waiting for the controlled thread to run enough for us.
116
//
117
// Tasks 3 and 4 are waited for by the control task: task 3 locks the
118
// scheduler so is immediately descheduled when it unlocks it, task 4 does
119
// waiting-type operations, so we must give it chance to run by yielding a
120
// few times ourselves.  Note the plain constant in ICWAIT() below.
121
 
122
#define TIMESLICEMSG "Assuming kernel timeslicing ENABLED"
123
volatile int ts_interlock = 0;
124
#define TSGO()          (ts_interlock)
125
#define TSRELEASE()     ts_interlock = 1
126
#define TSSTOP()        ts_interlock = 0
127
 
128
#define TSLOCK()        CYG_MACRO_START                                 \
129
    ER ercd2 = dis_dsp();                                               \
130
    CYG_TEST_CHECK( E_OK == ercd2, "dis_dsp (TSLOCK) bad ercd2" );      \
131
CYG_MACRO_END
132
 
133
#define TSUNLOCK()      CYG_MACRO_START                                 \
134
    ER ercd3 = ena_dsp();                                               \
135
    CYG_TEST_CHECK( E_OK == ercd3, "ena_dsp (TSUNLOCK) bad ercd3" );    \
136
CYG_MACRO_END
137
 
138
#define ICWAIT( _i_ )   CYG_MACRO_START                                 \
139
    int loops;                                                          \
140
    for ( loops = 3; (0 < loops) || ((_i_) > intercount); loops-- ) {   \
141
        ER ercd4 = rot_rdq( 0 ); /* yield */                            \
142
        CYG_TEST_CHECK( E_OK == ercd4, "rot_rdq (ICWAIT) bad ercd4" );  \
143
    }                                                                   \
144
CYG_MACRO_END
145
#endif // CYGSEM_KERNEL_SCHED_TIMESLICE
146
 
147
/*
148
#define IC() \
149
CYG_MACRO_START \
150
  static char *msgs[] = { "ZERO", "ONE", "TWO", "THREE", "FOUR", "LOTS" }; \
151
  CYG_TEST_INFO( msgs[ intercount > 5 ? 5 : intercount ] ); \
152
CYG_MACRO_END
153
*/
154
 
155
// #define CYG_TEST_UITRON_TEST1_LOOPING 1
156
 
157
void task1( unsigned int arg )
158
{
159
    ER ercd;
160
    T_RTSK ref_tskd;
161
 
162
#ifdef CYG_TEST_UITRON_TEST1_LOOPING
163
    while ( 1 ) {
164
#endif // CYG_TEST_UITRON_TEST1_LOOPING
165
 
166
    CYG_TEST_INFO( "Task 1 running" );
167
    CYG_TEST_INFO( TIMESLICEMSG );
168
 
169
    intercom = 0;
170
    intercount = 0;
171
 
172
    CYG_TEST_INFO( "Testing get_tid and ref_tsk" );
173
    ercd = get_tid( &scratch );
174
    CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" );
175
    CYG_TEST_CHECK( 1 == scratch, "tid not 1" );
176
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
177
#ifndef CYGSEM_UITRON_PARAMS_NULL_IS_GOOD_PTR
178
    ercd = get_tid( NULL );
179
    CYG_TEST_CHECK( E_PAR == ercd, "get_tid bad ercd !E_PAR" );
180
#endif
181
    ercd = get_tid( NADR );
182
    CYG_TEST_CHECK( E_PAR == ercd, "get_tid bad ercd !E_PAR" );
183
    ercd = ref_tsk( &ref_tskd, -6 );
184
    CYG_TEST_CHECK( E_ID == ercd, "ref_tsk bad ercd !E_ID" );
185
    ercd = ref_tsk( &ref_tskd, 99 );
186
    CYG_TEST_CHECK( E_ID == ercd, "ref_tsk bad ercd !E_ID" );
187
#ifndef CYGSEM_UITRON_PARAMS_NULL_IS_GOOD_PTR
188
    ercd = ref_tsk( NULL, 1 );
189
    CYG_TEST_CHECK( E_PAR == ercd, "ref_tsk bad ercd !E_PAR" );
190
#endif
191
    ercd = ref_tsk( NADR, 1 );
192
    CYG_TEST_CHECK( E_PAR == ercd, "ref_tsk bad ercd !E_PAR" );
193
#endif // we can test bad param error returns
194
    ercd = ref_tsk( &ref_tskd, 1 );
195
    CYG_TEST_CHECK( E_OK == ercd, "ref_tsk bad ercd" );
196
    CYG_TEST_CHECK( TTS_RUN == ref_tskd.tskstat, "Bad task status 1" );
197
    ercd = ref_tsk( &ref_tskd, 0 );
198
    CYG_TEST_CHECK( E_OK == ercd, "ref_tsk bad ercd" );
199
    CYG_TEST_CHECK( TTS_RUN == ref_tskd.tskstat, "Bad task status 0" );
200
    ercd = ref_tsk( &ref_tskd, 2 );
201
    CYG_TEST_CHECK( E_OK == ercd, "ref_tsk bad ercd" );
202
    CYG_TEST_CHECK( TTS_DMT == ref_tskd.tskstat, "Bad task status 2" );
203
    CYG_TEST_CHECK( 2 == ref_tskd.tskpri, "Bad task prio 2" );
204
 
205
    ercd = rsm_tsk( 2 );
206
    CYG_TEST_CHECK( E_OBJ == ercd, "rsm_tsk DMT bad ercd !E_OBJ" );
207
    ercd = frsm_tsk( 2 );
208
    CYG_TEST_CHECK( E_OBJ == ercd, "frsm_tsk DMT bad ercd !E_OBJ" );
209
    ercd = rel_wai( 2 );
210
    CYG_TEST_CHECK( E_OBJ == ercd, "rel_wai DMT bad ercd !E_OBJ" );
211
    ercd = sus_tsk( 2 );
212
    CYG_TEST_CHECK( E_OBJ == ercd, "sus_tsk DMT bad ercd !E_OBJ" );
213
    ercd = wup_tsk( 2 );
214
    CYG_TEST_CHECK( E_OBJ == ercd, "wup_tsk DMT bad ercd !E_OBJ" );
215
    ercd = can_wup( &scratch, 2 );
216
    CYG_TEST_CHECK( E_OBJ == ercd, "can_wup DMT bad ercd !E_OBJ" );
217
 
218
    CYG_TEST_PASS( "get_tid, ref_tsk" );
219
 
220
    CYG_TEST_INFO( "Testing prio change and start task" );
221
    ercd = sta_tsk( 2, 99 );
222
    CYG_TEST_CHECK( E_OK == ercd, "sta_tsk bad ercd" );
223
 
224
    // drop pri of task 2
225
    ercd = chg_pri( 2, 4 );
226
    CYG_TEST_CHECK( E_OK == ercd, "chg_pri bad ercd" );
227
    ercd = ref_tsk( &ref_tskd, 2 );
228
    CYG_TEST_CHECK( E_OK == ercd, "ref_tsk bad ercd" );
229
    CYG_TEST_CHECK( TTS_RDY == ref_tskd.tskstat, "Bad task status 2" );
230
    CYG_TEST_CHECK( 4 == ref_tskd.tskpri, "Bad task prio 2" );
231
 
232
    // drop our pri below task 2
233
    ercd = chg_pri( 0, 5 );
234
    CYG_TEST_CHECK( E_OK == ercd, "chg_pri bad ercd" );
235
 
236
    ercd = ref_tsk( &ref_tskd, 1 );
237
    CYG_TEST_CHECK( E_OK == ercd, "ref_tsk bad ercd" );
238
    CYG_TEST_CHECK( 5 == ref_tskd.tskpri, "Bad task prio 1" );
239
    ercd = ref_tsk( &ref_tskd, 0 );
240
    CYG_TEST_CHECK( E_OK == ercd, "ref_tsk bad ercd" );
241
    CYG_TEST_CHECK( 5 == ref_tskd.tskpri, "Bad task prio 0" );
242
    ercd = ref_tsk( &ref_tskd, 2 );
243
    CYG_TEST_CHECK( E_OK == ercd, "ref_tsk bad ercd" );
244
    // it will have run to completion and regained its original prio
245
    CYG_TEST_CHECK( 2 == ref_tskd.tskpri, "Bad task prio 2" );
246
    CYG_TEST_CHECK( TTS_DMT == ref_tskd.tskstat, "Bad task status 2" );
247
 
248
    // retest these now that the task has executed once
249
    ercd = rsm_tsk( 2 );
250
    CYG_TEST_CHECK( E_OBJ == ercd, "rsm_tsk DMT bad ercd !E_OBJ" );
251
    ercd = frsm_tsk( 2 );
252
    CYG_TEST_CHECK( E_OBJ == ercd, "frsm_tsk DMT bad ercd !E_OBJ" );
253
    ercd = rel_wai( 2 );
254
    CYG_TEST_CHECK( E_OBJ == ercd, "rel_wai DMT bad ercd !E_OBJ" );
255
    ercd = sus_tsk( 2 );
256
    CYG_TEST_CHECK( E_OBJ == ercd, "sus_tsk DMT bad ercd !E_OBJ" );
257
    ercd = wup_tsk( 2 );
258
    CYG_TEST_CHECK( E_OBJ == ercd, "wup_tsk DMT bad ercd !E_OBJ" );
259
    ercd = can_wup( &scratch, 2 );
260
    CYG_TEST_CHECK( E_OBJ == ercd, "can_wup DMT bad ercd !E_OBJ" );
261
 
262
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
263
    ercd = chg_pri( -6, 9 );
264
    CYG_TEST_CHECK( E_ID == ercd, "chg_pri bad ercd !E_ID" );
265
    ercd = chg_pri( 99, 9 );
266
    CYG_TEST_CHECK( E_ID == ercd, "chg_pri bad ercd !E_ID" );
267
    ercd = sta_tsk( -6, 99 );
268
    CYG_TEST_CHECK( E_ID == ercd, "sta_tsk bad ercd !E_ID" );
269
    ercd = sta_tsk( 99, 99 );
270
    CYG_TEST_CHECK( E_ID == ercd, "sta_tsk bad ercd !E_ID" );
271
#endif // we can test bad param error returns
272
 
273
    CYG_TEST_PASS( "sta_tsk, chg_pri" );
274
 
275
    CYG_TEST_INFO( "Testing delay and dispatch disabling" );
276
    ercd = dly_tsk( 10 );
277
    CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" );
278
    ercd = ena_dsp();
279
    CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" );
280
    ercd = dly_tsk( 10 );
281
    CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" );
282
    ercd = dis_dsp();
283
    CYG_TEST_CHECK( E_OK == ercd, "dis_dsp bad ercd" );
284
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
285
    ercd = dly_tsk( 10 );
286
    CYG_TEST_CHECK( E_CTX == ercd, "dly_tsk bad ercd !E_CTX" );
287
    ercd = dis_dsp();
288
    CYG_TEST_CHECK( E_OK == ercd, "dis_dsp bad ercd" );
289
    ercd = dly_tsk( 10 );
290
    CYG_TEST_CHECK( E_CTX == ercd, "dly_tsk bad ercd !E_CTX" );
291
#endif // we can test bad param error returns
292
    ercd = ena_dsp();
293
    CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" );
294
    ercd = dly_tsk( 10 );
295
    CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" );
296
    ercd = ena_dsp();
297
    CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" );
298
    ercd = dly_tsk( 10 );
299
    CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" );
300
 
301
    CYG_TEST_PASS( "dly_tsk, ena_dsp, dis_dsp" );
302
 
303
    CYG_TEST_INFO( "Testing ready queue manipulation" );
304
    ercd = rot_rdq( 0 );
305
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
306
    ercd = rot_rdq( 4 );
307
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
308
    ercd = rot_rdq( 5 );
309
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
310
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
311
    ercd = rot_rdq( -6 );
312
    CYG_TEST_CHECK( E_PAR == ercd, "rot_rdq bad ercd !E_PAR" );
313
    ercd = rot_rdq( 99 );
314
    CYG_TEST_CHECK( E_PAR == ercd, "rot_rdq bad ercd !E_PAR" );
315
#endif // we can test bad param error returns
316
 
317
    CYG_TEST_PASS( "rot_rdq" );
318
 
319
    CYG_TEST_INFO( "Testing suspend/resume" );
320
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
321
    ercd = sus_tsk( -6 );
322
    CYG_TEST_CHECK( E_ID == ercd, "sus_tsk bad ercd !E_ID" );
323
    ercd = sus_tsk( 99 );
324
    CYG_TEST_CHECK( E_ID == ercd, "sus_tsk bad ercd !E_ID" );
325
    ercd = rsm_tsk( -6 );
326
    CYG_TEST_CHECK( E_ID == ercd, "rsm_tsk bad ercd !E_ID" );
327
    ercd = rsm_tsk( 99 );
328
    CYG_TEST_CHECK( E_ID == ercd, "rsm_tsk bad ercd !E_ID" );
329
    ercd = frsm_tsk( -6 );
330
    CYG_TEST_CHECK( E_ID == ercd, "frsm_tsk bad ercd !E_ID" );
331
    ercd = frsm_tsk( 99 );
332
    CYG_TEST_CHECK( E_ID == ercd, "frsm_tsk bad ercd !E_ID" );
333
#endif // we can test bad param error returns
334
    // drop task 3 pri to same as us
335
    CYG_TEST_CHECK( 0 == intercount, "intercount != 0" );
336
 
337
    intercom = 3;                       // tell T3 to loop
338
    TSRELEASE();
339
    ercd = dis_dsp();
340
    CYG_TEST_CHECK( E_OK == ercd, "dis_dsp bad ercd" );
341
    ercd = sta_tsk( 3, 66 );
342
    CYG_TEST_CHECK( E_OK == ercd, "sta_tsk bad ercd" );
343
    ercd = chg_pri( 3, 5 );
344
    CYG_TEST_CHECK( E_OK == ercd, "chg_pri bad ercd" );
345
    ercd = ena_dsp();
346
    CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" );
347
 
348
    ercd = rot_rdq( 0 );
349
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
350
    ICWAIT( 1 );
351
    CYG_TEST_CHECK( 1 == intercount, "intercount != 1" );
352
    ercd = sus_tsk( 3 );
353
    TSRELEASE();
354
    CYG_TEST_CHECK( E_OK == ercd, "sus_tsk bad ercd" );
355
    intercom = 0;                       // bad data to T3
356
    ercd = rot_rdq( 0 );
357
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
358
    CYG_TEST_CHECK( 1 == intercount, "intercount != 1" );
359
    intercom = 3;                       // tell T3 to loop
360
    TSRELEASE();
361
    ercd = rsm_tsk( 3 );
362
    CYG_TEST_CHECK( E_OK == ercd, "rsm_tsk bad ercd" );
363
    ercd = rot_rdq( 0 );
364
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
365
    ICWAIT( 2 );
366
    CYG_TEST_CHECK( 2 == intercount, "intercount != 2" );
367
 
368
    CYG_TEST_INFO( "Command task 3 inner loop stop" );
369
    intercom = 2 + 4;
370
    TSRELEASE();
371
    ercd = rot_rdq( 0 );
372
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
373
    CYG_TEST_CHECK( 2 == intercount, "intercount != 2" );
374
 
375
    ercd = sus_tsk( 3 );
376
    CYG_TEST_CHECK( E_OK == ercd, "sus_tsk bad ercd" );
377
    intercom = 0;                       // bad data to T3
378
    TSRELEASE();
379
    ercd = rot_rdq( 0 );
380
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
381
    ercd = sus_tsk( 3 );                // suspend AGAIN
382
    CYG_TEST_CHECK( E_OK == ercd, "sus_tsk bad ercd" );
383
    ercd = sus_tsk( 3 );                //     AND AGAIN
384
    CYG_TEST_CHECK( E_OK == ercd, "sus_tsk bad ercd" );
385
    TSRELEASE();
386
    ercd = rot_rdq( 0 );
387
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
388
    CYG_TEST_CHECK( 2 == intercount, "intercount != 2" );
389
    ercd = rsm_tsk( 3 );
390
    CYG_TEST_CHECK( E_OK == ercd, "rsm_tsk bad ercd" );
391
    ercd = rsm_tsk( 3 );
392
    CYG_TEST_CHECK( E_OK == ercd, "rsm_tsk bad ercd" );
393
    TSRELEASE();
394
    ercd = rot_rdq( 0 );
395
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
396
    CYG_TEST_CHECK( 2 == intercount, "intercount != 2" );
397
    intercom = 3;                       // tell T3 to loop
398
    TSRELEASE();
399
    ercd = rsm_tsk( 3 );                // expect restart this time
400
    CYG_TEST_CHECK( E_OK == ercd, "rsm_tsk bad ercd" );
401
    ercd = rot_rdq( 0 );
402
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
403
    ICWAIT( 3 );
404
    CYG_TEST_CHECK( 3 == intercount, "intercount != 3" );
405
 
406
    CYG_TEST_INFO( "Command task 3 inner loop stop 2" );
407
    intercom = 2 + 4;
408
    TSRELEASE();
409
    ercd = rot_rdq( 0 );
410
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
411
    CYG_TEST_CHECK( 3 == intercount, "intercount != 3" );
412
 
413
    ercd = sus_tsk( 3 );
414
    CYG_TEST_CHECK( E_OK == ercd, "sus_tsk bad ercd" );
415
    intercom = 0;                       // bad data to T3
416
    TSRELEASE();
417
    ercd = rot_rdq( 0 );
418
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
419
    CYG_TEST_CHECK( 3 == intercount, "intercount != 3" );
420
    ercd = sus_tsk( 3 );                // suspend AGAIN
421
    CYG_TEST_CHECK( E_OK == ercd, "sus_tsk bad ercd" );
422
    ercd = sus_tsk( 3 );                //     AND AGAIN
423
    CYG_TEST_CHECK( E_OK == ercd, "sus_tsk bad ercd" );
424
    TSRELEASE();
425
    ercd = rot_rdq( 0 );
426
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
427
    CYG_TEST_CHECK( 3 == intercount, "intercount != 3" );
428
    intercom = 3;                       // tell T3 to loop
429
    TSRELEASE();
430
    ercd = frsm_tsk( 3 );               // expect restart this time
431
    CYG_TEST_CHECK( E_OK == ercd, "frsm_tsk bad ercd" );
432
    ercd = rot_rdq( 0 );
433
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
434
    ICWAIT( 4 );
435
    CYG_TEST_CHECK( 4 == intercount, "intercount != 4" );
436
 
437
    TSRELEASE();
438
    ercd = rsm_tsk( 3 );               // try it again
439
    CYG_TEST_CHECK( E_OBJ == ercd, "rsm_tsk bad ercd !E_OBJ" );
440
    ercd = rot_rdq( 0 );
441
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
442
    ICWAIT( 5 );
443
    CYG_TEST_CHECK( 5 == intercount, "intercount != 5" );
444
 
445
    TSRELEASE();
446
    ercd = frsm_tsk( 3 );               // try it again
447
    CYG_TEST_CHECK( E_OBJ == ercd, "frsm_tsk bad ercd !E_OBJ" );
448
    ercd = rot_rdq( 0 );
449
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
450
    ICWAIT( 6 );
451
    CYG_TEST_CHECK( 6 == intercount, "intercount != 6" );
452
 
453
    CYG_TEST_INFO( "Command task 3 all loops stop" );
454
    intercom = 4 + 8;
455
    TSRELEASE();
456
    ercd = rot_rdq( 0 );
457
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
458
    TSRELEASE();
459
    ercd = rot_rdq( 0 );
460
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
461
    CYG_TEST_CHECK( 6 == intercount, "intercount != 6" );
462
 
463
    intercom = intercount = 0;
464
 
465
    CYG_TEST_PASS( "sus_tsk, rsm_tsk, frsm_tsk" );
466
 
467
    CYG_TEST_INFO( "Testing sleep/wakeup stuff" );
468
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
469
    ercd = wup_tsk( -6 );
470
    CYG_TEST_CHECK( E_ID == ercd, "wup_tsk bad ercd !E_ID" );
471
    ercd = wup_tsk( 99 );
472
    CYG_TEST_CHECK( E_ID == ercd, "wup_tsk bad ercd !E_ID" );
473
    ercd = can_wup( &scratch, -6 );
474
    CYG_TEST_CHECK( E_ID == ercd, "can_wup bad ercd !E_ID" );
475
    ercd = can_wup( &scratch, 99 );
476
    CYG_TEST_CHECK( E_ID == ercd, "can_wup bad ercd !E_ID" );
477
#ifndef CYGSEM_UITRON_PARAMS_NULL_IS_GOOD_PTR
478
    ercd = can_wup( NULL, 2 );
479
    CYG_TEST_CHECK( E_PAR == ercd, "can_wup bad ercd !E_PAR" );
480
#endif
481
    ercd = can_wup( NADR, 2 );
482
    CYG_TEST_CHECK( E_PAR == ercd, "can_wup bad ercd !E_PAR" );
483
 
484
    ercd = wup_tsk( 0 );                // not ourself
485
    CYG_TEST_CHECK( E_ID == ercd, "wup_tsk bad ercd !E_ID" );
486
    ercd = wup_tsk( 1 );                // ourself
487
    CYG_TEST_CHECK( E_OBJ == ercd, "wup_tsk bad ercd !E_OBJ" );
488
#endif // we can test bad param error returns
489
 
490
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
491
    ercd = tslp_tsk( -6 );
492
    CYG_TEST_CHECK( E_PAR == ercd, "tslp_tsk bad ercd !E_PAR" );
493
#endif // we can test bad param error returns
494
    ercd = tslp_tsk( TMO_POL );
495
    CYG_TEST_CHECK( E_TMOUT == ercd, "tslp_tsk bad ercd !E_TMOUT" );
496
    ercd = tslp_tsk( 5 );
497
    CYG_TEST_CHECK( E_TMOUT == ercd, "tslp_tsk bad ercd !E_TMOUT" );
498
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
499
    ercd = dis_dsp();
500
    CYG_TEST_CHECK( E_OK == ercd, "dis_dsp bad ercd" );
501
    ercd = tslp_tsk( TMO_FEVR );
502
    CYG_TEST_CHECK( E_CTX == ercd, "tslp_tsk bad ercd !E_CTX" );
503
     ercd = tslp_tsk( TMO_POL );
504
    CYG_TEST_CHECK( E_CTX == ercd, "tslp_tsk bad ercd !E_CTX" );
505
    ercd = tslp_tsk( 5 );
506
    CYG_TEST_CHECK( E_CTX == ercd, "tslp_tsk bad ercd !E_CTX" );
507
    ercd = ena_dsp();
508
    CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" );
509
    ercd = tslp_tsk( -6 );
510
    CYG_TEST_CHECK( E_PAR == ercd, "tslp_tsk bad ercd !E_PAR" );
511
#endif // we can test bad param error returns
512
    ercd = tslp_tsk( TMO_POL );
513
    CYG_TEST_CHECK( E_TMOUT == ercd, "tslp_tsk bad ercd !E_TMOUT" );
514
    ercd = tslp_tsk( 5 );
515
    CYG_TEST_CHECK( E_TMOUT == ercd, "tslp_tsk bad ercd !E_TMOUT" );
516
 
517
    // drop task 4 pri to same as us
518
    intercount = 0;
519
    intercom = 1;                       // test plain slp_tsk
520
    TSRELEASE();
521
    ercd = chg_pri( 4, 5 );
522
    CYG_TEST_CHECK( E_OBJ == ercd, "chg_pri bad ercd" );
523
 
524
    ercd = dis_dsp();
525
    CYG_TEST_CHECK( E_OK == ercd, "dis_dsp bad ercd" );
526
    ercd = sta_tsk( 4, 77 );
527
    CYG_TEST_CHECK( E_OK == ercd, "sta_tsk bad ercd" );
528
    ercd = chg_pri( 4, 5 );
529
    CYG_TEST_CHECK( E_OK == ercd, "chg_pri bad ercd" );
530
    ercd = ena_dsp();
531
    CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" );
532
 
533
    ercd = wup_tsk( 4 );
534
    CYG_TEST_CHECK( E_OK == ercd, "wup_tsk bad ercd" );
535
    ercd = rot_rdq( 0 );
536
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
537
    ICWAIT( 1 );
538
    CYG_TEST_CHECK( 1 == intercount, "intercount != 1" );
539
    intercom = 2;                       // test tslp_tsk
540
    TSRELEASE();
541
    ercd = wup_tsk( 4 );
542
    CYG_TEST_CHECK( E_OK == ercd, "wup_tsk bad ercd" );
543
    ercd = rot_rdq( 0 );
544
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
545
    ICWAIT( 2 );
546
    CYG_TEST_CHECK( 2 == intercount, "intercount != 2" );
547
    intercom = 3;                       // test tslp_tsk
548
    TSRELEASE();
549
    ercd = rot_rdq( 0 );
550
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
551
    CYG_TEST_CHECK( 2 == intercount, "intercount != 2" );
552
    intercom = 1;                       // test slp_tsk next...
553
    ercd = dly_tsk( 20 );               // without a wup
554
    CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" );
555
    ICWAIT( 3 );
556
    CYG_TEST_CHECK( 3 == intercount, "intercount != 3" );
557
 
558
    intercom = 1;                       // ...test slp_tsk
559
    TSRELEASE();
560
    ercd = dly_tsk( 20 );               // without a wup (yet)
561
    CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" );
562
    CYG_TEST_CHECK( 3 == intercount, "intercount != 3" );
563
    TSRELEASE();
564
    ercd = tslp_tsk( 20 );              // yield again
565
    CYG_TEST_CHECK( E_TMOUT == ercd, "tslp_tsk bad ercd !E_TMOUT" );
566
    CYG_TEST_CHECK( 3 == intercount, "intercount != 3" );
567
    TSRELEASE();
568
    ercd = rot_rdq( 0 );                // and again
569
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
570
    CYG_TEST_CHECK( 3 == intercount, "intercount != 3" );
571
    TSRELEASE();
572
    ercd = wup_tsk( 4 );                // now issue a wup
573
    CYG_TEST_CHECK( E_OK == ercd, "wup_tsk bad ercd" );
574
    ercd = rot_rdq( 0 );                // and yield
575
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
576
    ICWAIT( 4 );
577
    CYG_TEST_CHECK( 4 == intercount, "intercount != 4" );
578
 
579
    intercom = 1;                       // test slp_tsk
580
    TSRELEASE();
581
    ercd = dly_tsk( 20 );               // without a wup (yet)
582
    CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" );
583
    CYG_TEST_CHECK( 4 == intercount, "intercount != 4" );
584
 
585
    // this wup will restart it when we yield:
586
    TSLOCK();
587
    ercd = wup_tsk( 4 );                // now issue a wup
588
    CYG_TEST_CHECK( E_OK == ercd, "wup_tsk bad ercd" );
589
    // these will count up:
590
    ercd = wup_tsk( 4 );                // now issue a wup
591
    CYG_TEST_CHECK( E_OK == ercd, "wup_tsk bad ercd" );
592
    ercd = wup_tsk( 4 );                // now issue a wup
593
    CYG_TEST_CHECK( E_OK == ercd, "wup_tsk bad ercd" );
594
    scratch = -1;
595
    ercd = can_wup( &scratch, 4 );
596
    CYG_TEST_CHECK( E_OK == ercd, "can_wup bad ercd" );
597
    CYG_TEST_CHECK( 2 == scratch, "Cancelled wups not 2" );
598
    CYG_TEST_CHECK( 4 == intercount, "intercount != 4" );
599
    TSUNLOCK();
600
 
601
    intercom = 4;                       // do nothing
602
    TSRELEASE();
603
    ercd = rot_rdq( 0 );                // and yield
604
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
605
    ICWAIT( 5 );
606
    CYG_TEST_CHECK( 5 == intercount, "intercount != 5" );
607
    TSRELEASE();
608
    ercd = dly_tsk( 20 );               // let it do nothing
609
    CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" );
610
 
611
    TSRELEASE();
612
    ercd = wup_tsk( 4 );                // now issue a wup
613
    CYG_TEST_CHECK( E_OK == ercd, "wup_tsk bad ercd" );
614
    TSRELEASE();
615
    ercd = wup_tsk( 4 );                // now issue a wup
616
    CYG_TEST_CHECK( E_OK == ercd, "wup_tsk bad ercd" );
617
    TSRELEASE();
618
    ercd = wup_tsk( 4 );                // now issue a wup
619
    CYG_TEST_CHECK( E_OK == ercd, "wup_tsk bad ercd" );
620
    TSRELEASE();
621
    ercd = dly_tsk( 20 );               // lots of wups but no sleep
622
    CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" );
623
    CYG_TEST_CHECK( 5 == intercount, "intercount != 5" );
624
    scratch = -1;
625
    ercd = can_wup( &scratch, 4 );
626
    CYG_TEST_CHECK( E_OK == ercd, "can_wup bad ercd" );
627
    CYG_TEST_CHECK( 3 == scratch, "Cancelled wups not 3" );
628
    // now check that they are cancelled by doing a wait again
629
    intercom = 1;                       // test slp_tsk
630
    TSRELEASE();
631
    ercd = rot_rdq( 0 );                // still without a wup
632
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
633
    TSRELEASE();
634
    ercd = rot_rdq( 0 );                // still without a wup
635
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
636
    intercom = 4;                       // do nothing next
637
    TSRELEASE();
638
    ICWAIT( 6 );
639
    CYG_TEST_CHECK( 6 == intercount, "intercount != 6" );
640
    ercd = rot_rdq( 0 );                // still without a wup
641
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
642
    CYG_TEST_CHECK( 6 == intercount, "intercount != 6" );
643
    TSRELEASE();
644
    ercd = wup_tsk( 4 );                // now issue a wup
645
    CYG_TEST_CHECK( E_OK == ercd, "wup_tsk bad ercd" );
646
    ercd = rot_rdq( 0 );                // it will run now
647
    CYG_TEST_CHECK( E_OK == ercd, "wup_tsk bad ercd" );
648
    TSRELEASE();
649
    ercd = rot_rdq( 0 );                // it will run now
650
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
651
    ICWAIT( 7 );
652
    CYG_TEST_CHECK( 7 == intercount, "intercount != 7" );
653
 
654
    TSRELEASE();
655
    intercom = 99;                      // exit, all done
656
    ercd = rot_rdq( 0 );                // let it run
657
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
658
    ICWAIT( 8 );
659
    CYG_TEST_CHECK( 8 == intercount, "intercount != 8" );
660
 
661
    TSRELEASE();
662
    ercd = rot_rdq( 0 );                // let it run
663
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
664
    CYG_TEST_CHECK( 8 == intercount, "intercount != 8" );
665
 
666
    CYG_TEST_PASS( "wup_tsk, can_wup, slp_tsk, tslp_tsk" );
667
 
668
#ifdef CYG_TEST_UITRON_TEST1_LOOPING
669
    chg_pri( 1, 1 );
670
    rot_rdq( 0 );
671
    ter_tsk( 2 );
672
    rot_rdq( 0 );
673
    ter_tsk( 3 );
674
    rot_rdq( 0 );
675
    ter_tsk( 4 );
676
    rot_rdq( 0 );
677
    }
678
#endif // CYG_TEST_UITRON_TEST1_LOOPING
679
 
680
    CYG_TEST_EXIT( "All done" );
681
    ext_tsk();
682
}
683
 
684
 
685
 
686
void task2( unsigned int arg )
687
{
688
    ER ercd;
689
    CYG_TEST_PASS( "Task 2 running" );
690
    ercd = get_tid( &scratch );
691
    CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" );
692
    CYG_TEST_CHECK( 2 == scratch, "tid not 2" );
693
    if ( 99 != arg )
694
        CYG_TEST_FAIL( "Task 2 arg not 99" );
695
    ext_tsk();
696
    CYG_TEST_FAIL( "Task 2 failed to exit" );
697
}
698
 
699
void task3( unsigned int arg )
700
{
701
    ER ercd;
702
    TSLOCK();
703
    CYG_TEST_PASS("Task3 running");
704
    ercd = get_tid( &scratch );
705
    CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" );
706
    CYG_TEST_CHECK( 3 == scratch, "tid not 3" );
707
    if ( 66 != arg )
708
        CYG_TEST_FAIL( "Task 3 arg not 66" );
709
 
710
    while ( 2 & intercom ) {
711
        while ( 1 & intercom ) {
712
            intercount++;
713
            TSSTOP();
714
            do {
715
                TSUNLOCK();
716
                ercd = rot_rdq( 0 );        // yield()
717
                TSLOCK();
718
                CYG_TEST_CHECK( E_OK == ercd, "rot_rdq 1 (task3) bad ercd" );
719
            } while ( !TSGO() );
720
        }
721
        CYG_TEST_CHECK( 4 & intercom, "should not have got here yet 1" );
722
        TSSTOP();
723
        do {
724
            TSUNLOCK();
725
            ercd = rot_rdq( 0 );            // yield()
726
            TSLOCK();
727
            CYG_TEST_CHECK( E_OK == ercd, "rot_rdq 2 (task3) bad ercd" );
728
        } while ( !TSGO() );
729
    }
730
    CYG_TEST_CHECK( 8 & intercom, "should not have got here yet 2" );
731
 
732
    TSUNLOCK();
733
    ext_tsk();
734
    CYG_TEST_FAIL( "Task 3 failed to exit" );
735
}
736
 
737
void task4( unsigned int arg )
738
{
739
    ER ercd;
740
    CYG_TEST_PASS("Task4 running");
741
    ercd = get_tid( &scratch );
742
    CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" );
743
    CYG_TEST_CHECK( 4 == scratch, "tid not 4" );
744
    if ( 77 != arg )
745
        CYG_TEST_FAIL( "Task 4 arg not 77" );
746
    while ( 1 ) {
747
        switch ( intercom ) {
748
        case 1:
749
            ercd = slp_tsk();
750
            CYG_TEST_CHECK( E_OK == ercd, "slp_tsk (task4) bad ercd" );
751
            break;
752
        case 2:
753
            ercd = tslp_tsk( 10 );
754
            CYG_TEST_CHECK( E_OK == ercd, "slp_tsk (task4) bad ercd" );
755
            break;
756
        case 3:
757
            ercd = tslp_tsk( 10 );
758
            CYG_TEST_CHECK( E_TMOUT == ercd,
759
                            "slp_tsk (task4) bad ercd !E_TMOUT" );
760
            break;
761
        case 4:
762
            // busily do nothing
763
            while ( 4 == intercom ) {
764
                ercd = rot_rdq( 0 );
765
                CYG_TEST_CHECK( E_OK == ercd,
766
                                "rot_rdq (task4 idle) bad ercd" );
767
            }
768
            break;
769
        case 99:
770
            goto out;
771
        default:
772
            CYG_TEST_FAIL( "Task 4 bad intercom" );
773
            goto out;
774
        }
775
        intercount++;
776
        TSSTOP();
777
        do {
778
            ercd = rot_rdq( 0 );            // yield()
779
            CYG_TEST_CHECK( E_OK == ercd, "rot_rdq (task4) bad ercd" );
780
        } while ( !TSGO() );
781
    }
782
out:
783
    ext_tsk();
784
    CYG_TEST_FAIL( "Task 4 failed to exit" );
785
}
786
 
787
#else // not enough (or too many) uITRON objects configured in
788
#define N_A_MSG "not enough uITRON objects to run test"
789
#endif // not enough (or too many) uITRON objects configured in
790
#else  // not C++ and some C++ specific options enabled
791
#define N_A_MSG "C++ specific options selected but this is C"
792
#endif  // not C++ and some C++ specific options enabled
793
#else // ! CYGVAR_KERNEL_COUNTERS_CLOCK   - can't test without it
794
#define N_A_MSG "no CYGVAR_KERNEL_COUNTERS_CLOCK"
795
#endif // ! CYGVAR_KERNEL_COUNTERS_CLOCK  - can't test without it
796
#else  // ! CYGFUN_KERNEL_THREADS_TIMER   - can't test without it
797
#define N_A_MSG "no CYGFUN_KERNEL_THREADS_TIMER"
798
#endif // ! CYGFUN_KERNEL_THREADS_TIMER   - can't test without it
799
#else  // ! CYGIMP_THREAD_PRIORITY        - can't test without it
800
#define N_A_MSG "no CYGSEM_KERNEL_SCHED_MLQUEUE"
801
#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE   - can't test without it
802
#else  // ! CYGPKG_UITRON
803
#define N_A_MSG "uITRON Compatibility layer disabled"
804
#endif // CYGPKG_UITRON
805
 
806
#ifdef N_A_MSG
807
void
808
cyg_start( void )
809
{
810
    CYG_TEST_INIT();
811
    CYG_TEST_NA( N_A_MSG );
812
}
813
#endif // N_A_MSG defined ie. we are N/A.
814
 
815
// EOF test1.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.