OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [devs/] [eth/] [cf/] [v2_0/] [include/] [devs_eth_cf.inl] - Blame information for rev 174

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 27 unneback
//==========================================================================
2
//
3
//      devs_eth_cf.inl
4
//
5
//      CF (PCMCIA) ethernet I/O definitions.
6
//
7
//==========================================================================
8
//####ECOSGPLCOPYRIGHTBEGIN####
9
// -------------------------------------------
10
// This file is part of eCos, the Embedded Configurable Operating System.
11
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12
//
13
// eCos is free software; you can redistribute it and/or modify it under
14
// the terms of the GNU General Public License as published by the Free
15
// Software Foundation; either version 2 or (at your option) any later version.
16
//
17
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
19
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
20
// for more details.
21
//
22
// You should have received a copy of the GNU General Public License along
23
// with eCos; if not, write to the Free Software Foundation, Inc.,
24
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25
//
26
// As a special exception, if other files instantiate templates or use macros
27
// or inline functions from this file, or you compile this file and link it
28
// with other works to produce a work based on this file, this file does not
29
// by itself cause the resulting work to be covered by the GNU General Public
30
// License. However the source code for this file must still be made available
31
// in accordance with section (3) of the GNU General Public License.
32
//
33
// This exception does not invalidate any other reasons why a work based on
34
// this file might be covered by the GNU General Public License.
35
//
36
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
37
// at http://sources.redhat.com/ecos/ecos-license/
38
// -------------------------------------------
39
//####ECOSGPLCOPYRIGHTEND####
40
//==========================================================================
41
//#####DESCRIPTIONBEGIN####
42
//
43
// Author(s):   jskov
44
// Contributors:jskov
45
// Date:        2001-06-15
46
// Purpose:     PCMCIA ethernet defintions
47
//
48
//####DESCRIPTIONEND####
49
//==========================================================================
50
 
51
#include            // CYGNUM_HAL_INTERRUPT_ETHR
52
#include 
53
#include 
54
#include 
55
 
56
#ifdef __WANT_CONFIG
57
 
58
#undef CYGHWR_NS_DP83902A_PLF_INT_CLEAR
59
#define CYGHWR_NS_DP83902A_PLF_INT_CLEAR(_dp_)                  \
60
    CYG_MACRO_START                                             \
61
    struct cf_slot* slot = (struct cf_slot*) (_dp_)->plf_priv;  \
62
    cf_clear_interrupt(slot);                                   \
63
    CYG_MACRO_END
64
 
65
#endif // __WANT_CONFIG
66
 
67
#ifdef __WANT_DEVS
68
 
69
externC int cyg_sc_lpe_int_vector(struct eth_drv_sc *sc);
70
externC bool cyg_sc_lpe_init(struct cyg_netdevtab_entry *tab);
71
 
72
#ifdef CYGPKG_DEVS_ETH_CF_ETH0
73
 
74
static dp83902a_priv_data_t dp83902a_eth0_priv_data = {
75
    tx_buf1: 0x40,
76
    tx_buf2: 0x48,
77
    rx_buf_start: 0x50,
78
    rx_buf_end: 0x80,
79
#ifdef CYGSEM_DEVS_ETH_CF_ETH0_SET_ESA
80
    esa : CYGDAT_DEVS_ETH_CF_ETH0_ESA,
81
    hardwired_esa : true,
82
#else
83
    hardwired_esa : false,
84
#endif
85
};
86
 
87
ETH_DRV_SC(dp83902a_sc,
88
           &dp83902a_eth0_priv_data, // Driver specific data
89
           CYGDAT_DEVS_ETH_CF_ETH0_NAME,
90
           dp83902a_start,
91
           dp83902a_stop,
92
           dp83902a_control,
93
           dp83902a_can_send,
94
           dp83902a_send,
95
           dp83902a_recv,
96
           dp83902a_deliver,     // "pseudoDSR" called from fast net thread
97
           dp83902a_poll,        // poll function, encapsulates ISR and DSR
98
           cyg_sc_lpe_int_vector);
99
 
100
NETDEVTAB_ENTRY(dp83902a_netdev,
101
                "dp83902a_" CYGDAT_DEVS_ETH_CF_ETH0_NAME,
102
                cyg_sc_lpe_init,
103
                &dp83902a_sc);
104
#endif // CYGPKG_DEVS_ETH_CF_ETH0
105
 
106
#endif // __WANT_DEVS
107
 
108
// EOF devs_eth_cf.inl

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.