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//==========================================================================
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//
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//      devs_eth_sh_se77x9.inl
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//
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//      SE77X9 ethernet I/O definitions.
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):   jskov
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// Contributors:jskov
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// Date:        2001-06-13
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// Purpose:     SE77X9 ethernet defintions
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//
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// FIXME:       M17 contains an EPROM. May contain the ESA, but don't
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//              know how to access it.
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//
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//####DESCRIPTIONEND####
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//==========================================================================
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#include            // CYGNUM_HAL_INTERRUPT_ETHR
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#include 
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#ifdef __WANT_CONFIG
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#define CYGHWR_NS_DP83902A_PLF_RESET(_dp_)      \
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    CYG_MACRO_START                             \
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    HAL_WRITE_UINT16(_dp_->reset, 0x0000);      \
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    CYGACC_CALL_IF_DELAY_US(10);                \
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    HAL_WRITE_UINT16(_dp_->reset, 0x0100);      \
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    CYG_MACRO_END
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#define DP_IN(_b_, _o_, _d_)                                    \
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    CYG_MACRO_START                                             \
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    cyg_uint16 _t;                                              \
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    HAL_READ_UINT16 ((cyg_addrword_t)(_b_)+2*(_o_), _t);        \
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    (_d_) = (_t >> 8) & 0xff;                                   \
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    CYG_MACRO_END
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#define DP_OUT(_b_, _o_, _d_)                                   \
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    CYG_MACRO_START                                             \
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    HAL_WRITE_UINT16((cyg_addrword_t)(_b_)+2*(_o_), (_d_)<<8);  \
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    CYG_MACRO_END
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#define DP_IN_DATA(_b_, _d_)                                    \
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    CYG_MACRO_START                                             \
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    cyg_uint16 _t;                                              \
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    HAL_READ_UINT16 ((cyg_addrword_t)(_b_), _t);                \
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    (_d_) = ((_t >> 8) & 0xff) | ((_t & 0xff) << 8);            \
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    CYG_MACRO_END
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#define DP_OUT_DATA(_b_, _d_)                                   \
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    CYG_MACRO_START                                             \
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    cyg_uint16 _t;                                              \
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    _t = (_d_);                                                 \
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    (_t) = (((_t) >> 8) & 0xff) | ((_t & 0xff) << 8);           \
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    HAL_WRITE_UINT16((cyg_addrword_t)(_b_), _t);                \
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    CYG_MACRO_END
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#define CYGHWR_NS_DP83902A_PLF_16BIT_DATA
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#define CYGHWR_NS_DP83902A_PLF_BROKEN_TX_DMA
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#endif // __WANT_CONFIG
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#ifdef __WANT_DEVS
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#ifdef CYGPKG_DEVS_ETH_SH_SE77X9_ETH0
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static dp83902a_priv_data_t dp83902a_eth0_priv_data = {
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    base : (cyg_uint8*) 0xb0000000,
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    data : (cyg_uint8*) 0xb0040000,
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    reset: (cyg_uint8*) 0xb0080000,
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    interrupt: CYGNUM_HAL_INTERRUPT_LAN,
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    tx_buf1: 0x80,
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    tx_buf2: 0x88,
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    rx_buf_start: 0x90,
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    rx_buf_end: 0xff,
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#ifdef CYGSEM_DEVS_ETH_SH_SE77X9_ETH0_SET_ESA
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    esa : CYGDAT_DEVS_ETH_SH_SE77X9_ETH0_ESA,
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    hardwired_esa : true,
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#else
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    hardwired_esa : false,
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#endif
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};
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ETH_DRV_SC(dp83902a_sc,
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           &dp83902a_eth0_priv_data, // Driver specific data
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           CYGDAT_DEVS_ETH_SH_SE77X9_ETH0_NAME,
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           dp83902a_start,
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           dp83902a_stop,
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           dp83902a_control,
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           dp83902a_can_send,
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           dp83902a_send,
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           dp83902a_recv,
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           dp83902a_deliver,     // "pseudoDSR" called from fast net thread
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           dp83902a_poll,        // poll function, encapsulates ISR and DSR
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           dp83902a_int_vector);
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NETDEVTAB_ENTRY(dp83902a_netdev,
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                "dp83902a_" CYGDAT_DEVS_ETH_SH_SE77X9_ETH0_NAME,
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                dp83902a_init,
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                &dp83902a_sc);
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#endif // CYGPKG_DEVS_ETH_SH_SE77X9_ETH0
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#endif // __WANT_DEVS
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// EOF devs_eth_sh_se77x9.inl

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