OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [devs/] [flash/] [arm/] [integrator/] [v2_0/] [src/] [arm_integrator_flash.c] - Blame information for rev 27

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 27 unneback
//==========================================================================
2
//
3
//      arm_integrator_flash.c
4
//
5
//      Flash programming for Intel FlashFile devices on ARM Integrator board
6
//
7
//==========================================================================
8
//####ECOSGPLCOPYRIGHTBEGIN####
9
// -------------------------------------------
10
// This file is part of eCos, the Embedded Configurable Operating System.
11
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12
//
13
// eCos is free software; you can redistribute it and/or modify it under
14
// the terms of the GNU General Public License as published by the Free
15
// Software Foundation; either version 2 or (at your option) any later version.
16
//
17
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
19
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
20
// for more details.
21
//
22
// You should have received a copy of the GNU General Public License along
23
// with eCos; if not, write to the Free Software Foundation, Inc.,
24
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25
//
26
// As a special exception, if other files instantiate templates or use macros
27
// or inline functions from this file, or you compile this file and link it
28
// with other works to produce a work based on this file, this file does not
29
// by itself cause the resulting work to be covered by the GNU General Public
30
// License. However the source code for this file must still be made available
31
// in accordance with section (3) of the GNU General Public License.
32
//
33
// This exception does not invalidate any other reasons why a work based on
34
// this file might be covered by the GNU General Public License.
35
//
36
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
37
// at http://sources.redhat.com/ecos/ecos-license/
38
// -------------------------------------------
39
//####ECOSGPLCOPYRIGHTEND####
40
//==========================================================================
41
//#####DESCRIPTIONBEGIN####
42
//
43
// Author(s):    jskov
44
// Contributors: jskov
45
// Date:         2001-08-07
46
// Purpose:      
47
// Description:  
48
//              
49
//####DESCRIPTIONEND####
50
//
51
//==========================================================================
52
 
53
//--------------------------------------------------------------------------
54
// Device properties
55
 
56
// We use the eight Intel 28F320S3 parts on the Integrator board.
57
// These are arranged in a 2x4 grid, giving 32 bits wide by 32MB long.
58
 
59
#define CYGNUM_FLASH_INTERLEAVE (2)
60
#define CYGNUM_FLASH_SERIES     (4)
61
#define CYGNUM_FLASH_WIDTH      (16)
62
#define CYGNUM_FLASH_BASE       (0x24000000)
63
 
64
//--------------------------------------------------------------------------
65
// Platform specific extras
66
 
67
#define CYGHWR_FLASH_WRITE_ENABLE()                                                             \
68
        {                                                                                       \
69
                volatile cyg_uint32 *ebi_csr1 = (volatile cyg_uint32 *)INTEGRATOR_EBI_CSR1;     \
70
                                                                                                \
71
                /* allow write access to EBI_CSR1 area (Flash) */                               \
72
                *ebi_csr1 |= INTEGRATOR_EBI_WRITE_ENABLE;                                       \
73
                                                                                                \
74
                if (!(*ebi_csr1 & INTEGRATOR_EBI_WRITE_ENABLE)) {                               \
75
                    *(volatile cyg_uint32 *)INTEGRATOR_EBI_LOCK = 0xA05F;                       \
76
                    *ebi_csr1 |= INTEGRATOR_EBI_WRITE_ENABLE;                                   \
77
                    *(volatile cyg_uint32 *)INTEGRATOR_EBI_LOCK = 0;                             \
78
                }                                                                               \
79
                                                                                                \
80
                /* Enable Vpp and allow write access to Flash in system controller */           \
81
                *(volatile unsigned int *)INTEGRATOR_SC_CTRLS = FL_SC_CONTROL;                  \
82
        }
83
 
84
#define CYGHWR_FLASH_WRITE_DISABLE()                                                            \
85
        {                                                                                       \
86
                volatile cyg_uint32 *ebi_csr1 = (volatile cyg_uint32 *)INTEGRATOR_EBI_CSR1;     \
87
                                                                                                \
88
                /* disable write access to EBI_CSR1 area (Flash) */                             \
89
                *ebi_csr1 &= ~INTEGRATOR_EBI_WRITE_ENABLE;                                      \
90
                                                                                                \
91
                if (*ebi_csr1 & INTEGRATOR_EBI_WRITE_ENABLE) {                                  \
92
                    *(volatile cyg_uint32 *)INTEGRATOR_EBI_LOCK = 0xA05F;                       \
93
                    *ebi_csr1 &= ~INTEGRATOR_EBI_WRITE_ENABLE;                                  \
94
                    *(volatile cyg_uint32 *)INTEGRATOR_EBI_LOCK = 1;                            \
95
                }                                                                               \
96
                                                                                                \
97
                /* Disable Vpp and disable write access to Flash in system controller */        \
98
                *(volatile unsigned int *)INTEGRATOR_SC_CTRLS = 0;                               \
99
        }
100
 
101
//--------------------------------------------------------------------------
102
// Now include the driver code.
103
#include "cyg/io/flash_28fxxx.inl"
104
 
105
// ------------------------------------------------------------------------
106
// EOF arm_integrator_flash.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.