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#ifndef CYGONCE_DEVS_FLASH_INTEL_28FXXX_INL
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#define CYGONCE_DEVS_FLASH_INTEL_28FXXX_INL
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//==========================================================================
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//
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// flash_28fxxx.inl
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//
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// Intel 28Fxxx series flash driver
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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// Copyright (C) 2002 Gary Thomas
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): jskov
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// Contributors: jskov
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// Date: 2001-03-21
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// Purpose:
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// Description:
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//
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// Notes: Device table could use unions of flags to save some space
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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#include
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#include
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#include
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#include
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#include
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#include CYGHWR_MEMORY_LAYOUT_H
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#include
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#define _FLASH_PRIVATE_
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#include
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#define nDEBUG
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#ifdef DEBUG
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typedef void (*call_t)(char* str, ...);
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extern void diag_printf(char* str, ...);
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call_t d_print = &diag_printf;
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#endif
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//----------------------------------------------------------------------------
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// Common device details.
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#define FLASH_Read_ID FLASHWORD( 0x90 )
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#define FLASH_Reset FLASHWORD( 0xFF )
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#define FLASH_Program FLASHWORD( 0x40 )
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#define FLASH_Write_Buffer FLASHWORD( 0xe8 )
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#define FLASH_Block_Erase FLASHWORD( 0x20 )
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#define FLASH_Confirm FLASHWORD( 0xD0 )
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#define FLASH_Resume FLASHWORD( 0xD0 )
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#define FLASH_Set_Lock FLASHWORD( 0x60 )
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#define FLASH_Set_Lock_Confirm FLASHWORD( 0x01 )
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#define FLASH_Clear_Lock FLASHWORD( 0x60 )
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#define FLASH_Clear_Lock_Confirm FLASHWORD( 0xd0 )
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#define FLASH_Read_Status FLASHWORD( 0x70 )
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#define FLASH_Clear_Status FLASHWORD( 0x50 )
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#define FLASH_Status_Ready FLASHWORD( 0x80 )
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// Status that we read back:
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#define FLASH_ErrorMask FLASHWORD( 0x7E )
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#define FLASH_ErrorProgram FLASHWORD( 0x10 )
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#define FLASH_ErrorErase FLASHWORD( 0x20 )
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#define FLASH_ErrorLock FLASHWORD( 0x30 )
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#define FLASH_ErrorLowVoltage FLASHWORD( 0x08 )
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#define FLASH_ErrorLocked FLASHWORD( 0x02 )
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// Platform code must define the below
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// #define CYGNUM_FLASH_INTERLEAVE : Number of interleaved devices (in parallel)
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// #define CYGNUM_FLASH_SERIES : Number of devices in series
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// #define CYGNUM_FLASH_WIDTH : Width of devices on platform
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// #define CYGNUM_FLASH_BASE : Address of first device
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#define CYGNUM_FLASH_BLANK (1)
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#define CYGNUM_FLASH_DEVICES (CYGNUM_FLASH_INTERLEAVE*CYGNUM_FLASH_SERIES)
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#ifndef FLASH_P2V
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# define FLASH_P2V( _a_ ) ((volatile flash_data_t *)((CYG_ADDRWORD)(_a_)))
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#endif
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#ifndef CYGHWR_FLASH_28FXXX_PLF_INIT
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# define CYGHWR_FLASH_28FXXX_PLF_INIT()
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#endif
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#ifndef CYGHWR_FLASH_WRITE_ENABLE
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#define CYGHWR_FLASH_WRITE_ENABLE()
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#endif
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#ifndef CYGHWR_FLASH_WRITE_DISABLE
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#define CYGHWR_FLASH_WRITE_DISABLE()
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#endif
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//----------------------------------------------------------------------------
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// Now that device properties are defined, include magic for defining
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// accessor type and constants.
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#include
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//----------------------------------------------------------------------------
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// Information about supported devices
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typedef struct flash_dev_info {
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flash_data_t device_id;
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cyg_uint32 block_size;
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cyg_int32 block_count;
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cyg_uint32 base_mask;
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cyg_uint32 device_size;
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cyg_bool locking; // supports locking
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cyg_bool buffered_w; // supports buffered writes
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cyg_bool bootblock;
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cyg_uint32 bootblocks[12]; // 0 is bootblock offset, 1-11 sub-sector sizes (or 0)
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cyg_bool banked;
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cyg_uint32 banks[2]; // bank offets, highest to lowest (lowest should be 0)
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// (only one entry for now, increase to support devices
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// with more banks).
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} flash_dev_info_t;
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static const flash_dev_info_t* flash_dev_info;
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static const flash_dev_info_t supported_devices[] = {
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#include
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};
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#define NUM_DEVICES (sizeof(supported_devices)/sizeof(flash_dev_info_t))
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//----------------------------------------------------------------------------
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// Functions that put the flash device into non-read mode must reside
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// in RAM.
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void flash_query(void* data) __attribute__ ((section (".2ram.flash_query")));
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int flash_erase_block(void* block, unsigned int size)
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__attribute__ ((section (".2ram.flash_erase_block")));
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int flash_program_buf(void* addr, void* data, int len,
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unsigned long block_mask, int buffer_size)
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__attribute__ ((section (".2ram.flash_program_buf")));
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int flash_lock_block(void* addr)
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__attribute__ ((section (".2ram.flash_lock_block")));
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int flash_unlock_block(void* block, int block_size, int blocks)
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__attribute__ ((section (".2ram.flash_unlock_block")));
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//----------------------------------------------------------------------------
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// Initialize driver details
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int
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flash_hwr_init(void)
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{
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int i;
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flash_data_t id[2];
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CYGHWR_FLASH_28FXXX_PLF_INIT();
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flash_dev_query(id);
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// Look through table for device data
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flash_dev_info = supported_devices;
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for (i = 0; i < NUM_DEVICES; i++) {
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if (flash_dev_info->device_id == id[1])
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break;
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flash_dev_info++;
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}
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// Did we find the device? If not, return error.
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if (NUM_DEVICES == i)
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return FLASH_ERR_DRV_WRONG_PART;
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// Hard wired for now
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flash_info.block_size = flash_dev_info->block_size;
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flash_info.blocks = flash_dev_info->block_count * CYGNUM_FLASH_SERIES;
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flash_info.start = (void *)CYGNUM_FLASH_BASE;
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flash_info.end = (void *)(CYGNUM_FLASH_BASE+ (flash_dev_info->device_size * CYGNUM_FLASH_SERIES));
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return FLASH_ERR_OK;
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}
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//----------------------------------------------------------------------------
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// Map a hardware status to a package error
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int
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flash_hwr_map_error(int e)
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{
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return e;
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}
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//----------------------------------------------------------------------------
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// See if a range of FLASH addresses overlaps currently running code
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bool
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flash_code_overlaps(void *start, void *end)
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{
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extern unsigned char _stext[], _etext[];
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return ((((unsigned long)&_stext >= (unsigned long)start) &&
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((unsigned long)&_stext < (unsigned long)end)) ||
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(((unsigned long)&_etext >= (unsigned long)start) &&
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((unsigned long)&_etext < (unsigned long)end)));
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}
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//----------------------------------------------------------------------------
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// Flash Query
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//
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// Only reads the manufacturer and part number codes for the first
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// device(s) in series. It is assumed that any devices in series
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// will be of the same type.
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void
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flash_query(void* data)
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{
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volatile flash_data_t *ROM;
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flash_data_t* id = (flash_data_t*) data;
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flash_data_t w;
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ROM = (volatile flash_data_t*) CYGNUM_FLASH_BASE;
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w = ROM[0];
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CYGHWR_FLASH_WRITE_ENABLE();
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ROM[0] = FLASH_Read_ID;
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// Manufacturers' code
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id[0] = ROM[0];
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// Part number
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id[1] = ROM[1];
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ROM[0] = FLASH_Reset;
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CYGHWR_FLASH_WRITE_DISABLE();
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// Stall, waiting for flash to return to read mode.
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while (w != ROM[0]);
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}
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//----------------------------------------------------------------------------
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// Erase Block
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int
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flash_erase_block(void* block, unsigned int block_size)
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{
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int res = FLASH_ERR_OK;
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int timeout;
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unsigned long len;
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int len_ix = 1;
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flash_data_t stat;
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volatile flash_data_t *ROM;
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volatile flash_data_t *b_p = (flash_data_t*) block;
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volatile flash_data_t *b_v;
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cyg_bool bootblock;
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ROM = FLASH_P2V((unsigned long)block & flash_dev_info->base_mask);
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// Is this the boot sector?
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bootblock = (flash_dev_info->bootblock &&
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(flash_dev_info->bootblocks[0] == ((unsigned long)block - (unsigned long)ROM)));
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if (bootblock) {
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len = flash_dev_info->bootblocks[len_ix++];
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} else {
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len = flash_dev_info->block_size;
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}
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CYGHWR_FLASH_WRITE_ENABLE();
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while (len > 0) {
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b_v = FLASH_P2V(b_p);
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// Clear any error conditions
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ROM[0] = FLASH_Clear_Status;
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// Erase block
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ROM[0] = FLASH_Block_Erase;
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298 |
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*b_v = FLASH_Confirm;
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299 |
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300 |
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timeout = 5000000;
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301 |
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while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) {
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if (--timeout == 0) break;
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}
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304 |
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305 |
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// Restore ROM to "normal" mode
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306 |
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ROM[0] = FLASH_Reset;
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307 |
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308 |
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if (stat & FLASH_ErrorMask) {
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309 |
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if (!(stat & FLASH_ErrorErase)) {
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310 |
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res = FLASH_ERR_HWR; // Unknown error
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311 |
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} else {
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312 |
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if (stat & FLASH_ErrorLowVoltage)
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313 |
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res = FLASH_ERR_LOW_VOLTAGE;
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314 |
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else if (stat & FLASH_ErrorLocked)
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315 |
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res = FLASH_ERR_PROTECT;
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316 |
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else
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317 |
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res = FLASH_ERR_ERASE;
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318 |
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}
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319 |
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}
|
320 |
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|
321 |
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// Check if block got erased
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322 |
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while (len > 0) {
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323 |
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b_v = FLASH_P2V(b_p++);
|
324 |
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if (*b_v != FLASH_BlankValue ) {
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325 |
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// Only update return value if erase operation was OK
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326 |
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if (FLASH_ERR_OK == res) res = FLASH_ERR_DRV_VERIFY;
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327 |
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return res;
|
328 |
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}
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329 |
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len -= sizeof(*b_p);
|
330 |
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}
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331 |
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|
332 |
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if (bootblock)
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len = flash_dev_info->bootblocks[len_ix++];
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334 |
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}
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335 |
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|
336 |
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CYGHWR_FLASH_WRITE_DISABLE();
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337 |
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|
338 |
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return res;
|
339 |
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}
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340 |
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|
341 |
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//----------------------------------------------------------------------------
|
342 |
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// Program Buffer
|
343 |
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int
|
344 |
|
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flash_program_buf(void* addr, void* data, int len,
|
345 |
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unsigned long block_mask, int buffer_size)
|
346 |
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{
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347 |
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flash_data_t stat = 0;
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348 |
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int timeout;
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349 |
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350 |
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volatile flash_data_t* ROM;
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351 |
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volatile flash_data_t* BA;
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352 |
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volatile flash_data_t* addr_v;
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353 |
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volatile flash_data_t* addr_p = (flash_data_t*) addr;
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354 |
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volatile flash_data_t* data_p = (flash_data_t*) data;
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355 |
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356 |
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int res = FLASH_ERR_OK;
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357 |
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358 |
|
|
// Base address of device(s) being programmed.
|
359 |
|
|
ROM = FLASH_P2V((unsigned long)addr & flash_dev_info->base_mask);
|
360 |
|
|
BA = FLASH_P2V((unsigned long)addr & ~(flash_dev_info->block_size - 1));
|
361 |
|
|
|
362 |
|
|
CYGHWR_FLASH_WRITE_ENABLE();
|
363 |
|
|
|
364 |
|
|
// Clear any error conditions
|
365 |
|
|
ROM[0] = FLASH_Clear_Status;
|
366 |
|
|
|
367 |
|
|
#ifdef CYGHWR_DEVS_FLASH_INTEL_BUFFERED_WRITES
|
368 |
|
|
// FIXME: This code has not been adjusted to handle bootblock
|
369 |
|
|
// parts yet.
|
370 |
|
|
// FIXME: This code does not appear to work anymore
|
371 |
|
|
if (0 && flash_dev_info->buffered_w) {
|
372 |
|
|
int i, wc;
|
373 |
|
|
// Write any big chunks first
|
374 |
|
|
while (len >= buffer_size) {
|
375 |
|
|
wc = buffer_size;
|
376 |
|
|
if (wc > len) wc = len;
|
377 |
|
|
len -= wc;
|
378 |
|
|
wc = wc / ((CYGNUM_FLASH_WIDTH/8)*CYGNUM_FLASH_INTERLEAVE); // Word count
|
379 |
|
|
timeout = 5000000;
|
380 |
|
|
|
381 |
|
|
*BA = FLASH_Write_Buffer;
|
382 |
|
|
while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) {
|
383 |
|
|
if (--timeout == 0) {
|
384 |
|
|
res = FLASH_ERR_DRV_TIMEOUT;
|
385 |
|
|
goto bad;
|
386 |
|
|
}
|
387 |
|
|
*BA = FLASH_Write_Buffer;
|
388 |
|
|
}
|
389 |
|
|
*BA = FLASHWORD(wc-1); // Count is 0..N-1
|
390 |
|
|
for (i = 0; i < wc; i++) {
|
391 |
|
|
addr_v = FLASH_P2V(addr_p++);
|
392 |
|
|
*addr_v = *data_p++;
|
393 |
|
|
}
|
394 |
|
|
*BA = FLASH_Confirm;
|
395 |
|
|
|
396 |
|
|
ROM[0] = FLASH_Read_Status;
|
397 |
|
|
timeout = 5000000;
|
398 |
|
|
while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) {
|
399 |
|
|
if (--timeout == 0) {
|
400 |
|
|
res = FLASH_ERR_DRV_TIMEOUT;
|
401 |
|
|
goto bad;
|
402 |
|
|
}
|
403 |
|
|
}
|
404 |
|
|
}
|
405 |
|
|
}
|
406 |
|
|
#endif // CYGHWR_DEVS_FLASH_INTEL_BUFFERED_WRITES
|
407 |
|
|
|
408 |
|
|
while (len > 0) {
|
409 |
|
|
addr_v = FLASH_P2V(addr_p++);
|
410 |
|
|
ROM[0] = FLASH_Program;
|
411 |
|
|
*addr_v = *data_p;
|
412 |
|
|
timeout = 5000000;
|
413 |
|
|
while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) {
|
414 |
|
|
if (--timeout == 0) {
|
415 |
|
|
res = FLASH_ERR_DRV_TIMEOUT;
|
416 |
|
|
goto bad;
|
417 |
|
|
}
|
418 |
|
|
}
|
419 |
|
|
if (stat & FLASH_ErrorMask) {
|
420 |
|
|
if (!(stat & FLASH_ErrorProgram))
|
421 |
|
|
res = FLASH_ERR_HWR; // Unknown error
|
422 |
|
|
else {
|
423 |
|
|
if (stat & FLASH_ErrorLowVoltage)
|
424 |
|
|
res = FLASH_ERR_LOW_VOLTAGE;
|
425 |
|
|
else if (stat & FLASH_ErrorLocked)
|
426 |
|
|
res = FLASH_ERR_PROTECT;
|
427 |
|
|
else
|
428 |
|
|
res = FLASH_ERR_PROGRAM;
|
429 |
|
|
}
|
430 |
|
|
break;
|
431 |
|
|
}
|
432 |
|
|
ROM[0] = FLASH_Clear_Status;
|
433 |
|
|
ROM[0] = FLASH_Reset;
|
434 |
|
|
if (*addr_v != *data_p++) {
|
435 |
|
|
res = FLASH_ERR_DRV_VERIFY;
|
436 |
|
|
break;
|
437 |
|
|
}
|
438 |
|
|
len -= sizeof( flash_data_t );
|
439 |
|
|
}
|
440 |
|
|
|
441 |
|
|
// Restore ROM to "normal" mode
|
442 |
|
|
bad:
|
443 |
|
|
ROM[0] = FLASH_Reset;
|
444 |
|
|
|
445 |
|
|
CYGHWR_FLASH_WRITE_DISABLE();
|
446 |
|
|
|
447 |
|
|
// Ideally, we'd want to return not only the failure code, but also
|
448 |
|
|
// the address/device that reported the error.
|
449 |
|
|
return res;
|
450 |
|
|
}
|
451 |
|
|
|
452 |
|
|
#ifdef CYGHWR_IO_FLASH_BLOCK_LOCKING
|
453 |
|
|
//----------------------------------------------------------------------------
|
454 |
|
|
// Lock block
|
455 |
|
|
int
|
456 |
|
|
flash_lock_block(void* block)
|
457 |
|
|
{
|
458 |
|
|
volatile flash_data_t *ROM;
|
459 |
|
|
int res = FLASH_ERR_OK;
|
460 |
|
|
flash_data_t state;
|
461 |
|
|
int timeout = 5000000;
|
462 |
|
|
volatile flash_data_t* b_p = (flash_data_t*) block;
|
463 |
|
|
volatile flash_data_t *b_v;
|
464 |
|
|
cyg_bool bootblock;
|
465 |
|
|
int len, len_ix = 1;
|
466 |
|
|
|
467 |
|
|
if (!flash_dev_info->locking)
|
468 |
|
|
return res;
|
469 |
|
|
|
470 |
|
|
#ifdef DEBUG
|
471 |
|
|
d_print("flash_lock_block %08x\n", block);
|
472 |
|
|
#endif
|
473 |
|
|
|
474 |
|
|
ROM = (volatile flash_data_t*)((unsigned long)block & flash_dev_info->base_mask);
|
475 |
|
|
|
476 |
|
|
// Is this the boot sector?
|
477 |
|
|
bootblock = (flash_dev_info->bootblock &&
|
478 |
|
|
(flash_dev_info->bootblocks[0] == ((unsigned long)block - (unsigned long)ROM)));
|
479 |
|
|
if (bootblock) {
|
480 |
|
|
len = flash_dev_info->bootblocks[len_ix++];
|
481 |
|
|
} else {
|
482 |
|
|
len = flash_dev_info->block_size;
|
483 |
|
|
}
|
484 |
|
|
|
485 |
|
|
CYGHWR_FLASH_WRITE_ENABLE();
|
486 |
|
|
|
487 |
|
|
while (len > 0) {
|
488 |
|
|
b_v = FLASH_P2V(b_p);
|
489 |
|
|
|
490 |
|
|
// Clear any error conditions
|
491 |
|
|
ROM[0] = FLASH_Clear_Status;
|
492 |
|
|
|
493 |
|
|
// Set lock bit
|
494 |
|
|
*b_v = FLASH_Set_Lock;
|
495 |
|
|
*b_v = FLASH_Set_Lock_Confirm; // Confirmation
|
496 |
|
|
while(((state = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) {
|
497 |
|
|
if (--timeout == 0) {
|
498 |
|
|
res = FLASH_ERR_DRV_TIMEOUT;
|
499 |
|
|
break;
|
500 |
|
|
}
|
501 |
|
|
}
|
502 |
|
|
|
503 |
|
|
// Restore ROM to "normal" mode
|
504 |
|
|
ROM[0] = FLASH_Reset;
|
505 |
|
|
|
506 |
|
|
// Go to next block
|
507 |
|
|
b_p += len / sizeof( flash_data_t );
|
508 |
|
|
len = 0;
|
509 |
|
|
|
510 |
|
|
if (FLASH_ErrorLock == (state & FLASH_ErrorLock))
|
511 |
|
|
res = FLASH_ERR_LOCK;
|
512 |
|
|
|
513 |
|
|
if (res != FLASH_ERR_OK)
|
514 |
|
|
break;
|
515 |
|
|
|
516 |
|
|
if (bootblock)
|
517 |
|
|
len = flash_dev_info->bootblocks[len_ix++];
|
518 |
|
|
}
|
519 |
|
|
|
520 |
|
|
CYGHWR_FLASH_WRITE_DISABLE();
|
521 |
|
|
|
522 |
|
|
return res;
|
523 |
|
|
}
|
524 |
|
|
|
525 |
|
|
//----------------------------------------------------------------------------
|
526 |
|
|
// Unlock block
|
527 |
|
|
|
528 |
|
|
int
|
529 |
|
|
flash_unlock_block(void* block, int block_size, int blocks)
|
530 |
|
|
{
|
531 |
|
|
volatile flash_data_t *ROM;
|
532 |
|
|
int res = FLASH_ERR_OK;
|
533 |
|
|
flash_data_t state;
|
534 |
|
|
int timeout = 5000000;
|
535 |
|
|
volatile flash_data_t* b_p = (flash_data_t*) block;
|
536 |
|
|
volatile flash_data_t *b_v;
|
537 |
|
|
|
538 |
|
|
#if (defined(CYGHWR_DEVS_FLASH_SHARP_LH28F016SCT_Z4) || defined(CYGHWR_DEVS_FLASH_SHARP_LH28F016SCT_95) )
|
539 |
|
|
// The Sharp device follows all the same rules as the Intel 28x part,
|
540 |
|
|
// except that the unlocking mechanism unlocks all blocks at once. This
|
541 |
|
|
// is the way the Strata part seems to work. I will replace the
|
542 |
|
|
// flash_unlock_block function with one similar to the Strata function.
|
543 |
|
|
// As the Sharp part does not have the bootlock characteristics, I
|
544 |
|
|
// will ignore them.
|
545 |
|
|
//
|
546 |
|
|
// The difficulty with this operation is that the hardware does not support
|
547 |
|
|
// unlocking single blocks. However, the logical layer would like this to
|
548 |
|
|
// be the case, so this routine emulates it. The hardware can clear all of
|
549 |
|
|
// the locks in the device at once. This routine will use that approach and
|
550 |
|
|
// then reset the regions which are known to be locked.
|
551 |
|
|
//
|
552 |
|
|
|
553 |
|
|
#define MAX_FLASH_BLOCKS (flash_dev_info->block_count * CYGNUM_FLASH_SERIES)
|
554 |
|
|
|
555 |
|
|
unsigned char is_locked[MAX_FLASH_BLOCKS];
|
556 |
|
|
int i;
|
557 |
|
|
|
558 |
|
|
// Get base address and map addresses to virtual addresses
|
559 |
|
|
#ifdef DEBUG
|
560 |
|
|
d_print("\nNow inside low level driver\n");
|
561 |
|
|
#endif
|
562 |
|
|
ROM = (volatile flash_data_t*) CYGNUM_FLASH_BASE;
|
563 |
|
|
block = FLASH_P2V(block);
|
564 |
|
|
|
565 |
|
|
// Clear any error conditions
|
566 |
|
|
ROM[0] = FLASH_Clear_Status;
|
567 |
|
|
|
568 |
|
|
// Get current block lock state. This needs to access each block on
|
569 |
|
|
// the device so currently locked blocks can be re-locked.
|
570 |
|
|
b_p = ROM;
|
571 |
|
|
for (i = 0; i < blocks; i++) {
|
572 |
|
|
b_v = FLASH_P2V( b_p );
|
573 |
|
|
*b_v = FLASH_Read_ID;
|
574 |
|
|
if (b_v == block) {
|
575 |
|
|
is_locked[i] = 0;
|
576 |
|
|
} else {
|
577 |
|
|
if(b_v[2]){ /* it is possible that one of the interleaved devices
|
578 |
|
|
* is locked, but others are not. Coming out of this
|
579 |
|
|
* function, if one was locked, all will be locked.
|
580 |
|
|
*/
|
581 |
|
|
is_locked[i] = 1;
|
582 |
|
|
}else{
|
583 |
|
|
is_locked[i] = 0;
|
584 |
|
|
}
|
585 |
|
|
}
|
586 |
|
|
#ifdef DEBUG
|
587 |
|
|
#endif
|
588 |
|
|
b_p += block_size / sizeof(*b_p);
|
589 |
|
|
}
|
590 |
|
|
ROM[0] = FLASH_Reset;
|
591 |
|
|
#ifdef DEBUG
|
592 |
|
|
for (i = 0; i < blocks; i++) {
|
593 |
|
|
d_print("\nblock %d %s", i,
|
594 |
|
|
is_locked[i] ? "LOCKED" : "UNLOCKED");
|
595 |
|
|
}
|
596 |
|
|
d_print("\n");
|
597 |
|
|
#endif
|
598 |
|
|
|
599 |
|
|
// Clears all lock bits
|
600 |
|
|
ROM[0] = FLASH_Clear_Lock;
|
601 |
|
|
ROM[0] = FLASH_Clear_Lock_Confirm; // Confirmation
|
602 |
|
|
timeout = 5000000;
|
603 |
|
|
while(((state = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) {
|
604 |
|
|
if (--timeout == 0) break;
|
605 |
|
|
}
|
606 |
|
|
|
607 |
|
|
// Restore the lock state
|
608 |
|
|
b_p = ROM;
|
609 |
|
|
for (i = 0; i < blocks; i++) {
|
610 |
|
|
b_v = FLASH_P2V( b_p );
|
611 |
|
|
if (is_locked[i]) {
|
612 |
|
|
*b_v = FLASH_Set_Lock;
|
613 |
|
|
*b_v = FLASH_Set_Lock_Confirm; // Confirmation
|
614 |
|
|
timeout = 5000000;
|
615 |
|
|
while(((state = ROM[0]) & FLASH_Status_Ready)
|
616 |
|
|
!= FLASH_Status_Ready) {
|
617 |
|
|
if (--timeout == 0){
|
618 |
|
|
res = FLASH_ERR_DRV_TIMEOUT;
|
619 |
|
|
break;
|
620 |
|
|
}
|
621 |
|
|
}
|
622 |
|
|
if (FLASH_ErrorLock == (state & FLASH_ErrorLock))
|
623 |
|
|
res = FLASH_ERR_LOCK;
|
624 |
|
|
|
625 |
|
|
if (res != FLASH_ERR_OK)
|
626 |
|
|
break;
|
627 |
|
|
|
628 |
|
|
}
|
629 |
|
|
b_p += block_size / sizeof(*b_p);
|
630 |
|
|
}
|
631 |
|
|
|
632 |
|
|
// Restore ROM to "normal" mode
|
633 |
|
|
ROM[0] = FLASH_Reset;
|
634 |
|
|
|
635 |
|
|
return res;
|
636 |
|
|
|
637 |
|
|
#else // not CYGHWR_DEVS_FLASH_SHARP_LH28F016SCT_Z4
|
638 |
|
|
|
639 |
|
|
cyg_bool bootblock;
|
640 |
|
|
int len, len_ix = 1;
|
641 |
|
|
|
642 |
|
|
if (!flash_dev_info->locking)
|
643 |
|
|
return res;
|
644 |
|
|
|
645 |
|
|
ROM = (volatile flash_data_t*)((unsigned long)block & flash_dev_info->base_mask);
|
646 |
|
|
|
647 |
|
|
#ifdef DEBUG
|
648 |
|
|
d_print("flash_unlock_block dev %08x block %08x size %08x count %08x\n", ROM, block, block_size, blocks);
|
649 |
|
|
#endif
|
650 |
|
|
|
651 |
|
|
// Is this the boot sector?
|
652 |
|
|
bootblock = (flash_dev_info->bootblock &&
|
653 |
|
|
(flash_dev_info->bootblocks[0] == ((unsigned long)block - (unsigned long)ROM)));
|
654 |
|
|
if (bootblock) {
|
655 |
|
|
len = flash_dev_info->bootblocks[len_ix++];
|
656 |
|
|
} else {
|
657 |
|
|
len = flash_dev_info->block_size;
|
658 |
|
|
}
|
659 |
|
|
|
660 |
|
|
CYGHWR_FLASH_WRITE_ENABLE();
|
661 |
|
|
|
662 |
|
|
while (len > 0) {
|
663 |
|
|
|
664 |
|
|
b_v = FLASH_P2V(b_p);
|
665 |
|
|
|
666 |
|
|
// Clear any error conditions
|
667 |
|
|
ROM[0] = FLASH_Clear_Status;
|
668 |
|
|
|
669 |
|
|
// Clear lock bit
|
670 |
|
|
*b_v = FLASH_Clear_Lock;
|
671 |
|
|
*b_v = FLASH_Clear_Lock_Confirm; // Confirmation
|
672 |
|
|
while(((state = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) {
|
673 |
|
|
if (--timeout == 0) {
|
674 |
|
|
res = FLASH_ERR_DRV_TIMEOUT;
|
675 |
|
|
break;
|
676 |
|
|
}
|
677 |
|
|
}
|
678 |
|
|
|
679 |
|
|
// Restore ROM to "normal" mode
|
680 |
|
|
ROM[0] = FLASH_Reset;
|
681 |
|
|
|
682 |
|
|
// Go to next block
|
683 |
|
|
b_p += len / sizeof( flash_data_t );
|
684 |
|
|
len = 0;
|
685 |
|
|
|
686 |
|
|
if (FLASH_ErrorLock == (state & FLASH_ErrorLock))
|
687 |
|
|
res = FLASH_ERR_LOCK;
|
688 |
|
|
|
689 |
|
|
if (res != FLASH_ERR_OK)
|
690 |
|
|
break;
|
691 |
|
|
|
692 |
|
|
if (bootblock)
|
693 |
|
|
len = flash_dev_info->bootblocks[len_ix++];
|
694 |
|
|
}
|
695 |
|
|
|
696 |
|
|
CYGHWR_FLASH_WRITE_DISABLE();
|
697 |
|
|
|
698 |
|
|
return res;
|
699 |
|
|
|
700 |
|
|
// FIXME: Unlocking need to support some other parts in the future
|
701 |
|
|
// as well which take a little more diddling.
|
702 |
|
|
#if 0
|
703 |
|
|
//
|
704 |
|
|
// The difficulty with this operation is that the hardware does not support
|
705 |
|
|
// unlocking single blocks. However, the logical layer would like this to
|
706 |
|
|
// be the case, so this routine emulates it. The hardware can clear all of
|
707 |
|
|
// the locks in the device at once. This routine will use that approach and
|
708 |
|
|
// then reset the regions which are known to be locked.
|
709 |
|
|
//
|
710 |
|
|
|
711 |
|
|
#define MAX_FLASH_BLOCKS (flash_dev_info->block_count * CYGNUM_FLASH_SERIES)
|
712 |
|
|
|
713 |
|
|
unsigned char is_locked[MAX_FLASH_BLOCKS];
|
714 |
|
|
|
715 |
|
|
// Get base address and map addresses to virtual addresses
|
716 |
|
|
ROM = FLASH_P2V( CYGNUM_FLASH_BASE_MASK & (unsigned int)block );
|
717 |
|
|
block = FLASH_P2V(block);
|
718 |
|
|
|
719 |
|
|
// Clear any error conditions
|
720 |
|
|
ROM[0] = FLASH_Clear_Status;
|
721 |
|
|
|
722 |
|
|
// Get current block lock state. This needs to access each block on
|
723 |
|
|
// the device so currently locked blocks can be re-locked.
|
724 |
|
|
bp = ROM;
|
725 |
|
|
for (i = 0; i < blocks; i++) {
|
726 |
|
|
bpv = FLASH_P2V( bp );
|
727 |
|
|
*bpv = FLASH_Read_Query;
|
728 |
|
|
if (bpv == block) {
|
729 |
|
|
is_locked[i] = 0;
|
730 |
|
|
} else {
|
731 |
|
|
is_locked[i] = bpv[2];
|
732 |
|
|
}
|
733 |
|
|
bp += block_size / sizeof(*bp);
|
734 |
|
|
}
|
735 |
|
|
|
736 |
|
|
// Clears all lock bits
|
737 |
|
|
ROM[0] = FLASH_Clear_Locks;
|
738 |
|
|
ROM[0] = FLASH_Clear_Locks_Confirm; // Confirmation
|
739 |
|
|
timeout = 5000000;
|
740 |
|
|
while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) {
|
741 |
|
|
if (--timeout == 0) break;
|
742 |
|
|
}
|
743 |
|
|
|
744 |
|
|
// Restore the lock state
|
745 |
|
|
bp = ROM;
|
746 |
|
|
for (i = 0; i < blocks; i++) {
|
747 |
|
|
bpv = FLASH_P2V( bp );
|
748 |
|
|
if (is_locked[i]) {
|
749 |
|
|
*bpv = FLASH_Set_Lock;
|
750 |
|
|
*bpv = FLASH_Set_Lock_Confirm; // Confirmation
|
751 |
|
|
timeout = 5000000;
|
752 |
|
|
while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) {
|
753 |
|
|
if (--timeout == 0) break;
|
754 |
|
|
}
|
755 |
|
|
}
|
756 |
|
|
bp += block_size / sizeof(*bp);
|
757 |
|
|
}
|
758 |
|
|
|
759 |
|
|
// Restore ROM to "normal" mode
|
760 |
|
|
ROM[0] = FLASH_Reset;
|
761 |
|
|
#endif
|
762 |
|
|
#endif // #CYGHWR_DEVS_FLASH_SHARP_LH28F016SCT_Z4
|
763 |
|
|
}
|
764 |
|
|
#endif // CYGHWR_IO_FLASH_BLOCK_LOCKING
|
765 |
|
|
|
766 |
|
|
#endif // CYGONCE_DEVS_FLASH_INTEL_28FXXX_INL
|