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#ifndef CYGONCE_DEVS_FLASH_INTEL_28FXXX_PARTS_INL
#define CYGONCE_DEVS_FLASH_INTEL_28FXXX_PARTS_INL
//==========================================================================
//
//      flash_28fxxx_parts.inl
//
//      Intel 28Fxxx part descriptors
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
// Copyright (C) 2002 Gary Thomas
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):    jskov
// Contributors: jskov, gthomas
// Date:         2001-08-07
// Purpose:
// Description:  Intel 28Fxxx part descriptors
// Usage:        Should be included from the flash_28fxxx.inl file only.
//
// FIXME:        Add configury for selecting bottom/top bootblocks
//####DESCRIPTIONEND####
//
//==========================================================================
 
#if CYGNUM_FLASH_WIDTH == 8
#ifdef CYGHWR_DEVS_FLASH_SHARP_LH28F016SCT_Z4
    {   // LH28F016SCT_Z4
        device_id  : FLASHWORD(0xA0),
        block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
        block_count: 32,
        device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
        base_mask  : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
        buffered_w : false,
        locking    : true,
        bootblock  : false,
        banked     : false
    },
#endif
 
#ifdef CYGHWR_DEVS_FLASH_SHARP_LH28F016SCT_95
    {   // LH28F016SCT_95
        device_id  : FLASHWORD(0xAA),
        block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
        block_count: 32,
        device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
        base_mask  : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
        buffered_w : false,
        locking    : true,
        bootblock  : false,
        banked     : false
    },
#endif
 
#else // 16 bit devices
 
#ifdef CYGHWR_DEVS_FLASH_INTEL_28F320C3
    {   // 28F320C3-T
        device_id  : FLASHWORD(0x88c4),
        block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
        block_count: 64,
        device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
        base_mask  : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
        locking    : true,
        buffered_w : false,
        bootblock  : true,
        bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
 
                     },
        banked     : false
    },
    {   // 28F320C3-B
        device_id  : FLASHWORD(0x88c5),
        block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
        block_count: 64,
        device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
        base_mask  : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
        locking    : true,
        buffered_w : false,
        bootblock  : true,
        bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
 
                     },
        banked     : false
    },
#endif
 
#ifdef CYGHWR_DEVS_FLASH_INTEL_28F320B3
    {   // 28F320B3-T
        device_id  : FLASHWORD(0x8896),
        block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
        block_count: 64,
        device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
        base_mask  : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
        locking    : false,
        buffered_w : false,
        bootblock  : true,
        bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
 
                     },
        banked     : false
    },
    {   // 28F320B3-B
        device_id  : FLASHWORD(0x8897),
        block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
        block_count: 64,
        device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
        base_mask  : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
        locking    : false,
        buffered_w : false,
        bootblock  : true,
        bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
 
                     },
        banked     : false
    },
#endif
 
 
#ifdef CYGHWR_DEVS_FLASH_INTEL_28F320S3
    {   // 28F320S3
        device_id  : FLASHWORD(0x00d4),
        block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
        block_count: 64,
        device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
        base_mask  : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
        locking    : true,
        buffered_w : false,
        bootblock  : false,
        banked     : false
    },
#endif
 
#ifdef CYGHWR_DEVS_FLASH_INTEL_28F160S5
    {   // 28F160S5
        device_id  : FLASHWORD(0x00d0),
        block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
        block_count: 32,
        device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
        base_mask  : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
        buffered_w : true,
        locking    : false,
        bootblock  : false,
        banked     : false
    },
#endif
 
#endif // 16 bit devices
 
 
#endif // CYGONCE_DEVS_FLASH_INTEL_28FXXX_PARTS_INL

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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [devs/] [flash/] [intel/] [28fxxx/] [v2_0/] [include/] [flash_28fxxx_parts.inl] - Blame information for rev 401

Line No.	Rev	Author	Line
1	27	unneback	`#ifndef CYGONCE_DEVS_FLASH_INTEL_28FXXX_PARTS_INL`
2			`#define CYGONCE_DEVS_FLASH_INTEL_28FXXX_PARTS_INL`
3			`//==========================================================================`
4			`//`
5			`// flash_28fxxx_parts.inl`
6			`//`
7			`// Intel 28Fxxx part descriptors`
8			`//`
9			`//==========================================================================`
10			`//####ECOSGPLCOPYRIGHTBEGIN####`
11			`// -------------------------------------------`
12			`// This file is part of eCos, the Embedded Configurable Operating System.`
13			`// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.`
14			`// Copyright (C) 2002 Gary Thomas`
15			`//`
16			`// eCos is free software; you can redistribute it and/or modify it under`
17			`// the terms of the GNU General Public License as published by the Free`
18			`// Software Foundation; either version 2 or (at your option) any later version.`
19			`//`
20			`// eCos is distributed in the hope that it will be useful, but WITHOUT ANY`
21			`// WARRANTY; without even the implied warranty of MERCHANTABILITY or`
22			`// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License`
23			`// for more details.`
24			`//`
25			`// You should have received a copy of the GNU General Public License along`
26			`// with eCos; if not, write to the Free Software Foundation, Inc.,`
27			`// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.`
28			`//`
29			`// As a special exception, if other files instantiate templates or use macros`
30			`// or inline functions from this file, or you compile this file and link it`
31			`// with other works to produce a work based on this file, this file does not`
32			`// by itself cause the resulting work to be covered by the GNU General Public`
33			`// License. However the source code for this file must still be made available`
34			`// in accordance with section (3) of the GNU General Public License.`
35			`//`
36			`// This exception does not invalidate any other reasons why a work based on`
37			`// this file might be covered by the GNU General Public License.`
38			`//`
39			`// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.`
40			`// at http://sources.redhat.com/ecos/ecos-license/`
41			`// -------------------------------------------`
42			`//####ECOSGPLCOPYRIGHTEND####`
43			`//==========================================================================`
44			`//#####DESCRIPTIONBEGIN####`
45			`//`
46			`// Author(s): jskov`
47			`// Contributors: jskov, gthomas`
48			`// Date: 2001-08-07`
49			`// Purpose:`
50			`// Description: Intel 28Fxxx part descriptors`
51			`// Usage: Should be included from the flash_28fxxx.inl file only.`
52			`//`
53			`// FIXME: Add configury for selecting bottom/top bootblocks`
54			`//####DESCRIPTIONEND####`
55			`//`
56			`//==========================================================================`
57
58			`#if CYGNUM_FLASH_WIDTH == 8`
59			`#ifdef CYGHWR_DEVS_FLASH_SHARP_LH28F016SCT_Z4`
60			`{ // LH28F016SCT_Z4`
61			`device_id : FLASHWORD(0xA0),`
62			`block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,`
63			`block_count: 32,`
64			`device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,`
65			`base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),`
66			`buffered_w : false,`
67			`locking : true,`
68			`bootblock : false,`
69			`banked : false`
70			`},`
71			`#endif`
72
73			`#ifdef CYGHWR_DEVS_FLASH_SHARP_LH28F016SCT_95`
74			`{ // LH28F016SCT_95`
75			`device_id : FLASHWORD(0xAA),`
76			`block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,`
77			`block_count: 32,`
78			`device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,`
79			`base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),`
80			`buffered_w : false,`
81			`locking : true,`
82			`bootblock : false,`
83			`banked : false`
84			`},`
85			`#endif`
86
87			`#else // 16 bit devices`
88
89			`#ifdef CYGHWR_DEVS_FLASH_INTEL_28F320C3`
90			`{ // 28F320C3-T`
91			`device_id : FLASHWORD(0x88c4),`
92			`block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,`
93			`block_count: 64,`
94			`device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,`
95			`base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),`
96			`locking : true,`
97			`buffered_w : false,`
98			`bootblock : true,`
99			`bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,`
100			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
101			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
102			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
103			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
104			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
105			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
106			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
107			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
108
109			`},`
110			`banked : false`
111			`},`
112			`{ // 28F320C3-B`
113			`device_id : FLASHWORD(0x88c5),`
114			`block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,`
115			`block_count: 64,`
116			`device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,`
117			`base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),`
118			`locking : true,`
119			`buffered_w : false,`
120			`bootblock : true,`
121			`bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,`
122			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
123			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
124			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
125			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
126			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
127			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
128			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
129			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
130
131			`},`
132			`banked : false`
133			`},`
134			`#endif`
135
136			`#ifdef CYGHWR_DEVS_FLASH_INTEL_28F320B3`
137			`{ // 28F320B3-T`
138			`device_id : FLASHWORD(0x8896),`
139			`block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,`
140			`block_count: 64,`
141			`device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,`
142			`base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),`
143			`locking : false,`
144			`buffered_w : false,`
145			`bootblock : true,`
146			`bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,`
147			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
148			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
149			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
150			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
151			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
152			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
153			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
154			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
155
156			`},`
157			`banked : false`
158			`},`
159			`{ // 28F320B3-B`
160			`device_id : FLASHWORD(0x8897),`
161			`block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,`
162			`block_count: 64,`
163			`device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,`
164			`base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),`
165			`locking : false,`
166			`buffered_w : false,`
167			`bootblock : true,`
168			`bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,`
169			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
170			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
171			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
172			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
173			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
174			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
175			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
176			`0x002000 * CYGNUM_FLASH_INTERLEAVE,`
177
178			`},`
179			`banked : false`
180			`},`
181			`#endif`
182
183
184			`#ifdef CYGHWR_DEVS_FLASH_INTEL_28F320S3`
185			`{ // 28F320S3`
186			`device_id : FLASHWORD(0x00d4),`
187			`block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,`
188			`block_count: 64,`
189			`device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,`
190			`base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),`
191			`locking : true,`
192			`buffered_w : false,`
193			`bootblock : false,`
194			`banked : false`
195			`},`
196			`#endif`
197
198			`#ifdef CYGHWR_DEVS_FLASH_INTEL_28F160S5`
199			`{ // 28F160S5`
200			`device_id : FLASHWORD(0x00d0),`
201			`block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,`
202			`block_count: 32,`
203			`device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,`
204			`base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),`
205			`buffered_w : true,`
206			`locking : false,`
207			`bootblock : false,`
208			`banked : false`
209			`},`
210			`#endif`
211
212			`#endif // 16 bit devices`
213
214
215			`#endif // CYGONCE_DEVS_FLASH_INTEL_28FXXX_PARTS_INL`