OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [devs/] [serial/] [mips/] [ref4955/] [v2_0/] [include/] [mips_tx49_ref4955_ser.inl] - Blame information for rev 27

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 27 unneback
//==========================================================================
2
//
3
//      devs/serial/mips/ref4955/src/mips_tx49_ref4955_ser.inl
4
//
5
//      REF4955 Serial I/O definitions.
6
//
7
//==========================================================================
8
//####ECOSGPLCOPYRIGHTBEGIN####
9
// -------------------------------------------
10
// This file is part of eCos, the Embedded Configurable Operating System.
11
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12
//
13
// eCos is free software; you can redistribute it and/or modify it under
14
// the terms of the GNU General Public License as published by the Free
15
// Software Foundation; either version 2 or (at your option) any later version.
16
//
17
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
19
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
20
// for more details.
21
//
22
// You should have received a copy of the GNU General Public License along
23
// with eCos; if not, write to the Free Software Foundation, Inc.,
24
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25
//
26
// As a special exception, if other files instantiate templates or use macros
27
// or inline functions from this file, or you compile this file and link it
28
// with other works to produce a work based on this file, this file does not
29
// by itself cause the resulting work to be covered by the GNU General Public
30
// License. However the source code for this file must still be made available
31
// in accordance with section (3) of the GNU General Public License.
32
//
33
// This exception does not invalidate any other reasons why a work based on
34
// this file might be covered by the GNU General Public License.
35
//
36
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
37
// at http://sources.redhat.com/ecos/ecos-license/
38
// -------------------------------------------
39
//####ECOSGPLCOPYRIGHTEND####
40
//==========================================================================
41
//#####DESCRIPTIONBEGIN####
42
//
43
// Author(s):   jskov
44
// Contributors:gthomas, jskov
45
// Date:        2000-05-24
46
// Purpose:     REF4955 Serial definitions
47
//####DESCRIPTIONEND####
48
//==========================================================================
49
 
50
#include 
51
 
52
//-----------------------------------------------------------------------------
53
// There are two serial ports.
54
#define CYG_DEVICE_SERIAL_SCC1    0xb40003f8 // port 1
55
#define CYG_DEVICE_SERIAL_SCC2    0xb40002f8 // port 2
56
 
57
//-----------------------------------------------------------------------------
58
// The REF4955 board has a 14.318 MHz crystal, but the PC87338 part
59
// uses a 24MHz internal clock for baud rate calculation.
60
#define BAUD_DIVISOR(_x_) 24000000/13/16/(_x_)
61
 
62
static unsigned short select_baud[] = {
63
    0,    // Unused
64
    0,    // 50
65
    0,    // 75
66
    0,    // 110
67
    0,    // 134.5
68
    0,    // 150
69
    0,    // 200
70
    0,    // 300
71
    0,    // 600
72
    BAUD_DIVISOR(1200),
73
    0,    // 1800
74
    BAUD_DIVISOR(2400),
75
    0,    // 3600
76
    BAUD_DIVISOR(4800),
77
 
78
    BAUD_DIVISOR(9600),
79
    BAUD_DIVISOR(14400),
80
    BAUD_DIVISOR(19200),
81
    BAUD_DIVISOR(38400),
82
    BAUD_DIVISOR(57600),
83
    BAUD_DIVISOR(115200),
84
    0,    // 230400
85
};
86
 
87
//-----------------------------------------------------------------------------
88
// Port 0 descriptors
89
 
90
#ifdef CYGPKG_IO_SERIAL_MIPS_REF4955_SERIAL0
91
static pc_serial_info pc_serial_info0 = {CYG_DEVICE_SERIAL_SCC1,
92
                                         CYGNUM_HAL_INTERRUPT_DEBUG_UART};
93
#if CYGNUM_IO_SERIAL_MIPS_REF4955_SERIAL0_BUFSIZE > 0
94
static unsigned char pc_serial_out_buf0[CYGNUM_IO_SERIAL_MIPS_REF4955_SERIAL0_BUFSIZE];
95
static unsigned char pc_serial_in_buf0[CYGNUM_IO_SERIAL_MIPS_REF4955_SERIAL0_BUFSIZE];
96
 
97
static SERIAL_CHANNEL_USING_INTERRUPTS(pc_serial_channel0,
98
                                       pc_serial_funs,
99
                                       pc_serial_info0,
100
                                       CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_MIPS_REF4955_SERIAL0_BAUD),
101
                                       CYG_SERIAL_STOP_DEFAULT,
102
                                       CYG_SERIAL_PARITY_DEFAULT,
103
                                       CYG_SERIAL_WORD_LENGTH_DEFAULT,
104
                                       CYG_SERIAL_FLAGS_DEFAULT,
105
                                       &pc_serial_out_buf0[0],
106
                                       sizeof(pc_serial_out_buf0),
107
                                       &pc_serial_in_buf0[0],
108
                                       sizeof(pc_serial_in_buf0)
109
    );
110
#else
111
static SERIAL_CHANNEL(pc_serial_channel0,
112
                      pc_serial_funs,
113
                      pc_serial_info0,
114
                      CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_MIPS_REF4955_SERIAL0_BAUD),
115
                      CYG_SERIAL_STOP_DEFAULT,
116
                      CYG_SERIAL_PARITY_DEFAULT,
117
                      CYG_SERIAL_WORD_LENGTH_DEFAULT,
118
                      CYG_SERIAL_FLAGS_DEFAULT
119
    );
120
#endif
121
 
122
DEVTAB_ENTRY(pc_serial_io0,
123
             CYGDAT_IO_SERIAL_MIPS_REF4955_SERIAL0_NAME,
124
             0,                 // Does not depend on a lower level interface
125
             &cyg_io_serial_devio,
126
             pc_serial_init,
127
             pc_serial_lookup,     // Serial driver may need initializing
128
             &pc_serial_channel0
129
    );
130
#endif
131
 
132
//-----------------------------------------------------------------------------
133
// Port 1 descriptors
134
 
135
#ifdef CYGPKG_IO_SERIAL_MIPS_REF4955_SERIAL1
136
static pc_serial_info pc_serial_info1 = {CYG_DEVICE_SERIAL_SCC2,
137
                                         CYGNUM_HAL_INTERRUPT_USER_UART};
138
#if CYGNUM_IO_SERIAL_MIPS_REF4955_SERIAL1_BUFSIZE > 0
139
static unsigned char pc_serial_out_buf1[CYGNUM_IO_SERIAL_MIPS_REF4955_SERIAL1_BUFSIZE];
140
static unsigned char pc_serial_in_buf1[CYGNUM_IO_SERIAL_MIPS_REF4955_SERIAL1_BUFSIZE];
141
 
142
static SERIAL_CHANNEL_USING_INTERRUPTS(pc_serial_channel1,
143
                                       pc_serial_funs,
144
                                       pc_serial_info1,
145
                                       CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_MIPS_REF4955_SERIAL1_BAUD),
146
                                       CYG_SERIAL_STOP_DEFAULT,
147
                                       CYG_SERIAL_PARITY_DEFAULT,
148
                                       CYG_SERIAL_WORD_LENGTH_DEFAULT,
149
                                       CYG_SERIAL_FLAGS_DEFAULT,
150
                                       &pc_serial_out_buf1[0],
151
                                       sizeof(pc_serial_out_buf1),
152
                                       &pc_serial_in_buf1[0],
153
                                       sizeof(pc_serial_in_buf1)
154
    );
155
#else
156
static SERIAL_CHANNEL(pc_serial_channel1,
157
                      pc_serial_funs,
158
                      pc_serial_info1,
159
                      CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_MIPS_REF4955_SERIAL1_BAUD),
160
                      CYG_SERIAL_STOP_DEFAULT,
161
                      CYG_SERIAL_PARITY_DEFAULT,
162
                      CYG_SERIAL_WORD_LENGTH_DEFAULT,
163
                      CYG_SERIAL_FLAGS_DEFAULT
164
    );
165
#endif
166
 
167
DEVTAB_ENTRY(pc_serial_io1,
168
             CYGDAT_IO_SERIAL_MIPS_REF4955_SERIAL1_NAME,
169
             0,                   // Does not depend on a lower level interface
170
             &cyg_io_serial_devio,
171
             pc_serial_init,
172
             pc_serial_lookup,     // Serial driver may need initializing
173
             &pc_serial_channel1
174
    );
175
#endif
176
 
177
// EOF mips_tx49_ref4955_ser.inl

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.