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//==========================================================================
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//
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// io/serial/powerpc/cogent_serial_with_ints.c
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//
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// PowerPC Cogent Serial I/O Interface Module (interrupt driven)
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): jskov, based on ARM driver by gthomas
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// Contributors:gthomas, jskov
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// Date: 1999-03-02
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// Purpose: Cogent Serial I/O module (interrupt driven version)
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// Description:
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//
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// To Do:
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// Put in magic to effectively use the FIFOs. Transmitter FIFO fill is a
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// problem, and setting receiver FIFO interrupts to happen only after
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// n chars may conflict with hal diag.
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//
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//####DESCRIPTIONEND####
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//==========================================================================
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#include <pkgconf/io_serial.h>
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#include <pkgconf/io.h>
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#include <cyg/io/io.h>
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#include <cyg/hal/hal_intr.h>
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#include <cyg/io/devtab.h>
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#include <cyg/infra/diag.h>
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#include <cyg/io/serial.h>
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#ifdef CYGPKG_IO_SERIAL_POWERPC_COGENT
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#include "cogent_serial.h"
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// Make sure the configuration is sane.
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#if defined(CYGPKG_IO_SERIAL_POWERPC_COGENT_SERIAL_A) && \
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defined(CYGPKG_IO_SERIAL_POWERPC_COGENT_SERIAL_B) && \
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!defined(CYGIMP_KERNEL_INTERRUPTS_CHAIN)
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#error "Need CYGIMP_KERNEL_INTERRUPTS_CHAIN to support both ports"
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#endif
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#define BUFSIZE 128
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typedef struct cogent_serial_info {
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CYG_ADDRWORD base;
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CYG_WORD int_num;
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cyg_interrupt serial_interrupt;
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cyg_handle_t serial_interrupt_handle;
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} cogent_serial_info;
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static bool cogent_serial_init(struct cyg_devtab_entry *tab);
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static bool cogent_serial_putc(serial_channel *chan, unsigned char c);
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static Cyg_ErrNo cogent_serial_lookup(struct cyg_devtab_entry **tab,
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struct cyg_devtab_entry *sub_tab,
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const char *name);
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static unsigned char cogent_serial_getc(serial_channel *chan);
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static Cyg_ErrNo cogent_serial_set_config(serial_channel *chan, cyg_uint32 key,
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const void *xbuf, cyg_uint32 *len);
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static void cogent_serial_start_xmit(serial_channel *chan);
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static void cogent_serial_stop_xmit(serial_channel *chan);
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static cyg_uint32 cogent_serial_ISR(cyg_vector_t vector, cyg_addrword_t data);
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static void cogent_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data);
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static SERIAL_FUNS(cogent_serial_funs,
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cogent_serial_putc,
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cogent_serial_getc,
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cogent_serial_set_config,
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cogent_serial_start_xmit,
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cogent_serial_stop_xmit
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);
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#ifdef CYGPKG_IO_SERIAL_POWERPC_COGENT_SERIAL_A
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static cogent_serial_info cogent_serial_info0 ={CMA_SER_16550_BASE_A,
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CYGNUM_HAL_INTERRUPT_SIU_IRQ1};
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#if CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_A_BUFSIZE > 0
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static unsigned char cogent_serial_out_buf0[CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_A_BUFSIZE];
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static unsigned char cogent_serial_in_buf0[CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_A_BUFSIZE];
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static SERIAL_CHANNEL_USING_INTERRUPTS(cogent_serial_channel0,
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cogent_serial_funs,
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cogent_serial_info0,
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CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_A_BAUD),
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CYG_SERIAL_STOP_DEFAULT,
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CYG_SERIAL_PARITY_DEFAULT,
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CYG_SERIAL_WORD_LENGTH_DEFAULT,
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CYG_SERIAL_FLAGS_DEFAULT,
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&cogent_serial_out_buf0[0],
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sizeof(cogent_serial_out_buf0),
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&cogent_serial_in_buf0[0],
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sizeof(cogent_serial_in_buf0)
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);
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#else
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static SERIAL_CHANNEL(cogent_serial_channel0,
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cogent_serial_funs,
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cogent_serial_info0,
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CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_A_BAUD),
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CYG_SERIAL_STOP_DEFAULT,
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CYG_SERIAL_PARITY_DEFAULT,
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CYG_SERIAL_WORD_LENGTH_DEFAULT,
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CYG_SERIAL_FLAGS_DEFAULT
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);
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#endif
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DEVTAB_ENTRY(cogent_serial_io0,
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CYGDAT_IO_SERIAL_POWERPC_COGENT_SERIAL_A_NAME,
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0, // Does not depend on a lower level interface
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&cyg_io_serial_devio,
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cogent_serial_init,
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cogent_serial_lookup, // Serial driver may need initializing
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&cogent_serial_channel0
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);
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#endif
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#ifdef CYGPKG_IO_SERIAL_POWERPC_COGENT_SERIAL_B
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static cogent_serial_info cogent_serial_info1 ={CMA_SER_16550_BASE_B,
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CYGNUM_HAL_INTERRUPT_SIU_IRQ1};
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#if CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_B_BUFSIZE > 0
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static unsigned char cogent_serial_out_buf1[CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_B_BUFSIZE];
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static unsigned char cogent_serial_in_buf1[CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_B_BUFSIZE];
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static SERIAL_CHANNEL_USING_INTERRUPTS(cogent_serial_channel1,
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cogent_serial_funs,
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cogent_serial_info1,
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CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_B_BAUD),
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CYG_SERIAL_STOP_DEFAULT,
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CYG_SERIAL_PARITY_DEFAULT,
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CYG_SERIAL_WORD_LENGTH_DEFAULT,
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CYG_SERIAL_FLAGS_DEFAULT,
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&cogent_serial_out_buf1[0],
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sizeof(cogent_serial_out_buf1),
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&cogent_serial_in_buf1[0],
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sizeof(cogent_serial_in_buf1)
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);
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#else
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static SERIAL_CHANNEL(cogent_serial_channel1,
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cogent_serial_funs,
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cogent_serial_info1,
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CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_POWERPC_COGENT_SERIAL_B_BAUD),
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CYG_SERIAL_STOP_DEFAULT,
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CYG_SERIAL_PARITY_DEFAULT,
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CYG_SERIAL_WORD_LENGTH_DEFAULT,
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CYG_SERIAL_FLAGS_DEFAULT
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);
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#endif
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DEVTAB_ENTRY(cogent_serial_io1,
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CYGDAT_IO_SERIAL_POWERPC_COGENT_SERIAL_B_NAME,
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0, // Does not depend on a lower level interface
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&cyg_io_serial_devio,
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cogent_serial_init,
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cogent_serial_lookup, // Serial driver may need initializing
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&cogent_serial_channel1
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);
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#endif
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// Internal function to actually configure the hardware to desired baud rate, etc.
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static bool
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cogent_serial_config_port(serial_channel *chan, cyg_serial_info_t *new_config, bool init)
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{
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cogent_serial_info *cogent_chan = (cogent_serial_info *)chan->dev_priv;
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cyg_addrword_t port = cogent_chan->base;
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cyg_uint16 baud_divisor = select_baud[new_config->baud];
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cyg_uint8 _lcr, _ier;
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if (baud_divisor == 0)
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return false; // Invalid baud rate selected
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// Disable port interrupts while changing hardware
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HAL_READ_UINT8(port+SER_16550_IER, _ier);
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HAL_WRITE_UINT8(port+SER_16550_IER, 0);
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// Set databits, stopbits and parity.
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_lcr = select_word_length[(new_config->word_length -
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CYGNUM_SERIAL_WORD_LENGTH_5)] |
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select_stop_bits[new_config->stop] |
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select_parity[new_config->parity];
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HAL_WRITE_UINT8(port+SER_16550_LCR, _lcr);
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// Set baud rate.
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_lcr |= LCR_DL;
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HAL_WRITE_UINT8(port+SER_16550_LCR, _lcr);
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HAL_WRITE_UINT8(port+SER_16550_DLM, baud_divisor >> 8);
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HAL_WRITE_UINT8(port+SER_16550_DLL, baud_divisor & 0xff);
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_lcr &= ~LCR_DL;
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HAL_WRITE_UINT8(port+SER_16550_LCR, _lcr);
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if (init) {
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// Enable and clear FIFO
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HAL_WRITE_UINT8(port+SER_16550_FCR,
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(FCR_ENABLE | FCR_CLEAR_RCVR | FCR_CLEAR_XMIT));
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if (chan->out_cbuf.len != 0) {
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HAL_WRITE_UINT8(port+SER_16550_IER, SIO_IER_ERDAI);
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} else {
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HAL_WRITE_UINT8(port+SER_16550_IER, 0);
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}
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{
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// Special initialization for ST16C552 on CMA102
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cyg_uint8 mcr;
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HAL_READ_UINT8(CMA_SER_16550_BASE_A+SER_16550_MCR, mcr);
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mcr |= 8;
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HAL_WRITE_UINT8(CMA_SER_16550_BASE_A+SER_16550_MCR, mcr);
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HAL_READ_UINT8(CMA_SER_16550_BASE_B+SER_16550_MCR, mcr);
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mcr |= 8;
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HAL_WRITE_UINT8(CMA_SER_16550_BASE_B+SER_16550_MCR, mcr);
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}
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249 |
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} else {
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250 |
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HAL_WRITE_UINT8(port+SER_16550_IER, _ier);
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251 |
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}
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252 |
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if (new_config != &chan->config) {
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chan->config = *new_config;
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254 |
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}
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return true;
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256 |
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}
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257 |
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258 |
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// Function to initialize the device. Called at bootstrap time.
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259 |
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static bool
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260 |
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cogent_serial_init(struct cyg_devtab_entry *tab)
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{
|
262 |
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serial_channel *chan = (serial_channel *)tab->priv;
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263 |
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cogent_serial_info *cogent_chan = (cogent_serial_info *)chan->dev_priv;
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264 |
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#ifdef CYGDBG_IO_INIT
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265 |
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diag_printf("COGENT SERIAL init - dev: %x.%d\n", cogent_chan->base, cogent_chan->int_num);
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266 |
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#endif
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267 |
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(chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices
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268 |
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if (chan->out_cbuf.len != 0) {
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269 |
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cyg_drv_interrupt_create(cogent_chan->int_num,
|
270 |
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0, // can change IRQ0 priority
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271 |
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(cyg_addrword_t)chan, // Data item passed to interrupt handler
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272 |
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cogent_serial_ISR,
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cogent_serial_DSR,
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274 |
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&cogent_chan->serial_interrupt_handle,
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275 |
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&cogent_chan->serial_interrupt);
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276 |
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cyg_drv_interrupt_attach(cogent_chan->serial_interrupt_handle);
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277 |
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cyg_drv_interrupt_unmask(cogent_chan->int_num);
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278 |
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}
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279 |
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cogent_serial_config_port(chan, &chan->config, true);
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280 |
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return true;
|
281 |
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}
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282 |
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|
283 |
|
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// This routine is called when the device is "looked" up (i.e. attached)
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284 |
|
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static Cyg_ErrNo
|
285 |
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cogent_serial_lookup(struct cyg_devtab_entry **tab,
|
286 |
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struct cyg_devtab_entry *sub_tab,
|
287 |
|
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const char *name)
|
288 |
|
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{
|
289 |
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serial_channel *chan = (serial_channel *)(*tab)->priv;
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290 |
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(chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices
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291 |
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return ENOERR;
|
292 |
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}
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293 |
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|
294 |
|
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// Send a character to the device output buffer.
|
295 |
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// Return 'true' if character is sent to device
|
296 |
|
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static bool
|
297 |
|
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cogent_serial_putc(serial_channel *chan, unsigned char c)
|
298 |
|
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{
|
299 |
|
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cogent_serial_info *cogent_chan = (cogent_serial_info *)chan->dev_priv;
|
300 |
|
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cyg_addrword_t port = cogent_chan->base;
|
301 |
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cyg_uint8 _lsr;
|
302 |
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303 |
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HAL_READ_UINT8(port+SER_16550_LSR, _lsr);
|
304 |
|
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if (_lsr & SIO_LSR_THRE) {
|
305 |
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// Transmit buffer is empty
|
306 |
|
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HAL_WRITE_UINT8(port+SER_16550_THR, c);
|
307 |
|
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return true;
|
308 |
|
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} else {
|
309 |
|
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// No space
|
310 |
|
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return false;
|
311 |
|
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}
|
312 |
|
|
}
|
313 |
|
|
|
314 |
|
|
// Fetch a character from the device input buffer, waiting if necessary
|
315 |
|
|
static unsigned char
|
316 |
|
|
cogent_serial_getc(serial_channel *chan)
|
317 |
|
|
{
|
318 |
|
|
unsigned char c;
|
319 |
|
|
cogent_serial_info *cogent_chan = (cogent_serial_info *)chan->dev_priv;
|
320 |
|
|
cyg_addrword_t port = cogent_chan->base;
|
321 |
|
|
cyg_uint8 _lsr;
|
322 |
|
|
|
323 |
|
|
do {
|
324 |
|
|
HAL_READ_UINT8(port+SER_16550_LSR, _lsr);
|
325 |
|
|
} while ((_lsr & SIO_LSR_DR) == 0);
|
326 |
|
|
|
327 |
|
|
HAL_READ_UINT8(port+SER_16550_RBR, c);
|
328 |
|
|
return c;
|
329 |
|
|
}
|
330 |
|
|
|
331 |
|
|
// Set up the device characteristics; baud rate, etc.
|
332 |
|
|
static Cyg_ErrNo
|
333 |
|
|
cogent_serial_set_config(serial_channel *chan, cyg_uint32 key,
|
334 |
|
|
const void *xbuf, cyg_uint32 *len)
|
335 |
|
|
{
|
336 |
|
|
switch (key) {
|
337 |
|
|
case CYG_IO_SET_CONFIG_SERIAL_INFO:
|
338 |
|
|
{
|
339 |
|
|
cyg_serial_info_t *config = (cyg_serial_info_t *)xbuf;
|
340 |
|
|
if ( *len < sizeof(cyg_serial_info_t) ) {
|
341 |
|
|
return -EINVAL;
|
342 |
|
|
}
|
343 |
|
|
*len = sizeof(cyg_serial_info_t);
|
344 |
|
|
if ( true != cogent_serial_config_port(chan, config, false) )
|
345 |
|
|
return -EINVAL;
|
346 |
|
|
}
|
347 |
|
|
break;
|
348 |
|
|
default:
|
349 |
|
|
return -EINVAL;
|
350 |
|
|
}
|
351 |
|
|
return ENOERR;
|
352 |
|
|
}
|
353 |
|
|
|
354 |
|
|
// Enable the transmitter on the device
|
355 |
|
|
static void
|
356 |
|
|
cogent_serial_start_xmit(serial_channel *chan)
|
357 |
|
|
{
|
358 |
|
|
cogent_serial_info *cogent_chan = (cogent_serial_info *)chan->dev_priv;
|
359 |
|
|
cyg_addrword_t port = cogent_chan->base;
|
360 |
|
|
cyg_uint8 _ier;
|
361 |
|
|
|
362 |
|
|
HAL_READ_UINT8(port+SER_16550_IER, _ier);
|
363 |
|
|
_ier |= IER_XMT; // Enable xmit interrupt
|
364 |
|
|
HAL_WRITE_UINT8(port+SER_16550_IER, _ier);
|
365 |
|
|
|
366 |
|
|
(chan->callbacks->xmt_char)(chan);
|
367 |
|
|
}
|
368 |
|
|
|
369 |
|
|
// Disable the transmitter on the device
|
370 |
|
|
static void
|
371 |
|
|
cogent_serial_stop_xmit(serial_channel *chan)
|
372 |
|
|
{
|
373 |
|
|
cogent_serial_info *cogent_chan = (cogent_serial_info *)chan->dev_priv;
|
374 |
|
|
cyg_addrword_t port = cogent_chan->base;
|
375 |
|
|
cyg_uint8 _ier;
|
376 |
|
|
|
377 |
|
|
HAL_READ_UINT8(port+SER_16550_IER, _ier);
|
378 |
|
|
_ier &= ~IER_XMT; // Disable xmit interrupt
|
379 |
|
|
HAL_WRITE_UINT8(port+SER_16550_IER, _ier);
|
380 |
|
|
}
|
381 |
|
|
|
382 |
|
|
// Serial I/O - low level interrupt handler (ISR)
|
383 |
|
|
static cyg_uint32
|
384 |
|
|
cogent_serial_ISR(cyg_vector_t vector, cyg_addrword_t data)
|
385 |
|
|
{
|
386 |
|
|
serial_channel *chan = (serial_channel *)data;
|
387 |
|
|
cogent_serial_info *cogent_chan = (cogent_serial_info *)chan->dev_priv;
|
388 |
|
|
cyg_drv_interrupt_mask(cogent_chan->int_num);
|
389 |
|
|
cyg_drv_interrupt_acknowledge(cogent_chan->int_num);
|
390 |
|
|
return CYG_ISR_CALL_DSR; // Cause DSR to be run
|
391 |
|
|
}
|
392 |
|
|
|
393 |
|
|
// Serial I/O - high level interrupt handler (DSR)
|
394 |
|
|
static void
|
395 |
|
|
cogent_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
|
396 |
|
|
{
|
397 |
|
|
serial_channel *chan = (serial_channel *)data;
|
398 |
|
|
cogent_serial_info *cogent_chan = (cogent_serial_info *)chan->dev_priv;
|
399 |
|
|
cyg_addrword_t port = cogent_chan->base;
|
400 |
|
|
cyg_uint8 _iir;
|
401 |
|
|
|
402 |
|
|
HAL_READ_UINT8(port+SER_16550_IIR, _iir);
|
403 |
|
|
_iir &= SIO_IIR_ID_MASK;
|
404 |
|
|
if ( ISR_Tx == _iir ) {
|
405 |
|
|
(chan->callbacks->xmt_char)(chan);
|
406 |
|
|
} else if ( ISR_Rx == _iir ) {
|
407 |
|
|
cyg_uint8 _c;
|
408 |
|
|
HAL_READ_UINT8(port+SER_16550_RBR, _c);
|
409 |
|
|
(chan->callbacks->rcv_char)(chan, _c);
|
410 |
|
|
}
|
411 |
|
|
cyg_drv_interrupt_unmask(cogent_chan->int_num);
|
412 |
|
|
}
|
413 |
|
|
#endif
|