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//==========================================================================
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//
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// ec555_serial_with_ints.c
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//
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// PowerPC 5xx EC555 Serial I/O Interface Module (interrupt driven)
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): Bob Koninckx
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// Contributors:
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// Date: 2002-04-25
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// Purpose: EC555 Serial I/O module (interrupt driven version)
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// Description:
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//
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//
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//####DESCRIPTIONEND####
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//==========================================================================
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//----------------------------------
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// Includes and forward declarations
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//----------------------------------
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#include <pkgconf/io_serial.h>
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#include <pkgconf/io.h>
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#include <cyg/io/io.h>
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#include <cyg/hal/hal_intr.h>
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#include <cyg/hal/hal_arbiter.h>
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#include <cyg/io/devtab.h>
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#include <cyg/infra/diag.h>
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#include <cyg/io/serial.h>
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// Only build this driver for the MPC555 based EC555 board
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#ifdef CYGPKG_IO_SERIAL_POWERPC_EC555
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#include "ec555_serial.h"
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//-----------------
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// Type definitions
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//-----------------
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typedef struct mpc555_serial_info {
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CYG_ADDRWORD base; // The base address of the serial port
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CYG_WORD tx_interrupt_num; // trivial
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CYG_WORD rx_interrupt_num; // trivial
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cyg_priority_t tx_interrupt_priority; // trivial
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cyg_priority_t rx_interrupt_priority; // trivial
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bool tx_interrupt_enable; // tells if the transmit interrupt may be re-enabled
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cyg_interrupt tx_interrupt; // the tx interrupt object
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cyg_handle_t tx_interrupt_handle; // the tx interrupt handle
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cyg_interrupt rx_interrupt; // the rx interrupt object
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cyg_handle_t rx_interrupt_handle; // the rx interrupt handle
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} mpc555_serial_info;
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//--------------------
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// Function prototypes
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//--------------------
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static bool mpc555_serial_init(struct cyg_devtab_entry * tab);
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static bool mpc555_serial_putc(serial_channel * chan, unsigned char c);
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static Cyg_ErrNo mpc555_serial_lookup(struct cyg_devtab_entry ** tab,
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struct cyg_devtab_entry * sub_tab,
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const char * name);
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static unsigned char mpc555_serial_getc(serial_channel *chan);
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static Cyg_ErrNo mpc555_serial_set_config(serial_channel *chan, cyg_uint32 key,
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const void *xbuf, cyg_uint32 *len);
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static void mpc555_serial_start_xmit(serial_channel *chan);
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static void mpc555_serial_stop_xmit(serial_channel *chan);
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// The interrupt servers
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static cyg_uint32 mpc555_serial_tx_ISR(cyg_vector_t vector, cyg_addrword_t data);
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static cyg_uint32 mpc555_serial_rx_ISR(cyg_vector_t vector, cyg_addrword_t data);
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static void mpc555_serial_tx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data);
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static void mpc555_serial_rx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data);
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//-------------------------------------------
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// Register the device driver with the kernel
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//-------------------------------------------
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static SERIAL_FUNS(mpc555_serial_funs,
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mpc555_serial_putc,
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mpc555_serial_getc,
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mpc555_serial_set_config,
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mpc555_serial_start_xmit,
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mpc555_serial_stop_xmit);
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//-------------------
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// Device driver data
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//-------------------
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#ifdef CYGPKG_IO_SERIAL_POWERPC_EC555_SERIAL_A
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static mpc555_serial_info mpc555_serial_info0 = {MPC555_SERIAL_BASE_A,
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CYGNUM_HAL_INTERRUPT_IMB3_SCI0_TX,
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CYGNUM_HAL_INTERRUPT_IMB3_SCI0_RX,
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CYGNUM_HAL_INTERRUPT_IMB3_SCI0_TX_PRIORITY,
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CYGNUM_HAL_INTERRUPT_IMB3_SCI0_RX_PRIORITY,
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false};
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#if CYGNUM_IO_SERIAL_POWERPC_EC555_SERIAL_A_BUFSIZE > 0
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static unsigned char mpc555_serial_out_buf0[CYGNUM_IO_SERIAL_POWERPC_EC555_SERIAL_A_BUFSIZE];
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static unsigned char mpc555_serial_in_buf0[CYGNUM_IO_SERIAL_POWERPC_EC555_SERIAL_A_BUFSIZE];
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static SERIAL_CHANNEL_USING_INTERRUPTS(mpc555_serial_channel0,
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mpc555_serial_funs,
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mpc555_serial_info0,
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CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_POWERPC_EC555_SERIAL_A_BAUD),
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CYG_SERIAL_STOP_DEFAULT,
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CYG_SERIAL_PARITY_DEFAULT,
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CYG_SERIAL_WORD_LENGTH_DEFAULT,
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CYG_SERIAL_FLAGS_DEFAULT,
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&mpc555_serial_out_buf0[0],
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sizeof(mpc555_serial_out_buf0),
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&mpc555_serial_in_buf0[0],
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sizeof(mpc555_serial_in_buf0));
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#else
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static SERIAL_CHANNEL(mpc555_serial_channel0,
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mpc555_serial_funs,
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mpc555_serial_info0,
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CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_POWERPC_EC555_SERIAL_A_BAUD),
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CYG_SERIAL_STOP_DEFAULT,
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CYG_SERIAL_PARITY_DEFAULT,
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CYG_SERIAL_WORD_LENGTH_DEFAULT,
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CYG_SERIAL_FLAGS_DEFAULT);
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#endif
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DEVTAB_ENTRY(mpc555_serial_io0,
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CYGDAT_IO_SERIAL_POWERPC_EC555_SERIAL_A_NAME,
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0, // does not depend on a lower level device driver
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&cyg_io_serial_devio,
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mpc555_serial_init,
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mpc555_serial_lookup,
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&mpc555_serial_channel0);
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#endif // ifdef CYGPKG_IO_SERIAL_POWERPC_EC555_SERIAL_A
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#ifdef CYGPKG_IO_SERIAL_POWERPC_EC555_SERIAL_B
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static mpc555_serial_info mpc555_serial_info1 = {MPC555_SERIAL_BASE_B,
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CYGNUM_HAL_INTERRUPT_IMB3_SCI1_TX,
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CYGNUM_HAL_INTERRUPT_IMB3_SCI1_RX,
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CYGNUM_HAL_INTERRUPT_IMB3_SCI1_TX_PRIORITY,
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CYGNUM_HAL_INTERRUPT_IMB3_SCI1_RX_PRIORITY,
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false};
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#if CYGNUM_IO_SERIAL_POWERPC_EC555_SERIAL_B_BUFSIZE > 0
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static unsigned char mpc555_serial_out_buf1[CYGNUM_IO_SERIAL_POWERPC_EC555_SERIAL_B_BUFSIZE];
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static unsigned char mpc555_serial_in_buf1[CYGNUM_IO_SERIAL_POWERPC_EC555_SERIAL_B_BUFSIZE];
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static SERIAL_CHANNEL_USING_INTERRUPTS(mpc555_serial_channel1,
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mpc555_serial_funs,
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mpc555_serial_info1,
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CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_POWERPC_EC555_SERIAL_B_BAUD),
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CYG_SERIAL_STOP_DEFAULT,
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CYG_SERIAL_PARITY_DEFAULT,
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CYG_SERIAL_WORD_LENGTH_DEFAULT,
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CYG_SERIAL_FLAGS_DEFAULT,
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&mpc555_serial_out_buf1[0],
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sizeof(mpc555_serial_out_buf1),
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&mpc555_serial_in_buf1[0],
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sizeof(mpc555_serial_in_buf1));
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#else
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static SERIAL_CHANNEL(mpc555_serial_channel1,
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mpc555_serial_funs,
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mpc555_serial_info1,
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CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_POWERPC_EC555_SERIAL_B_BAUD),
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CYG_SERIAL_STOP_DEFAULT,
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CYG_SERIAL_PARITY_DEFAULT,
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CYG_SERIAL_WORD_LENGTH_DEFAULT,
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CYG_SERIAL_FLAGS_DEFAULT);
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#endif
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DEVTAB_ENTRY(mpc555_serial_io1,
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CYGDAT_IO_SERIAL_POWERPC_EC555_SERIAL_B_NAME,
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0, // does not depend on a lower level device driver
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&cyg_io_serial_devio,
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mpc555_serial_init,
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mpc555_serial_lookup,
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&mpc555_serial_channel1);
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#endif // ifdef CYGPKG_IO_SERIAL_POWERPC_EC555_SERIAL_B
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//-----------------------------
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// Device driver implementation
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//-----------------------------
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// The arbitration isr.
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// I think this is the best place to implement it. The device driver is the only place
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// in the code where the knowledge is present about how the hardware is used
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static cyg_uint32 hal_arbitration_isr_qsci(CYG_ADDRWORD a_vector, CYG_ADDRWORD a_data)
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{
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cyg_uint16 status;
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cyg_uint16 control;
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#ifdef CYGPKG_IO_SERIAL_POWERPC_EC555_SERIAL_A // Do not waist time on unused hardware
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HAL_READ_UINT16(CYGARC_REG_IMM_SC1SR, status);
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HAL_READ_UINT16(CYGARC_REG_IMM_SCC1R1, control);
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if((status & CYGARC_REG_IMM_SCxSR_TDRE) && (control & CYGARC_REG_IMM_SCCxR1_TIE))
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return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI0_TX);
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// Don't waist time on unused interrupts
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// if((status & CYGARC_REG_IMM_SCxSR_TC) && (control & CYGARC_REG_IMM_SCCxR1_TCIE))
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// return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI0_TXC);
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if((status & CYGARC_REG_IMM_SCxSR_RDRF) && (control & CYGARC_REG_IMM_SCCxR1_RIE))
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return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI0_RX);
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// Don't waist time on unused interrupts
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// if((status & CYGARC_REG_IMM_SCxSR_IDLE) && (control & CYGARC_REG_IMM_SCCxR1_ILIE))
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// return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI0_IDLE);
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#endif
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#ifdef CYGPKG_IO_SERIAL_POWERPC_EC555_SERIAL_B // Do not waist time on unused hardware
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231 |
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HAL_READ_UINT16(CYGARC_REG_IMM_SC2SR, status);
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HAL_READ_UINT16(CYGARC_REG_IMM_SCC2R1, control);
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if((status & CYGARC_REG_IMM_SCxSR_TDRE) && (control & CYGARC_REG_IMM_SCCxR1_TIE))
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return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI1_TX);
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// Don't waist time on unused interrupts
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236 |
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// if((status & CYGARC_REG_IMM_SCxSR_TC) && (control & CYGARC_REG_IMM_SCCxR1_TCIE))
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// return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI1_TXC);
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238 |
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if((status & CYGARC_REG_IMM_SCxSR_RDRF) && (control & CYGARC_REG_IMM_SCCxR1_RIE))
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239 |
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return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI1_RX);
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// Don't waist time on unused interrupts
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// if((status & CYGARC_REG_IMM_SCxSR_IDLE) && (control & CYGARC_REG_IMM_SCCxR1_ILIE))
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// return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI1_IDLE);
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243 |
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244 |
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#if 0
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245 |
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// The driver doesn't use the queue operation of the hardware (It would need different code for serial 1 and 2
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// since oly one port supports queue mode). So the following is not needed.
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// Leave it there. It is easyer for later implementations to remove the comments than finding
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248 |
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// out how the hardware works again.
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249 |
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HAL_READ_UINT16(CYGARC_REG_IMM_QSCI1SR, status);
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HAL_READ_UINT16(CYGARC_REG_IMM_QSCI1CR, control);
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251 |
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if((status & CYGARC_REG_IMM_QSCI1SR_QTHF) && (control & CYGARC_REG_IMM_QSCI1CR_QTHFI))
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252 |
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return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI1_RXQTHF);
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253 |
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if((status & CYGARC_REG_IMM_QSCI1SR_QBHF) && (control & CYGARC_REG_IMM_QSCI1CR_QBHFI))
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254 |
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return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI1_RXQBHF);
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255 |
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if((status & CYGARC_REG_IMM_QSCI1SR_QTHE) && (control & CYGARC_REG_IMM_QSCI1CR_QTHEI))
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256 |
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return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI1_TXQTHE);
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257 |
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if((status & CYGARC_REG_IMM_QSCI1SR_QBHE) && (control & CYGARC_REG_IMM_QSCI1CR_QBHEI))
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258 |
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return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI1_TXQBHE);
|
259 |
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260 |
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cyg_uint16 status;
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261 |
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cyg_uint16 control;
|
262 |
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263 |
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HAL_READ_UINT16(CYGARC_REG_IMM_SPSR, status);
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264 |
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HAL_READ_UINT16(CYGARC_REG_IMM_SPCR2, control);
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265 |
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if((status & CYGARC_REG_IMM_SPSR_SPIF) && (control & CYGARC_REG_IMM_SPCR2_SPIFIE))
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return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SPI_FI);
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267 |
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268 |
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HAL_READ_UINT16(CYGARC_REG_IMM_SPCR3, control);
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269 |
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if((status & CYGARC_REG_IMM_SPSR_MODF) && (control & CYGARC_REG_IMM_SPCR3_HMIE))
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270 |
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return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SPI_MODF);
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271 |
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272 |
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if((status & CYGARC_REG_IMM_SPSR_HALTA) && (control & CYGARC_REG_IMM_SPCR3_HMIE))
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273 |
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return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SPI_HALTA);
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274 |
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#endif
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275 |
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276 |
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#endif
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277 |
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278 |
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return 0;
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279 |
|
|
}
|
280 |
|
|
|
281 |
|
|
//--------------------------------------------------------------------------------
|
282 |
|
|
// Internal function to actually configure the hardware to desired baud rate, etc.
|
283 |
|
|
//--------------------------------------------------------------------------------
|
284 |
|
|
static bool mpc555_serial_config_port(serial_channel * chan, cyg_serial_info_t * new_config, bool init)
|
285 |
|
|
{
|
286 |
|
|
mpc555_serial_info * mpc555_chan = (mpc555_serial_info *)(chan->dev_priv);
|
287 |
|
|
|
288 |
|
|
cyg_addrword_t port = mpc555_chan->base;
|
289 |
|
|
cyg_uint16 baud_rate = select_baud[new_config->baud];
|
290 |
|
|
unsigned char frame_length = 1; // The start bit
|
291 |
|
|
|
292 |
|
|
cyg_uint16 old_isrstate;
|
293 |
|
|
cyg_uint16 sccxr;
|
294 |
|
|
|
295 |
|
|
if(!baud_rate)
|
296 |
|
|
return false; // Invalid baud rate selected
|
297 |
|
|
|
298 |
|
|
if((new_config->word_length != CYGNUM_SERIAL_WORD_LENGTH_7) &&
|
299 |
|
|
(new_config->word_length != CYGNUM_SERIAL_WORD_LENGTH_8))
|
300 |
|
|
return false; // Invalid word length selected
|
301 |
|
|
|
302 |
|
|
if((new_config->parity != CYGNUM_SERIAL_PARITY_NONE) &&
|
303 |
|
|
(new_config->parity != CYGNUM_SERIAL_PARITY_EVEN) &&
|
304 |
|
|
(new_config->parity != CYGNUM_SERIAL_PARITY_ODD))
|
305 |
|
|
return false; // Invalid parity selected
|
306 |
|
|
|
307 |
|
|
if((new_config->stop != CYGNUM_SERIAL_STOP_1) &&
|
308 |
|
|
(new_config->stop != CYGNUM_SERIAL_STOP_2))
|
309 |
|
|
return false; // Invalid stop bits selected
|
310 |
|
|
|
311 |
|
|
frame_length += select_word_length[new_config->word_length - CYGNUM_SERIAL_WORD_LENGTH_5];
|
312 |
|
|
frame_length += select_stop_bits[new_config->stop];
|
313 |
|
|
frame_length += select_parity[new_config->parity];
|
314 |
|
|
|
315 |
|
|
if((frame_length != 10) && (frame_length != 11))
|
316 |
|
|
return false; // Invalid frame format selected
|
317 |
|
|
|
318 |
|
|
// Disable port interrupts while changing hardware
|
319 |
|
|
HAL_READ_UINT16(port + MPC555_SERIAL_SCCxR1, sccxr);
|
320 |
|
|
old_isrstate = sccxr;
|
321 |
|
|
old_isrstate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_LOOPS);
|
322 |
|
|
old_isrstate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_WOMS);
|
323 |
|
|
old_isrstate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_ILT);
|
324 |
|
|
old_isrstate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_PT);
|
325 |
|
|
old_isrstate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_PE);
|
326 |
|
|
old_isrstate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_M);
|
327 |
|
|
old_isrstate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_WAKE);
|
328 |
|
|
old_isrstate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_TE);
|
329 |
|
|
old_isrstate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_RE);
|
330 |
|
|
old_isrstate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_RWU);
|
331 |
|
|
old_isrstate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_SBK);
|
332 |
|
|
sccxr &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_TIE);
|
333 |
|
|
sccxr &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_TCIE);
|
334 |
|
|
sccxr &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_RIE);
|
335 |
|
|
sccxr &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_ILIE);
|
336 |
|
|
HAL_WRITE_UINT16(port + MPC555_SERIAL_SCCxR1, sccxr);
|
337 |
|
|
|
338 |
|
|
// Set databits, stopbits and parity.
|
339 |
|
|
HAL_READ_UINT16(port + MPC555_SERIAL_SCCxR1, sccxr);
|
340 |
|
|
|
341 |
|
|
if(frame_length == 11)
|
342 |
|
|
sccxr |= (cyg_uint16)MPC555_SERIAL_SCCxR1_M;
|
343 |
|
|
else
|
344 |
|
|
sccxr &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_M);
|
345 |
|
|
|
346 |
|
|
switch(new_config->parity)
|
347 |
|
|
{
|
348 |
|
|
case CYGNUM_SERIAL_PARITY_NONE:
|
349 |
|
|
sccxr &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_PE);
|
350 |
|
|
break;
|
351 |
|
|
case CYGNUM_SERIAL_PARITY_EVEN:
|
352 |
|
|
sccxr |= (cyg_uint16)MPC555_SERIAL_SCCxR1_PE;
|
353 |
|
|
sccxr &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_PT);
|
354 |
|
|
break;
|
355 |
|
|
case CYGNUM_SERIAL_PARITY_ODD:
|
356 |
|
|
sccxr |= (cyg_uint16)MPC555_SERIAL_SCCxR1_PE;
|
357 |
|
|
sccxr |= (cyg_uint16)MPC555_SERIAL_SCCxR1_PT;
|
358 |
|
|
break;
|
359 |
|
|
default:
|
360 |
|
|
break;
|
361 |
|
|
}
|
362 |
|
|
HAL_WRITE_UINT16(port + MPC555_SERIAL_SCCxR1, sccxr);
|
363 |
|
|
|
364 |
|
|
// Set baud rate.
|
365 |
|
|
baud_rate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR0_OTHR);
|
366 |
|
|
baud_rate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR0_LINKBD);
|
367 |
|
|
HAL_READ_UINT16(port + MPC555_SERIAL_SCCxR0, sccxr);
|
368 |
|
|
sccxr &= ~(MPC555_SERIAL_SCCxR0_SCxBR);
|
369 |
|
|
sccxr |= baud_rate;
|
370 |
|
|
HAL_WRITE_UINT16(port + MPC555_SERIAL_SCCxR0, sccxr);
|
371 |
|
|
|
372 |
|
|
// Enable the device
|
373 |
|
|
HAL_READ_UINT16(port + MPC555_SERIAL_SCCxR1, sccxr);
|
374 |
|
|
sccxr |= MPC555_SERIAL_SCCxR1_TE;
|
375 |
|
|
sccxr |= MPC555_SERIAL_SCCxR1_RE;
|
376 |
|
|
HAL_WRITE_UINT16(port + MPC555_SERIAL_SCCxR1, sccxr);
|
377 |
|
|
|
378 |
|
|
if(init)
|
379 |
|
|
{ // enable the receiver interrupt
|
380 |
|
|
HAL_READ_UINT16(port + MPC555_SERIAL_SCCxR1, sccxr);
|
381 |
|
|
sccxr |= MPC555_SERIAL_SCCxR1_RIE;
|
382 |
|
|
HAL_WRITE_UINT16(port + MPC555_SERIAL_SCCxR1, sccxr);
|
383 |
|
|
}
|
384 |
|
|
else // Restore the old interrupt state
|
385 |
|
|
{
|
386 |
|
|
HAL_READ_UINT16(port + MPC555_SERIAL_SCCxR1, sccxr);
|
387 |
|
|
sccxr |= old_isrstate;
|
388 |
|
|
HAL_WRITE_UINT16(port + MPC555_SERIAL_SCCxR1, sccxr);
|
389 |
|
|
}
|
390 |
|
|
|
391 |
|
|
if(new_config != &chan->config)
|
392 |
|
|
chan->config = *new_config;
|
393 |
|
|
|
394 |
|
|
return true;
|
395 |
|
|
}
|
396 |
|
|
|
397 |
|
|
//--------------------------------------------------------------
|
398 |
|
|
// Function to initialize the device. Called at bootstrap time.
|
399 |
|
|
//--------------------------------------------------------------
|
400 |
|
|
static hal_mpc5xx_arbitration_data arbiter;
|
401 |
|
|
|
402 |
|
|
static bool mpc555_serial_init(struct cyg_devtab_entry * tab)
|
403 |
|
|
{
|
404 |
|
|
serial_channel * chan = (serial_channel *)tab->priv;
|
405 |
|
|
mpc555_serial_info * mpc555_chan = (mpc555_serial_info *)chan->dev_priv;
|
406 |
|
|
|
407 |
|
|
if(!mpc555_serial_config_port(chan, &chan->config, true))
|
408 |
|
|
return false;
|
409 |
|
|
|
410 |
|
|
(chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices
|
411 |
|
|
if(chan->out_cbuf.len != 0)
|
412 |
|
|
{
|
413 |
|
|
arbiter.priority = CYGNUM_HAL_ISR_SOURCE_PRIORITY_QSCI;
|
414 |
|
|
arbiter.data = 0;
|
415 |
|
|
arbiter.arbiter = hal_arbitration_isr_qsci;
|
416 |
|
|
|
417 |
|
|
// Install the arbitration isr, Make sure that is is not installed twice
|
418 |
|
|
hal_mpc5xx_remove_arbitration_isr(&arbiter);
|
419 |
|
|
hal_mpc5xx_install_arbitration_isr(&arbiter);
|
420 |
|
|
|
421 |
|
|
// Create the Tx interrupt, do not enable it yet
|
422 |
|
|
cyg_drv_interrupt_create(mpc555_chan->tx_interrupt_num,
|
423 |
|
|
mpc555_chan->tx_interrupt_priority,
|
424 |
|
|
(cyg_addrword_t)chan, // Data item passed to interrupt handler
|
425 |
|
|
mpc555_serial_tx_ISR,
|
426 |
|
|
mpc555_serial_tx_DSR,
|
427 |
|
|
&mpc555_chan->tx_interrupt_handle,
|
428 |
|
|
&mpc555_chan->tx_interrupt);
|
429 |
|
|
cyg_drv_interrupt_attach(mpc555_chan->tx_interrupt_handle);
|
430 |
|
|
|
431 |
|
|
// Create the Rx interrupt, this can be safely unmasked now
|
432 |
|
|
cyg_drv_interrupt_create(mpc555_chan->rx_interrupt_num,
|
433 |
|
|
mpc555_chan->rx_interrupt_priority,
|
434 |
|
|
(cyg_addrword_t)chan,
|
435 |
|
|
mpc555_serial_rx_ISR,
|
436 |
|
|
mpc555_serial_rx_DSR,
|
437 |
|
|
&mpc555_chan->rx_interrupt_handle,
|
438 |
|
|
&mpc555_chan->rx_interrupt);
|
439 |
|
|
cyg_drv_interrupt_attach(mpc555_chan->rx_interrupt_handle);
|
440 |
|
|
cyg_drv_interrupt_unmask(mpc555_chan->rx_interrupt_num);
|
441 |
|
|
}
|
442 |
|
|
|
443 |
|
|
return true;
|
444 |
|
|
}
|
445 |
|
|
|
446 |
|
|
//----------------------------------------------------------------------
|
447 |
|
|
// This routine is called when the device is "looked" up (i.e. attached)
|
448 |
|
|
//----------------------------------------------------------------------
|
449 |
|
|
static Cyg_ErrNo mpc555_serial_lookup(struct cyg_devtab_entry ** tab,
|
450 |
|
|
struct cyg_devtab_entry * sub_tab,
|
451 |
|
|
const char * name)
|
452 |
|
|
{
|
453 |
|
|
serial_channel * chan = (serial_channel *)(*tab)->priv;
|
454 |
|
|
(chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices
|
455 |
|
|
|
456 |
|
|
return ENOERR;
|
457 |
|
|
}
|
458 |
|
|
|
459 |
|
|
//----------------------------------------------
|
460 |
|
|
// Send a character to the device output buffer.
|
461 |
|
|
// Return 'true' if character is sent to device
|
462 |
|
|
//----------------------------------------------
|
463 |
|
|
static bool mpc555_serial_putc(serial_channel * chan, unsigned char c)
|
464 |
|
|
{
|
465 |
|
|
mpc555_serial_info * mpc555_chan = (mpc555_serial_info *)chan->dev_priv;
|
466 |
|
|
cyg_addrword_t port = mpc555_chan->base;
|
467 |
|
|
|
468 |
|
|
cyg_uint16 scsr;
|
469 |
|
|
cyg_uint16 scdr;
|
470 |
|
|
|
471 |
|
|
HAL_READ_UINT16(port + MPC555_SERIAL_SCxSR, scsr);
|
472 |
|
|
if(scsr & MPC555_SERIAL_SCxSR_TDRE)
|
473 |
|
|
{ // Ok, we have space, write the character and return success
|
474 |
|
|
scdr = (cyg_uint16)c;
|
475 |
|
|
HAL_WRITE_UINT16(port + MPC555_SERIAL_SCxDR, scdr);
|
476 |
|
|
return true;
|
477 |
|
|
}
|
478 |
|
|
else
|
479 |
|
|
// We cannot write to the transmitter, return failure
|
480 |
|
|
return false;
|
481 |
|
|
}
|
482 |
|
|
|
483 |
|
|
//---------------------------------------------------------------------
|
484 |
|
|
// Fetch a character from the device input buffer, waiting if necessary
|
485 |
|
|
//---------------------------------------------------------------------
|
486 |
|
|
static unsigned char mpc555_serial_getc(serial_channel * chan)
|
487 |
|
|
{
|
488 |
|
|
unsigned char c;
|
489 |
|
|
mpc555_serial_info * mpc555_chan = (mpc555_serial_info *)chan->dev_priv;
|
490 |
|
|
cyg_addrword_t port = mpc555_chan->base;
|
491 |
|
|
|
492 |
|
|
cyg_uint16 scsr;
|
493 |
|
|
cyg_uint16 scdr;
|
494 |
|
|
|
495 |
|
|
do {
|
496 |
|
|
HAL_READ_UINT16(port + MPC555_SERIAL_SCxSR, scsr);
|
497 |
|
|
} while(!(scsr & MPC555_SERIAL_SCxSR_RDRF));
|
498 |
|
|
|
499 |
|
|
// Ok, data is received, read it out and return
|
500 |
|
|
HAL_READ_UINT16(port + MPC555_SERIAL_SCxDR, scdr);
|
501 |
|
|
c = (unsigned char)scdr;
|
502 |
|
|
|
503 |
|
|
return c;
|
504 |
|
|
}
|
505 |
|
|
|
506 |
|
|
//---------------------------------------------------
|
507 |
|
|
// Set up the device characteristics; baud rate, etc.
|
508 |
|
|
//---------------------------------------------------
|
509 |
|
|
static bool mpc555_serial_set_config(serial_channel * chan, cyg_uint32 key,
|
510 |
|
|
const void *xbuf, cyg_uint32 * len)
|
511 |
|
|
{
|
512 |
|
|
switch(key) {
|
513 |
|
|
case CYG_IO_SET_CONFIG_SERIAL_INFO:
|
514 |
|
|
{
|
515 |
|
|
cyg_serial_info_t *config = (cyg_serial_info_t *)xbuf;
|
516 |
|
|
if(*len < sizeof(cyg_serial_info_t)) {
|
517 |
|
|
return -EINVAL;
|
518 |
|
|
}
|
519 |
|
|
*len = sizeof(cyg_serial_info_t);
|
520 |
|
|
if(true != mpc555_serial_config_port(chan, config, false))
|
521 |
|
|
return -EINVAL;
|
522 |
|
|
}
|
523 |
|
|
break;
|
524 |
|
|
default:
|
525 |
|
|
return -EINVAL;
|
526 |
|
|
}
|
527 |
|
|
return ENOERR;
|
528 |
|
|
}
|
529 |
|
|
|
530 |
|
|
//-------------------------------------
|
531 |
|
|
// Enable the transmitter on the device
|
532 |
|
|
//-------------------------------------
|
533 |
|
|
static void mpc555_serial_start_xmit(serial_channel * chan)
|
534 |
|
|
{
|
535 |
|
|
mpc555_serial_info * mpc555_chan = (mpc555_serial_info *)chan->dev_priv;
|
536 |
|
|
|
537 |
|
|
mpc555_chan->tx_interrupt_enable = true;
|
538 |
|
|
cyg_drv_interrupt_unmask(mpc555_chan->tx_interrupt_num);
|
539 |
|
|
|
540 |
|
|
// No need to call xmt_char, this will generate an interrupt immediately.
|
541 |
|
|
}
|
542 |
|
|
|
543 |
|
|
//--------------------------------------
|
544 |
|
|
// Disable the transmitter on the device
|
545 |
|
|
//--------------------------------------
|
546 |
|
|
static void mpc555_serial_stop_xmit(serial_channel * chan)
|
547 |
|
|
{
|
548 |
|
|
mpc555_serial_info * mpc555_chan = (mpc555_serial_info *)chan->dev_priv;
|
549 |
|
|
|
550 |
|
|
cyg_drv_dsr_lock();
|
551 |
|
|
mpc555_chan->tx_interrupt_enable = false;
|
552 |
|
|
cyg_drv_interrupt_mask(mpc555_chan->tx_interrupt_num);
|
553 |
|
|
cyg_drv_dsr_unlock();
|
554 |
|
|
}
|
555 |
|
|
|
556 |
|
|
//-----------------------------------------
|
557 |
|
|
// The low level transmit interrupt handler
|
558 |
|
|
//-----------------------------------------
|
559 |
|
|
static cyg_uint32 mpc555_serial_tx_ISR(cyg_vector_t vector, cyg_addrword_t data)
|
560 |
|
|
{
|
561 |
|
|
serial_channel * chan = (serial_channel *)data;
|
562 |
|
|
mpc555_serial_info * mpc555_chan = (mpc555_serial_info *)chan->dev_priv;
|
563 |
|
|
|
564 |
|
|
cyg_drv_interrupt_mask(mpc555_chan->tx_interrupt_num);
|
565 |
|
|
cyg_drv_interrupt_acknowledge(mpc555_chan->tx_interrupt_num);
|
566 |
|
|
|
567 |
|
|
return CYG_ISR_CALL_DSR; // cause the DSR to run
|
568 |
|
|
}
|
569 |
|
|
|
570 |
|
|
//----------------------------------------
|
571 |
|
|
// The low level receive interrupt handler
|
572 |
|
|
//----------------------------------------
|
573 |
|
|
static cyg_uint32 mpc555_serial_rx_ISR(cyg_vector_t vector, cyg_addrword_t data)
|
574 |
|
|
{
|
575 |
|
|
serial_channel * chan = (serial_channel *)data;
|
576 |
|
|
mpc555_serial_info * mpc555_chan = (mpc555_serial_info *)chan->dev_priv;
|
577 |
|
|
|
578 |
|
|
cyg_drv_interrupt_mask(mpc555_chan->rx_interrupt_num);
|
579 |
|
|
cyg_drv_interrupt_acknowledge(mpc555_chan->rx_interrupt_num);
|
580 |
|
|
|
581 |
|
|
return CYG_ISR_CALL_DSR; // cause the DSR to run
|
582 |
|
|
}
|
583 |
|
|
|
584 |
|
|
//------------------------------------------
|
585 |
|
|
// The high level transmit interrupt handler
|
586 |
|
|
//------------------------------------------
|
587 |
|
|
static void mpc555_serial_tx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
|
588 |
|
|
{
|
589 |
|
|
serial_channel * chan = (serial_channel *)data;
|
590 |
|
|
mpc555_serial_info * mpc555_chan = (mpc555_serial_info *)chan->dev_priv;
|
591 |
|
|
|
592 |
|
|
(chan->callbacks->xmt_char)(chan);
|
593 |
|
|
if(mpc555_chan->tx_interrupt_enable)
|
594 |
|
|
cyg_drv_interrupt_unmask(mpc555_chan->tx_interrupt_num);
|
595 |
|
|
}
|
596 |
|
|
|
597 |
|
|
//-----------------------------------------
|
598 |
|
|
// The high level receive interrupt handler
|
599 |
|
|
//-----------------------------------------
|
600 |
|
|
#define MPC555_SERIAL_SCxSR_ERRORS (MPC555_SERIAL_SCxSR_OR | \
|
601 |
|
|
MPC555_SERIAL_SCxSR_NF | \
|
602 |
|
|
MPC555_SERIAL_SCxSR_FE | \
|
603 |
|
|
MPC555_SERIAL_SCxSR_PF)
|
604 |
|
|
|
605 |
|
|
static void mpc555_serial_rx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
|
606 |
|
|
{
|
607 |
|
|
serial_channel * chan = (serial_channel *)data;
|
608 |
|
|
mpc555_serial_info * mpc555_chan = (mpc555_serial_info *)chan->dev_priv;
|
609 |
|
|
cyg_addrword_t port = mpc555_chan->base;
|
610 |
|
|
cyg_uint16 scdr;
|
611 |
|
|
cyg_uint16 scsr;
|
612 |
|
|
|
613 |
|
|
// Allways read out the received character, in order to clear receiver flags
|
614 |
|
|
HAL_READ_UINT16(port + MPC555_SERIAL_SCxDR, scdr);
|
615 |
|
|
|
616 |
|
|
HAL_READ_UINT16(port + MPC555_SERIAL_SCxSR, scsr);
|
617 |
|
|
if(scsr & (cyg_uint16)MPC555_SERIAL_SCxSR_ERRORS)
|
618 |
|
|
{
|
619 |
|
|
scsr &= ~((cyg_uint16)MPC555_SERIAL_SCxSR_ERRORS);
|
620 |
|
|
HAL_WRITE_UINT16(port + MPC555_SERIAL_SCxSR, scsr);
|
621 |
|
|
}
|
622 |
|
|
else
|
623 |
|
|
{
|
624 |
|
|
(chan->callbacks->rcv_char)(chan, (cyg_uint8)scdr);
|
625 |
|
|
}
|
626 |
|
|
|
627 |
|
|
cyg_drv_interrupt_unmask(mpc555_chan->rx_interrupt_num);
|
628 |
|
|
}
|
629 |
|
|
|
630 |
|
|
#endif // CYGPKG_IO_SERIAL_POWERPC_EC555
|
631 |
|
|
|
632 |
|
|
// EOF ec555_serial_with_ints.c
|