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#ifndef CYGONCE_POWERPC_QUICC_SMC_SERIAL_H
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#define CYGONCE_POWERPC_QUICC_SMC_SERIAL_H
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// ====================================================================
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//
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// quicc_smc_serial.h
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//
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// Device I/O - Description of PowerPC QUICC/SMC serial hardware
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//
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// ====================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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// ====================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): gthomas
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// Contributors: gthomas
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// Date: 1999-06-21
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// Purpose: Internal interfaces for serial I/O drivers
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// Description:
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//
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//####DESCRIPTIONEND####
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//
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// ====================================================================
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// Description of serial ports using QUICC/SMC
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#include <cyg/hal/quicc/ppc8xx.h> // QUICC structure definitions
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static unsigned int select_word_length[] = {
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QUICC_SMCMR_CLEN(5), // 5 bits / word (char)
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QUICC_SMCMR_CLEN(6),
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QUICC_SMCMR_CLEN(7),
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QUICC_SMCMR_CLEN(8)
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};
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static unsigned int select_stop_bits[] = {
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0,
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QUICC_SMCMR_SB(1), // 1 stop bit
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QUICC_SMCMR_SB(1), // 1.5 stop bit
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QUICC_SMCMR_SB(2) // 2 stop bits
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};
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static unsigned int select_parity[] = {
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QUICC_SMCMR_PE(0), // No parity
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QUICC_SMCMR_PE(1)|QUICC_SMCMR_PM(1), // Even parity
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QUICC_SMCMR_PE(1)|QUICC_SMCMR_PM(0), // Odd parity
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0, // Mark parity
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0, // Space parity
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};
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// Baud rate values, based on board clock
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static cyg_int32 select_baud[] = {
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0, // Unused
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50, // 50
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75, // 75
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110, // 110
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0, // 134.5
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150, // 150
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200, // 200
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300, // 300
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600, // 600
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1200, // 1200
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1800, // 1800
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2400, // 2400
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3600, // 3600
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4800, // 4800
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7200, // 7200
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9600, // 9600
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14400, // 14400
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19200, // 19200
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38400, // 38400
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57600, // 57600
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115200, // 115200
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0, // 230400
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};
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#define UART_BITRATE(n) (((CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000)/16)/n)
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#define UART_SLOW_BITRATE(n) ((CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000)/n))
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#endif // CYGONCE_POWERPC_QUICC_SMC_SERIAL_H
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