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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [devs/] [serial/] [sparclite/] [sleb/] [v2_0/] [src/] [sleb_sdtr.h] - Blame information for rev 27

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#ifndef CYGONCE_SLEB_SDTR_H
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#define CYGONCE_SLEB_SDTR_H
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//==========================================================================
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//
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//      io/serial/sparclite/sleb_sdtr.c
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//
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//      Serial I/O interface module for SPARClite Eval Board (SLEB)
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):   gthomas
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// Contributors:  gthomas
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// Date:        1999-02-04
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// Purpose:     SLEB serial I/O module
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// Description: 
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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#include <cyg/hal/hal_io.h>             // For I/O macros
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#define reg(n)                   ((n)*4)
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// SDTR Registers
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#define SDTR_TXDATA(base)        base+reg(0)
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#define SDTR_RXDATA(base)        base+reg(0)
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#define SDTR_STATUS(base)        base+reg(1)
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#define SDTR_CONTROL(base)       base+reg(1)
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// Mode register
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#define SDTR_MODE_MODE_MASK      0x03       // Mode selection bits (mask)
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#define SDTR_MODE_MODE_SYNC      0x00       // Synchronous mode
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#define SDTR_MODE_MODE_ASYNC1    0x01       // Async - clock/1
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#define SDTR_MODE_MODE_ASYNC16   0x02       // Async - clock/16
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#define SDTR_MODE_MODE_ASYNC64   0x03       // Async - clock/64
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#define SDTR_MODE_DTB_MASK       0x0C       // Number of data bits (mask)
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#define SDTR_MODE_DTB_5          0x00       //   5 bits / char
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#define SDTR_MODE_DTB_6          0x04       //   6 bits / char
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#define SDTR_MODE_DTB_7          0x08       //   7 bits / char
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#define SDTR_MODE_DTB_8          0x0C       //   8 bits / char
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#define SDTR_MODE_PARITY_MASK    0x30       // Parity modes (mask)
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#define SDTR_MODE_PARITY_ENABLE  0x10       // Enable parity
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#define SDTR_MODE_PARITY_NONE    0x00       // No parity (parity disabled)
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#define SDTR_MODE_PARITY_ODD     0x00       // Odd parity
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#define SDTR_MODE_PARITY_EVEN    0x20       // Even parity
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#define SDTR_MODE_STOP_BITS_MASK 0xC0       // Number of stop bits (mask)
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#define SDTR_MODE_STOP_BITS_1    0x40       //   1 stop bit
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#define SDTR_MODE_STOP_BITS_1_5  0x80       //   1.5 stop bits
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#define SDTR_MODE_STOP_BITS_2    0xC0       //   2 stop bits
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// Command register
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#define SDTR_CMD_TxEN            0x01       // Enable transmitter
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#define SDTR_CMD_DTR             0x02       // Assert DTR
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#define SDTR_CMD_RxEN            0x04       // Enable receiver
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#define SDTR_CMD_BREAK           0x08       // Send break
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#define SDTR_CMD_EFR             0x10       // Error flag reset
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#define SDTR_CMD_RTS             0x20       // Assert RTS
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#define SDTR_CMD_RST             0x40       // Internal RESET
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#define SDTR_CMD_EHM             0x80       // Enable Hunt mode
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// Status register
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#define SDTR_STAT_TxRDY          0x01       // Transmitter ready
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#define SDTR_STAT_RxRDY          0x02       // Receiver ready
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#define SDTR_STAT_TxEMP          0x04       // Transmitter empty
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#define SDTR_STAT_PERR           0x08       // Parity error
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#define SDTR_STAT_OERR           0x10       // Overrun error
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#define SDTR_STAT_FERR           0x20       // Framing error
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#define SDTR_STAT_SYBRK          0x40       // Break
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#define SDTR_STAT_DSR            0x80       // State of DSR signal
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// Offsets to standard SDTR elements
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#define SLEB_SDTR0_BASE    (8*4)
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#define SLEB_SDTR0_TX_INT  9
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#define SLEB_SDTR0_RX_INT  10
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#define SLEB_SDTR1_BASE    (12*4)
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#define SLEB_SDTR1_TX_INT  6
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#define SLEB_SDTR1_RX_INT  7
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#define SLEB_TIMER3_CONTROL reg(29)
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#define SLEB_TIMER3_RELOAD  reg(30)
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// On-board switch, used to determine baud rate
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#define SLEB_CLOCK_SWITCH   (volatile unsigned char *)0x01000003
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static unsigned char select_word_length[] = {
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    SDTR_MODE_DTB_5,    // 5 bits / word (char)
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    SDTR_MODE_DTB_6,
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    SDTR_MODE_DTB_7,
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    SDTR_MODE_DTB_8
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};
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static unsigned char select_stop_bits[] = {
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    0,
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    SDTR_MODE_STOP_BITS_1,    // 1 stop bit
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    SDTR_MODE_STOP_BITS_1_5,  // 1.5 stop bit
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    SDTR_MODE_STOP_BITS_2     // 2 stop bits
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};
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static unsigned char select_parity[] = {
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    SDTR_MODE_PARITY_NONE,                             // No parity
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    SDTR_MODE_PARITY_ENABLE|SDTR_MODE_PARITY_EVEN,     // Even parity
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    SDTR_MODE_PARITY_ENABLE|SDTR_MODE_PARITY_ODD,      // ODD parity
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    0xFF,                                              // Mark parity
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    0xFF,                                              // Space parity
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};
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static cyg_int32 select_baud[] = {
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    0,      // Unused
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    50,     // 50
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    75,     // 75
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    110,    // 110
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    0,      // 134.5
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    150,    // 150
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    200,    // 200
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    300,    // 300
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    600,    // 600
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    1200,   // 1200
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    1800,   // 1800
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    2400,   // 2400
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    3600,   // 3600
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    4800,   // 4800
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    7200,   // 7200
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    9600,   // 9600
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    14400,  // 14400
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    19200,  // 19200
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    38400,  // 38400
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    57600,  // 57600
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    115200, // 115200
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    230400, // 230400
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};
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#endif // CYGONCE_SLEB_SDTR_H
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