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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [devs/] [wallclock/] [sh/] [sh3/] [v2_0/] [src/] [wallclock_sh3.cxx] - Blame information for rev 174

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//==========================================================================
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//
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//      devs/wallclock/sh3.cxx
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//
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//      SH3 RTC module driver.
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):     jskov
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// Contributors:  jskov
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// Date:          2000-03-17
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// Purpose:       Wallclock driver for SH3 CPU RTC module
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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#include <pkgconf/wallclock.h>          // Wallclock device config
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#include <cyg/hal/hal_io.h>             // IO macros
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#include <cyg/infra/cyg_type.h>         // Common type definitions and support
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#include <cyg/io/wallclock.hxx>         // The WallClock API
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#include <cyg/io/wallclock/wallclock.inl> // Helpers
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#include <cyg/hal/sh_regs.h>            // RTC register definitions
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#include <cyg/infra/diag.h>             // For debugging
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//-----------------------------------------------------------------------------
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// Functions for setting and getting the hardware clock counters
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// Year must be last two digits of "western calendar year". Leap year when
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// divisible by four.
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static void
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set_sh3_hwclock(cyg_uint32 year, cyg_uint32 month, cyg_uint32 mday,
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                cyg_uint32 hour, cyg_uint32 minute, cyg_uint32 second)
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{
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    // Stop RTC
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    HAL_WRITE_UINT8(CYGARC_REG_RCR2, CYGARC_REG_RCR2_RESET);
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    // Program it
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    HAL_WRITE_UINT8(CYGARC_REG_RYRCNT,  TO_BCD(year));
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    HAL_WRITE_UINT8(CYGARC_REG_RMONCNT, TO_BCD(month));
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    HAL_WRITE_UINT8(CYGARC_REG_RDAYCNT, TO_BCD(mday));
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    HAL_WRITE_UINT8(CYGARC_REG_RHRCNT,  TO_BCD(hour));
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    HAL_WRITE_UINT8(CYGARC_REG_RMINCNT, TO_BCD(minute));
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    HAL_WRITE_UINT8(CYGARC_REG_RSECCNT, TO_BCD(second));
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    // Start RTC
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    HAL_WRITE_UINT8(CYGARC_REG_RCR1, CYGARC_REG_RCR1_CIE);
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    HAL_WRITE_UINT8(CYGARC_REG_RCR2,
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                    CYGARC_REG_RCR2_RTCEN | CYGARC_REG_RCR2_START);
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}
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static void
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get_sh3_hwclock(cyg_uint32* year, cyg_uint32* month, cyg_uint32* mday,
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                cyg_uint32* hour, cyg_uint32* minute, cyg_uint32* second)
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{
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    cyg_uint8 tmp;
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    do {
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        // Clear carry flag
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        HAL_WRITE_UINT8(CYGARC_REG_RCR1, 0);
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        // Read time
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        HAL_READ_UINT8(CYGARC_REG_RYRCNT, tmp);
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        *year = TO_DEC(tmp);
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        HAL_READ_UINT8(CYGARC_REG_RMONCNT, tmp);
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        *month = TO_DEC(tmp);
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        HAL_READ_UINT8(CYGARC_REG_RDAYCNT, tmp);
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        *mday = TO_DEC(tmp);
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        HAL_READ_UINT8(CYGARC_REG_RHRCNT, tmp);
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        *hour = TO_DEC(tmp);
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        HAL_READ_UINT8(CYGARC_REG_RMINCNT, tmp);
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        *minute = TO_DEC(tmp);
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        HAL_READ_UINT8(CYGARC_REG_RSECCNT, tmp);
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        *second = TO_DEC(tmp);
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        // Read carry flag
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        HAL_READ_UINT8(CYGARC_REG_RCR1, tmp);
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    } while (CYGARC_REG_RCR1_CF & tmp); // loop if carry set
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}
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//-----------------------------------------------------------------------------
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// Functions required for the hardware-driver API.
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// Returns the number of seconds elapsed since 1970-01-01 00:00:00.
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cyg_uint32
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Cyg_WallClock::get_hw_seconds(void)
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{
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    cyg_uint32 year, month, mday, hour, minute, second;
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    get_sh3_hwclock(&year, &month, &mday, &hour, &minute, &second);
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#if 0
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    // This will cause the test to eventually fail due to these printouts
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    // causing timer interrupts to be lost...
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    diag_printf("year %02d\n", year);
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    diag_printf("month %02d\n", month);
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    diag_printf("mday %02d\n", mday);
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    diag_printf("hour %02d\n", hour);
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    diag_printf("minute %02d\n", minute);
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    diag_printf("second %02d\n", second);
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#endif
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#ifndef CYGSEM_WALLCLOCK_SET_GET_MODE
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    // We know what we initialized the hardware for : 1970, so by doing this
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    // the returned time should be OK for 30 years uptime.
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    year += 1900;
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#else
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    // Need to use sliding window or similar to figure out what the
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    // century should be... Patent issue is unclear, and since there's
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    // no battery backup of the clock, there's little point in
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    // investigating.
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# error "Need some magic here to figure out century counter"
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#endif
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    cyg_uint32 now = _simple_mktime(year, month, mday, hour, minute, second);
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    return now;
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}
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#ifndef CYGSEM_WALLCLOCK_SET_GET_MODE
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void
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Cyg_WallClock::init_hw_seconds(void)
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{
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    // This is our base: 1970-01-01 00:00:00
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    // Set the HW clock - if for nothing else, just to be sure it's in a
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    // legal range. Any arbitrary base could be used.
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    // After this the hardware clock is only read.
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    set_sh3_hwclock(70,1,1,0,0,0);
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}
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#endif // CYGSEM_WALLCLOCK_SET_GET_MODE
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//-----------------------------------------------------------------------------
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// End of devs/wallclock/sh3.cxx

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