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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [devs/] [watchdog/] [synth/] [v2_0/] [src/] [synth_watchdog.cxx] - Blame information for rev 174

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//==========================================================================
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//
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//      synth_watchdog.cxx
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//
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//      Watchdog driver for the synthetic target
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 2002 Bart Veer
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting the
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// copyright holder(s).
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    bartv
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// Contributors: bartv
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// Date:         2002-09-04
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//
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//####DESCRIPTIONEND####
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//==========================================================================
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#include <pkgconf/system.h>
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#include <pkgconf/devs_watchdog_synth.h>
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#ifdef CYGIMP_WATCHDOG_HARDWARE
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#include <cyg/hal/hal_arch.h>
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#include <cyg/infra/cyg_type.h>
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#include <cyg/infra/cyg_ass.h>
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#include <cyg/infra/diag.h>
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#include <cyg/hal/hal_io.h>
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// FIXME: right now the generic watchdog header depends on the
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// kernel. That should be fixed in the watchdog code, but will
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// affect some device drivers as well
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#include <pkgconf/kernel.h>
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#include <cyg/io/watchdog.hxx>
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// Protocol between host and target
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#define SYNTH_WATCHDOG_START    0x01
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#define SYNTH_WATCHDOG_RESET    0x02
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// The synthetic target's watchdog implementation involves interaction
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// with a watchdog.tcl script running in the I/O auxiliary. The device
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// must be instantiated during system initialization, preferably via
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// a prioritized C++ static constructor. The generic watchdog package
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// does have a static object, but it is not prioritized. If
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// CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG is enabled then that object's
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// constructor would get called too late.
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//
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// Instead a private class is defined here, and once instance is created.
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// That instance gets referenced by the Cyg_Watchdog members, so
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// selective linking does not get in the way. Instantiation happens inside
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// the constructor, and the main Cyg_Watchdog::start() and reset() functions
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// involve passing a message to the host-side.
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//
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// There is an open issue re. resolution. Usually the hardware imposes
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// limits on what resolutions are valid, in fact there may be only one.
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// With the synthetic target it would be possible to configure the
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// desired resolution either on the target-side using a CDL option, or
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// on the host-side using the target definition file. The resolution
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// would have to be fairly coarse, probably at least 0.1 seconds,
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// to allow for communication overheads. It is not clear whether
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// target-side or host-side configuration is more appropriate, so for
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// now a fixed resolution of one second is used.
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class _Synth_Watchdog {
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  public:
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    _Synth_Watchdog();
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    ~_Synth_Watchdog() { }
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    cyg_uint64  resolution;
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};
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// A static instance of the _Synth_Watchdog class, whose constructor will
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// be called at the right time to instantiate host-side support.
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static _Synth_Watchdog _synth_watchdog_object CYGBLD_ATTRIB_INIT_PRI(CYG_INIT_DRIVERS);
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// Id for communicating with the watchdog instance in the auxiliary
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static int aux_id   = -1;
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_Synth_Watchdog::_Synth_Watchdog()
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{
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    // SIGPWR is disabled by default. It has to be reenabled.
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    struct cyg_hal_sys_sigset_t blocked;
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    CYG_HAL_SYS_SIGEMPTYSET(&blocked);
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    CYG_HAL_SYS_SIGADDSET(&blocked, CYG_HAL_SYS_SIGPWR);
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    cyg_hal_sys_sigprocmask(CYG_HAL_SYS_SIG_UNBLOCK, &blocked, (cyg_hal_sys_sigset_t*) 0);
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    resolution = 1000000000LL;
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    if (synth_auxiliary_running) {
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        aux_id  = synth_auxiliary_instantiate("devs/watchdog/synth",
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                                              SYNTH_MAKESTRING(CYGPKG_DEVS_WATCHDOG_SYNTH),
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                                              "watchdog",
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                                              (const char*) 0,
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                                              (const char*) 0);
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    }
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}
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// Hardware initialization. This has already happened in the
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// _Synth_Watchdog constructor, all that is needed here is to
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// propagate the resolution.
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void
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Cyg_Watchdog::init_hw(void)
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{
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    resolution  = _synth_watchdog_object.resolution;
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}
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void
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Cyg_Watchdog::start(void)
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{
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    if (synth_auxiliary_running && (-1 != aux_id)) {
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        synth_auxiliary_xchgmsg(aux_id, SYNTH_WATCHDOG_START, 0, 0,
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                               (const unsigned char*)0, 0,
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                               (int *) 0,
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                               (unsigned char*) 0, (int*) 0, 0);
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    }
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}
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void
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Cyg_Watchdog::reset()
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{
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    if (synth_auxiliary_running && (-1 != aux_id)) {
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        synth_auxiliary_xchgmsg(aux_id, SYNTH_WATCHDOG_RESET, 0, 0,
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                               (const unsigned char*)0, 0,
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                               (int *) 0,
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                               (unsigned char*) 0, (int*) 0, 0);
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    }
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}
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#endif // CYGIMP_WATCHDOG_HARDWARE

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