OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [arm/] [arch/] [v2_0/] [include/] [arm_stub.h] - Blame information for rev 27

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 27 unneback
#ifndef CYGONCE_HAL_ARM_STUB_H
2
#define CYGONCE_HAL_ARM_STUB_H
3
//========================================================================
4
//
5
//      arm_stub.h
6
//
7
//      ARM-specific definitions for generic stub
8
//
9
//========================================================================
10
//####ECOSGPLCOPYRIGHTBEGIN####
11
// -------------------------------------------
12
// This file is part of eCos, the Embedded Configurable Operating System.
13
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
14
//
15
// eCos is free software; you can redistribute it and/or modify it under
16
// the terms of the GNU General Public License as published by the Free
17
// Software Foundation; either version 2 or (at your option) any later version.
18
//
19
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
20
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
21
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
22
// for more details.
23
//
24
// You should have received a copy of the GNU General Public License along
25
// with eCos; if not, write to the Free Software Foundation, Inc.,
26
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27
//
28
// As a special exception, if other files instantiate templates or use macros
29
// or inline functions from this file, or you compile this file and link it
30
// with other works to produce a work based on this file, this file does not
31
// by itself cause the resulting work to be covered by the GNU General Public
32
// License. However the source code for this file must still be made available
33
// in accordance with section (3) of the GNU General Public License.
34
//
35
// This exception does not invalidate any other reasons why a work based on
36
// this file might be covered by the GNU General Public License.
37
//
38
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
39
// at http://sources.redhat.com/ecos/ecos-license/
40
// -------------------------------------------
41
//####ECOSGPLCOPYRIGHTEND####
42
//========================================================================
43
//#####DESCRIPTIONBEGIN####
44
//
45
// Author(s):     Red Hat, gthomas
46
// Contributors:  Red Hat, gthomas
47
// Date:          1998-11-26
48
// Purpose:       
49
// Description:   ARM-specific definitions for generic stub
50
// Usage:         
51
//
52
//####DESCRIPTIONEND####
53
//
54
//========================================================================
55
 
56
#ifdef __cplusplus
57
extern "C" {
58
#endif
59
 
60
// The ARM has float (and possibly other coprocessor) registers that are
61
// larger than it can hold in a target_register_t.
62
#define TARGET_HAS_LARGE_REGISTERS
63
 
64
// ARM stub has special needs for register handling (not all regs are the
65
// the same size), so special put_register and get_register are provided.
66
#define CYGARC_STUB_REGISTER_ACCESS_DEFINED 1
67
 
68
#define NUMREGS    (16+8+2)  // 16 GPR, 8 FPR (unused), 2 PS
69
 
70
#define REGSIZE( _x_ ) (((_x_) < F0 || (_x_) >= FPS) ? 4 : 12)
71
 
72
// Comment out to allow for default gdb stub packet buffer which is larger.
73
// #define NUMREGBYTES ((16*4)+(8*12)+(2*4))
74
 
75
#ifndef TARGET_REGISTER_T_DEFINED
76
#define TARGET_REGISTER_T_DEFINED
77
typedef unsigned long target_register_t;
78
#endif
79
 
80
enum regnames {
81
    R0, R1, R2, R3, R4, R5, R6, R7,
82
    R8, R9, R10, FP, IP, SP, LR, PC,
83
    F0, F1, F2, F3, F4, F5, F6, F7,
84
    FPS, PS
85
};
86
 
87
#define HAL_STUB_REGISTERS_SIZE \
88
 ((sizeof(GDB_Registers) + sizeof(target_register_t) - 1) / sizeof(target_register_t))
89
 
90
#define PS_N 0x80000000
91
#define PS_Z 0x40000000
92
#define PS_C 0x20000000
93
#define PS_V 0x10000000
94
 
95
#define PS_I CPSR_IRQ_DISABLE
96
#define PS_F CPSR_FIQ_DISABLE
97
 
98
typedef enum regnames regnames_t;
99
 
100
/* Given a trap value TRAP, return the corresponding signal. */
101
extern int __computeSignal (unsigned int trap_number);
102
 
103
/* Return the SPARC trap number corresponding to the last-taken trap. */
104
extern int __get_trap_number (void);
105
 
106
/* Return the currently-saved value corresponding to register REG. */
107
extern target_register_t get_register (regnames_t reg);
108
 
109
/* Store VALUE in the register corresponding to WHICH. */
110
extern void put_register (regnames_t which, target_register_t value);
111
 
112
/* Set the currently-saved pc register value to PC. This also updates NPC
113
   as needed. */
114
extern void set_pc (target_register_t pc);
115
 
116
/* Set things up so that the next user resume will execute one instruction.
117
   This may be done by setting breakpoints or setting a single step flag
118
   in the saved user registers, for example. */
119
void __single_step (void);
120
 
121
/* Clear the single-step state. */
122
void __clear_single_step (void);
123
 
124
/* If the breakpoint we hit is in the breakpoint() instruction, return a
125
   non-zero value. */
126
extern int __is_breakpoint_function (void);
127
 
128
/* Skip the current instruction. */
129
extern void __skipinst (void);
130
 
131
extern void __install_breakpoints (void);
132
 
133
extern void __clear_breakpoints (void);
134
 
135
extern int __is_bsp_syscall(void);
136
 
137
//------------------------------------------------------------------------
138
// Special definition of CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION
139
 
140
#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
141
// we can only do this at all if break support is enabled:
142
 
143
#ifdef __thumb__
144
// If this macro is used from Thumb code, we need to pass this information
145
// along to the place_break function so it can do the right thing.
146
#define CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION( _old_ )                         \
147
do {                                                                          \
148
    HAL_DISABLE_INTERRUPTS(_old_);                                            \
149
    cyg_hal_gdb_place_break((target_register_t)((unsigned long)&&cyg_hal_gdb_break_place + 1));\
150
} while ( 0 )
151
 
152
#else
153
 
154
#define CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION( _old_ )                       \
155
do {                                                                        \
156
    HAL_DISABLE_INTERRUPTS(_old_);                                          \
157
    cyg_hal_gdb_place_break((target_register_t)&&cyg_hal_gdb_break_place ); \
158
} while ( 0 )
159
 
160
#endif // __thumb_
161
 
162
// Also define ..LEAVE.. with a trick to *use* the label - sometimes the
163
// tools want to move the label, which is bad.
164
#define CYG_HAL_GDB_LEAVE_CRITICAL_IO_REGION( _old_ )                         \
165
do {                                                                          \
166
    cyg_hal_gdb_remove_break( (target_register_t)&&cyg_hal_gdb_break_place ); \
167
    HAL_RESTORE_INTERRUPTS(_old_);                                            \
168
    _old_ = 1; /* actually use the label as a label... */                     \
169
cyg_hal_gdb_break_place:                                                      \
170
    if ( (_old_)-- > 0 ) /* ...or the compiler might move it! */              \
171
        goto cyg_hal_gdb_break_place;                                         \
172
} while ( 0 )
173
 
174
#endif // CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
175
 
176
 
177
#ifdef __cplusplus
178
} /* extern "C" */
179
#endif
180
 
181
#endif // ifndef CYGONCE_HAL_ARM_STUB_H

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.