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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [arm/] [arm9/] [innovator/] [v2_0/] [src/] [redboot_cmds.c] - Blame information for rev 307

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#if 0
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//==========================================================================
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//
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//      redboot_cmds.c
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//
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//      OMAP1510DC EVM [platform] specific RedBoot commands
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    Patrick Doyle <wpd@delcomsys.com>
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// Contributors: Patrick Doyle <wpd@delcomsys.com>
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// Date:         2002-11-27
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// Purpose:      
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// Description:  
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//              
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// This code is part of RedBoot (tm).  It was modified from "redboot_cmds"
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// for the iPaq by wpd in order to add some platform specific commands to
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// the OMAP1510DC EVM platform.
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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#include <redboot.h>
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#include <cyg/hal/hal_intr.h>
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#include <cyg/hal/hal_cache.h>
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#include <cyg/hal/hal_io.h>
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#include <cyg/hal/hal_diag.h>
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#include <cyg/hal/innovator.h>
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static void do_mem(int argc, char *argv[]);
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static void do_try_reset(int argc, char *argv[]);
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static void do_testsdram(int argc, char *argv[]);
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static void do_delay(int argc, char *argv[]);
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RedBoot_cmd("mem",
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            "Set a memory location",
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            "[-h|-b] [-n] [-a <address>] <data>",
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            do_mem
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    );
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RedBoot_cmd("try_reset",
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            "try to reset the platform",
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            "[-1|-2|-3|-4]",
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            do_try_reset
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    );
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RedBoot_cmd("testsdram",
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            "test SDRAM (very simply)",
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            "[-l length]",
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            do_testsdram
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    );
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RedBoot_cmd("delay",
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            "delay specified number of usecs",
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            "[-c count] amount",
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            do_delay
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    );
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static void
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do_mem(int argc,
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       char *argv[])
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{
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  struct option_info opts[4];
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  bool mem_half_word, mem_byte;
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  bool no_verify = false;
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  static int address = 0x00000000;
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  int value;
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  init_opts(&opts[0], 'b', false, OPTION_ARG_TYPE_FLG,
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            (void**)&mem_byte, 0, "write a byte");
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  init_opts(&opts[1], 'h', false, OPTION_ARG_TYPE_FLG,
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            (void**)&mem_half_word, 0, "write a half-word");
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  init_opts(&opts[2], 'a', true, OPTION_ARG_TYPE_NUM,
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            (void**)&address, NULL, "address to write at");
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  init_opts(&opts[3], 'n', false, OPTION_ARG_TYPE_FLG,
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            (void**)&no_verify, 0, "noverify");
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  if (!scan_opts(argc, argv,
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                 1,
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                 opts, sizeof(opts) / sizeof(opts[0]),
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                 (void*)&value, OPTION_ARG_TYPE_NUM, "address to set")) {
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    return;
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  }
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  if ( mem_byte && mem_half_word ) {
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    diag_printf("*ERR: Should not specify both byte and half-word access\n");
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  } else if ( mem_byte ) {
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    *(cyg_uint8*)address = (cyg_uint8)(value & 255);
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    if (no_verify) {
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      diag_printf("  Set 0x%08X to 0x%02X\n",
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                  address, value & 255);
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    } else {
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            diag_printf("  Set 0x%08X to 0x%02X (result 0x%02X)\n",
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                  address, value & 255, (int)*(cyg_uint8*)address );
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    }
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  } else if ( mem_half_word ) {
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    if ( address & 1 ) {
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      diag_printf( "*ERR: Badly aligned address 0x%08X for half-word store\n",
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                   address );
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    } else {
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      *(cyg_uint16*)address = (cyg_uint16)(value & 0xffff);
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      if (no_verify) {
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        diag_printf("  Set 0x%08X to 0x%04X\n",
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                    address, value & 0xffff);
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      } else {
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        diag_printf("  Set 0x%08X to 0x%04X (result 0x%04X)\n",
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                    address, value & 0xffff, (int)*(cyg_uint16*)address );
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      }
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    }
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  } else {
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    if ( address & 3 ) {
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      diag_printf( "*ERR: Badly aligned address 0x%08X for word store\n",
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                   address );
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    } else {
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      *(cyg_uint32*)address = (cyg_uint32)value;
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      if (no_verify) {
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        diag_printf("  Set 0x%08X to 0x%08X\n",
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                    address, value);
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      } else {
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        diag_printf("  Set 0x%08X to 0x%08X (result 0x%08X)\n",
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                    address, value, (int)*(cyg_uint32*)address );
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      }
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    }
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  }
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}
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static void
165
do_try_reset(int argc,
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             char *argv[])
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{
168
  struct option_info opts[4];
169
  bool flag_1 = false;
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  bool flag_2 = false;
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  bool flag_3 = false;
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  bool flag_4 = false;
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  cyg_uint16 tmp = 0;
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  init_opts(&opts[0], '1', false, OPTION_ARG_TYPE_FLG,
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            (void**)&flag_1, 0, "only try phase 1");
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  init_opts(&opts[1], '2', false, OPTION_ARG_TYPE_FLG,
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            (void**)&flag_2, 0, "try phase 1 & phase 2");
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  init_opts(&opts[2], '3', false, OPTION_ARG_TYPE_FLG,
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            (void**)&flag_3, 0, "try phase 1 through phase 3");
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  init_opts(&opts[3], '4', false, OPTION_ARG_TYPE_FLG,
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            (void**)&flag_4, 0, "try phase 1 through phase 4");
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  if (!scan_opts(argc, argv,
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                 1,
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                 opts, sizeof(opts) / sizeof(opts[0]),
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                 0, 0, 0)) {
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    return;
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  }
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  diag_printf("flag_4 = %d, flag_3 = %d, flag_2 = %d, flag_1 = %d\n",
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              flag_4, flag_3, flag_2, flag_1);
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  if (flag_4) {
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    flag_3 = flag_2 = flag_1 = true;
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  } else if (flag_3) {
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    flag_2 = flag_1 = true;
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  } else if (flag_2) {
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    flag_1 = true;
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  }
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  diag_printf("flag_4 = %d, flag_3 = %d, flag_2 = %d, flag_1 = %d\n",
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              flag_4, flag_3, flag_2, flag_1);
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  if (flag_1) {
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    HAL_READ_UINT16(CLKM_ARM_IDLECT2, tmp);
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    diag_printf("tmp = %04X\n", tmp);
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  }
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  if (flag_2) {
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    tmp |= 1;
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    diag_printf("Writing %04X to %08X\n", tmp, CLKM_ARM_IDLECT2);
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    HAL_WRITE_UINT16(CLKM_ARM_IDLECT2, tmp | 1);
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  }
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  if (flag_3) {
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    diag_printf("Writing %04X to %08X\n", 0x80F5, WATCHDOG_TIMER_MODE);
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    HAL_WRITE_UINT16(WATCHDOG_TIMER_MODE, 0x80F5); \
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  }
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  if (flag_4) {
220
    diag_printf("Writing %04X to %08X\n", 0x80F5, WATCHDOG_TIMER_MODE);
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    HAL_WRITE_UINT16(WATCHDOG_TIMER_MODE, 0x80F5); \
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  }
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224
  diag_printf("try_reset: done\n");
225
}
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#define SDRAM_BASE 0x10000000
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#define SDRAM_LEN  (32*1024*1024)       /* 32 Mbytes */
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static void
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do_testsdram(int argc,
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             char *argv[])
232
{
233
  cyg_uint32 *mem_addr = (cyg_uint32 *)SDRAM_BASE;
234
  unsigned    len;
235
  bool        len_set;
236
 
237
  register int i;
238
  struct option_info opts[1];
239
 
240
  init_opts(&opts[0], 'l', true, OPTION_ARG_TYPE_NUM,
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            (void**)&len, &len_set, "length");
242
 
243
  if (!scan_opts(argc, argv,
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                 1,
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                 opts, 1,
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                 0, 0, 0)) {
247
    return;
248
  }
249
  if (!len_set) {
250
    len = SDRAM_LEN / 4;
251
  }
252
 
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  diag_printf("Length = 0x%08X\n", len);
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  diag_printf("Writing data-equals-address pattern to SDRAM\n");
256
  for (i = 0; i < len; i++) {
257
    mem_addr[i] = ~(cyg_uint32)(mem_addr + i);
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  }
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  diag_printf("Reading back pattern\n");
260
  for (i = 0; i < len; i++) {
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    if (mem_addr[i] != ~(cyg_uint32)(mem_addr + i)) {
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      diag_printf("Error: mismatch at address %p, read back 0x%08x\n",
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                  mem_addr + i,
264
                  mem_addr[i]);
265
      break;
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    }
267
  }
268
  diag_printf("Done\n");
269
}
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271
static void
272
do_delay(int argc,
273
         char *argv[])
274
{
275
  struct option_info opts[1];
276
  int count = 0x00000000;
277
  bool count_set;
278
  int value;
279
  register int i;
280
 
281
  init_opts(&opts[0], 'c', true, OPTION_ARG_TYPE_NUM,
282
            (void**)&count, &count_set, "Number of times to delay");
283
 
284
  if (!scan_opts(argc, argv,
285
                 1,
286
                 opts, sizeof(opts) / sizeof(opts[0]),
287
                 (void*)&value, OPTION_ARG_TYPE_NUM, "amount of time to delay (usec)")) {
288
    return;
289
  }
290
 
291
  if (!count_set) {
292
    count = 1;
293
  }
294
  for (i = 0; i < count; i++) {
295
    diag_printf("Delaying %d useconds...", value);
296
    HAL_DELAY_US(value);
297
    diag_printf("Done\n");
298
  }
299
}
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#endif

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