OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [arm/] [arm9/] [var/] [v2_0/] [cdl/] [hal_arm_arm9.cdl] - Blame information for rev 631

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 27 unneback
# ====================================================================
2
#
3
#      hal_arm_arm9.cdl
4
#
5
#      ARM Arm9 architectural HAL package configuration data
6
#
7
# ====================================================================
8
#####ECOSGPLCOPYRIGHTBEGIN####
9
## -------------------------------------------
10
## This file is part of eCos, the Embedded Configurable Operating System.
11
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12
##
13
## eCos is free software; you can redistribute it and/or modify it under
14
## the terms of the GNU General Public License as published by the Free
15
## Software Foundation; either version 2 or (at your option) any later version.
16
##
17
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
19
## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
20
## for more details.
21
##
22
## You should have received a copy of the GNU General Public License along
23
## with eCos; if not, write to the Free Software Foundation, Inc.,
24
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25
##
26
## As a special exception, if other files instantiate templates or use macros
27
## or inline functions from this file, or you compile this file and link it
28
## with other works to produce a work based on this file, this file does not
29
## by itself cause the resulting work to be covered by the GNU General Public
30
## License. However the source code for this file must still be made available
31
## in accordance with section (3) of the GNU General Public License.
32
##
33
## This exception does not invalidate any other reasons why a work based on
34
## this file might be covered by the GNU General Public License.
35
##
36
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
37
## at http://sources.redhat.com/ecos/ecos-license/
38
## -------------------------------------------
39
#####ECOSGPLCOPYRIGHTEND####
40
# ====================================================================
41
######DESCRIPTIONBEGIN####
42
#
43
# Author(s):      gthomas
44
# Contributors:   jskov
45
# Date:           2000-11-10
46
#
47
#####DESCRIPTIONEND####
48
#
49
# ====================================================================
50
cdl_package CYGPKG_HAL_ARM_ARM9 {
51
    display       "ARM ARM9 architecture"
52
    parent        CYGPKG_HAL_ARM
53
    hardware
54
    include_dir   cyg/hal
55
    define_header hal_arm_arm9.h
56
    description   "
57
        This HAL variant package provides generic
58
        support for the ARM ARM9 processors. It is also
59
        necessary to select a specific target platform HAL
60
        package."
61
 
62
    implements    CYGINT_HAL_ARM_ARCH_ARM9
63
 
64
    compile       arm9_misc.c
65
 
66
    define_proc {
67
        puts $::cdl_system_header "#define CYGBLD_HAL_ARM_VAR_IO_H"
68
    }
69
 
70
    cdl_interface CYGINT_HAL_ARM_ARM9_VARIANT {
71
        display  "Number of variant implementations in this configuration"
72
        no_define
73
        requires 1 == CYGINT_HAL_ARM_ARM9_VARIANT
74
    }
75
 
76
    # CPU variant supported
77
    cdl_option CYGPKG_HAL_ARM_ARM9_ARM920T {
78
        display       "ARM ARM920T microprocessor"
79
        implements    CYGINT_HAL_ARM_ARM9_VARIANT
80
        default_value 0
81
        no_define
82
        define        -file=system.h CYGPKG_HAL_ARM_ARM9_ARM920T
83
        description "
84
            The ARM920T has 16k data cache, 16k instruction cache, 16 word
85
            write buffer and an MMU."
86
    }
87
 
88
    cdl_option CYGPKG_HAL_ARM_ARM9_ARM922T {
89
        display       "ARM ARM922T microprocessor"
90
        implements    CYGINT_HAL_ARM_ARM9_VARIANT
91
        default_value 0
92
        no_define
93
        define        -file=system.h CYGPKG_HAL_ARM_ARM9_ARM922T
94
        description "
95
            The ARM922T has 8k data cache, 8k instruction cache, 16 word
96
            write buffer and an MMU."
97
    }
98
 
99
    cdl_option CYGPKG_HAL_ARM_ARM9_ARM925T {
100
        display       "ARM ARM925T microprocessor"
101
        implements    CYGINT_HAL_ARM_ARM9_VARIANT
102
        default_value 0
103
        no_define
104
        define        -file=system.h CYGPKG_HAL_ARM_ARM9_ARM925T
105
        description "
106
            The ARM925T has 8k data cache, 16k instruction cache, 16 word
107
            write buffer and an MMU."
108
    }
109
 
110
    cdl_option CYGPKG_HAL_ARM_ARM9_ARM940T {
111
        display       "ARM ARM940T microprocessor"
112
        implements    CYGINT_HAL_ARM_ARM9_VARIANT
113
        default_value 0
114
        no_define
115
        define        -file=system.h CYGPKG_HAL_ARM_ARM9_ARM940T
116
        description "
117
            The ARM920T has 4k data cache, 4k instruction cache, 8 word
118
            write buffer and a protection unit."
119
    }
120
 
121
    cdl_option CYGPKG_HAL_ARM_ARM9_ARM966E {
122
        display       "ARM ARM966E microprocessor"
123
        implements    CYGINT_HAL_ARM_ARM9_VARIANT
124
        default_value 0
125
        no_define
126
        define        -file=system.h CYGPKG_HAL_ARM_ARM9_ARM966E
127
        description "
128
            The ARM966E has no data cache, no instruction cache, a
129
            write buffer and no protection unit."
130
    }
131
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.