OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [arm/] [e7t/] [v2_0/] [include/] [hal_platform_ints.h] - Blame information for rev 174

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 27 unneback
#ifndef CYGONCE_HAL_PLATFORM_INTS_H
2
#define CYGONCE_HAL_PLATFORM_INTS_H
3
//==========================================================================
4
//
5
//      hal_platform_ints.h
6
//
7
//      HAL Interrupt and clock assignments for E7T (AEB-2)
8
//
9
//==========================================================================
10
//####ECOSGPLCOPYRIGHTBEGIN####
11
// -------------------------------------------
12
// This file is part of eCos, the Embedded Configurable Operating System.
13
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
14
//
15
// eCos is free software; you can redistribute it and/or modify it under
16
// the terms of the GNU General Public License as published by the Free
17
// Software Foundation; either version 2 or (at your option) any later version.
18
//
19
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
20
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
21
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
22
// for more details.
23
//
24
// You should have received a copy of the GNU General Public License along
25
// with eCos; if not, write to the Free Software Foundation, Inc.,
26
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27
//
28
// As a special exception, if other files instantiate templates or use macros
29
// or inline functions from this file, or you compile this file and link it
30
// with other works to produce a work based on this file, this file does not
31
// by itself cause the resulting work to be covered by the GNU General Public
32
// License. However the source code for this file must still be made available
33
// in accordance with section (3) of the GNU General Public License.
34
//
35
// This exception does not invalidate any other reasons why a work based on
36
// this file might be covered by the GNU General Public License.
37
//
38
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
39
// at http://sources.redhat.com/ecos/ecos-license/
40
// -------------------------------------------
41
//####ECOSGPLCOPYRIGHTEND####
42
//==========================================================================
43
//#####DESCRIPTIONBEGIN####
44
//
45
// Author(s):    gthomas
46
// Contributors: gthomas
47
// Date:         1999-02-20
48
// Purpose:      Define Interrupt support
49
// Description:  The interrupt specifics for the AEB-1 board/platform are
50
//               defined here.
51
//              
52
// Usage:        #include <cyg/hal/hal_platform_ints.h>
53
//               ...
54
//              
55
//
56
//####DESCRIPTIONEND####
57
//
58
//==========================================================================
59
 
60
#define CYGNUM_HAL_INTERRUPT_EXT0              0
61
#define CYGNUM_HAL_INTERRUPT_EXT1              1
62
#define CYGNUM_HAL_INTERRUPT_EXT2              2
63
#define CYGNUM_HAL_INTERRUPT_EXT3              3
64
#define CYGNUM_HAL_INTERRUPT_UART0_TX          4
65
#define CYGNUM_HAL_INTERRUPT_UART0_RX          5
66
#define CYGNUM_HAL_INTERRUPT_UART1_TX          6
67
#define CYGNUM_HAL_INTERRUPT_UART1_RX          7
68
#define CYGNUM_HAL_INTERRUPT_GDMA0             8
69
#define CYGNUM_HAL_INTERRUPT_GDMA1             9
70
#define CYGNUM_HAL_INTERRUPT_TIMER0           10
71
#define CYGNUM_HAL_INTERRUPT_TIMER1           11
72
#define CYGNUM_HAL_INTERRUPT_HDLCA_TX         12
73
#define CYGNUM_HAL_INTERRUPT_HDLCA_RX         13
74
#define CYGNUM_HAL_INTERRUPT_HDLCB_TX         14
75
#define CYGNUM_HAL_INTERRUPT_HDLCB_RX         15
76
#define CYGNUM_HAL_INTERRUPT_ETH_BDMA_TX      16
77
#define CYGNUM_HAL_INTERRUPT_ETH_BDMA_RX      17
78
#define CYGNUM_HAL_INTERRUPT_ETH_MAC_TX       18
79
#define CYGNUM_HAL_INTERRUPT_ETH_MAC_RX       19
80
#define CYGNUM_HAL_INTERRUPT_I2C              20
81
 
82
#define CYGNUM_HAL_ISR_MIN                     0
83
#define CYGNUM_HAL_ISR_MAX                     CYGNUM_HAL_INTERRUPT_I2C
84
#define CYGNUM_HAL_ISR_COUNT                   (CYGNUM_HAL_ISR_MAX - CYGNUM_HAL_ISR_MIN + 1)
85
 
86
// The vector used by the Real time clock
87
#define CYGNUM_HAL_INTERRUPT_RTC               CYGNUM_HAL_INTERRUPT_TIMER0
88
 
89
 
90
//----------------------------------------------------------------------------
91
// Reset.
92
#define HAL_PLATFORM_RESET()
93
 
94
#define HAL_PLATFORM_RESET_ENTRY 0x01820000
95
 
96
#endif // CYGONCE_HAL_PLATFORM_INTS_H

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.