OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [arm/] [e7t/] [v2_0/] [include/] [pkgconf/] [mlt_arm_e7t_rom.h] - Blame information for rev 587

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 27 unneback
// eCos memory layout - Wed Apr 11 13:49:55 2001
2
 
3
// This is a generated file - do not edit
4
 
5
#ifndef __ASSEMBLER__
6
#include <cyg/infra/cyg_type.h>
7
#include <stddef.h>
8
 
9
#endif
10
#define CYGMEM_REGION_ram (0)
11
#define CYGMEM_REGION_ram_SIZE (0x80000)
12
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
13
#define CYGMEM_REGION_rom (0x1800000)
14
#define CYGMEM_REGION_rom_SIZE (0x80000)
15
#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
16
#ifndef __ASSEMBLER__
17
extern char CYG_LABEL_NAME (__reserved_bootmon) [];
18
#endif
19
#define CYGMEM_SECTION_reserved_bootmon (CYG_LABEL_NAME (__reserved_bootmon))
20
#define CYGMEM_SECTION_reserved_bootmon_SIZE (0x20000)
21
#ifndef __ASSEMBLER__
22
extern char CYG_LABEL_NAME (__heap1) [];
23
#endif
24
#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
25
#define CYGMEM_SECTION_heap1_SIZE (0x80000 - (size_t) CYG_LABEL_NAME (__heap1))

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.