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#ifndef CYGONCE_HAL_PLATFORM_SETUP_H
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#define CYGONCE_HAL_PLATFORM_SETUP_H
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/*=============================================================================
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//
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// hal_platform_setup.h
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//
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// Platform specific support for HAL (assembly code)
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//
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//=============================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): hmt
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// Contributors: hmt
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// Date: 1999-04-21
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// Purpose: Intel EBSA285 platform specific support routines
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// Description:
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// Usage: #include <cyg/hal/hal_platform_setup.h>
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//
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//####DESCRIPTIONEND####
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//
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//===========================================================================*/
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#include <pkgconf/system.h> // System-wide configuration info
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#include CYGBLD_HAL_PLATFORM_H // Platform specific configuration
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#include CYGHWR_MEMORY_LAYOUT_H // Location of the ROM
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#include <cyg/hal/hal_ebsa285.h> // Platform specific hardware definitions
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#include <cyg/hal/hal_mmu.h> // MMU definitions
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// Note that we do NOT define CYGHWR_HAL_ARM_HAS_MMU so that at reset we
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// jump straight into the ROM; this makes it unnecessary to take any
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// special steps to switch from executing in the ROM alias at low
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// addresses. Make no difference for RAM start. For ROMRAM startup the
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// application is linked with RAM addresses, but we have to jump to
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// the ROM address at startup. Diddle the UNMAPPED macro to do this
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#if defined (CYG_HAL_STARTUP_ROMRAM)
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#define UNMAPPED(x) (x + CYGMEM_REGION_rom)
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#endif
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// Define macro used to diddle the LEDs during early initialization.
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// Can use r0+r1. Argument in \x.
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#define CYGHWR_LED_MACRO \
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ldr r0,=0x42000148 /* SA110_XBUS_CYCLE_ARBITER */ ;\
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ldr r0,[r0] ;\
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tsts r0,#0x00800000 /* SA110_XBUS_CYCLE_ARBITER_ENABLED */ ;\
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bne 667f /* Don't touch if PCI arbiter enabled */;\
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ldr r0,=0x40012800 /* SA110_XBUS_XCS2 */ ;\
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mov r1,#7&(~(\x)) ;\
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str r1,[r0] ;\
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667:
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// The main useful output of this file is PLATFORM_SETUP1: it invokes lots
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// of other stuff (may depend on RAM or ROM start). The other stuff is
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// divided into further macros to make it easier to manage what's enabled
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// when.
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#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) || \
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defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) || \
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!defined(CYGSEM_HAL_USE_ROM_MONITOR)
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// Dependence on ROM/RAM start removed when meminit code fixed up.
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// But it re-emerged when RedBoot's desire to live over RAM app
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// initialization asserted itself.
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//
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// The correct thing is to re-initialize everything if any of:
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// o You are in ROM (duh!)
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// o You include your own stubs (ergo rule the world)
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// o You do not cooperate with a ROM Monitor
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//
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// [The latter two probably mean the same thing, but this way also lets us
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// support a standalone RAM startup app with no stubs in it. ]
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// Hence the more complex conditional above. See comments in the ChangeLog
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// and plf_io.h wrt initializing the PCI bus world.
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#define PLATFORM_SETUP1 \
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PLATFORM_FLUSH_DISABLE_CACHES \
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INIT_XBUS_ACCESS \
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ALLOW_CLOCK_SWITCHING \
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CALL_MEMINIT_CODE \
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ROMRAM_COPY \
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BASIC_PCI_SETUP
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#else
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#define PLATFORM_SETUP1
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#endif
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// Discard and disable all caches: we are about to be writing vectors...
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#define PLATFORM_FLUSH_DISABLE_CACHES \
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/* flush and disable the caches */ \
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mrc p15,0,r1,c1,c0,0 ;\
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bic r1,r1,#0x1000 /* ICache off */ ;\
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bic r1,r1,#0x000D /* DCache off and MM off */ ;\
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mcr p15,0,r1,c1,c0,0 ;\
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mov r1, #0 ;\
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mcr p15,0,r1,c7,c6,0 /* DCache invalidate (discard) */ ;\
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mcr p15,0,r1,c7,c5,0 /* ICache invalidate */ ;\
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mcr p15,0,r1,c8,c6,0 /* DCache TLB invalidate */ ;\
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mcr p15,0,r1,c8,c5,0 /* ICache TLB invalidate */ ;\
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nop ;\
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nop /* be sure invalidate "takes" before doing owt else */ ;\
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nop ;
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// Allow clock switching: very early in the startup
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#define ALLOW_CLOCK_SWITCHING \
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mov r0, #0 ;\
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mcr p15,0,r0,c15,c1,2 ;\
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// Depending on jumper settings, either ignore or initialize the XBus.
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#define INIT_XBUS_ACCESS \
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ldr r1, =SA110_XBUS_CYCLE_ARBITER ;\
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ldr r0, [r1] ;\
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tsts r0, #SA110_XBUS_CYCLE_ARBITER_ENABLED ;\
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beq 777f ;\
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/* PCI arbiter enabled, so don't touch the XBus */ ;\
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ldr r0, =SA110_CONTROL ;\
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ldr r1, =0x04aa0000 ;\
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str r1, [r0] ;\
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b 778f ;\
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;\
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/* set up XBus so we can read switch and write to LEDs */ ;\
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777: ldr r0, =SA110_CONTROL ;\
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ldr r1, =0x64aa0000 ;\
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str r1, [r0] ;\
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ldr r0, =SA110_XBUS_CYCLE_ARBITER ;\
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ldr r1, =0x100016db ;\
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str r1, [r0] ;\
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ldr r0, =SA110_XBUS_IO_STROBE_MASK ;\
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ldr r1, =0xfcfcfcfc ;\
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str r1, [r0] ;\
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778: ;\
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// Save lr and call mem init code
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#define CALL_MEMINIT_CODE \
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mov r10, lr /* preserve lr */ ;\
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bl __mem285_init ;\
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ldr r1, =hal_dram_size /* [see hal_intr.h] */ ;\
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str r0, [ r1 ] /* store the top of memory address */ ;\
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mov lr, r10 /* in hal_dram_size for future use */ ;\
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// If we are doing a ROMRAM startup copy all sections up to the start of
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// the data section to RAM.
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#if defined(CYG_HAL_STARTUP_ROMRAM)
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#define ROMRAM_COPY \
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ldr r0,=(CYGMEM_REGION_rom) ;\
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ldr r1,=0 ;\
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ldr r2,=0x40 ;\
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810: ldr r3,[r0],#4 ;\
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str r3,[r1],#4 ;\
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cmp r1,r2 ;\
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bne 810b ;\
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ldr r0,=(CYGMEM_REGION_rom+reset_vector) ;\
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ldr r1,=(reset_vector) ;\
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ldr r2,=(CYGMEM_REGION_rom_SIZE) ;\
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820: ldr r3,[r0],#4 ;\
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str r3,[r1],#4 ;\
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cmp r1,r2 ;\
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bne 820b ;\
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ldr r0,=830f ;\
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mov pc,r0 ;\
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830:
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#else
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#define ROMRAM_COPY
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#endif
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#define BASIC_PCI_SETUP \
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/**************************************************************** \
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* Basic PCI setup. \
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****************************************************************/\
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ldr r0, =SA110_CONTROL_STATUS_BASE ;\
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;\
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/* Disable PCI Outbound interrupts */ ;\
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mov r1, #12 ;\
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str r1, [r0, #SA110_OUT_INT_MASK_o] ;\
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;\
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/* Disable Doorbells */ ;\
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mov r1, #0 ;\
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str r1, [r0, #SA110_DOORBELL_PCI_MASK_o] ;\
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str r1, [r0, #SA110_DOORBELL_SA_MASK_o] ;\
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;\
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/* Map high PCI address bits to 0 */ ;\
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str r1, [r0, #SA110_PCI_ADDR_EXT_o] ;\
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;\
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/* Interrupt ID to 1 */ ;\
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mov r1, #0x100 ;\
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str r1, [r0, #SA110_PCI_CFG_INT_LINE_o] ;\
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;\
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/* Remove PCI_reset */ ;\
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ldr r1, [r0, #SA110_CONTROL_o] ;\
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orr r1, r1, #0x200 ;\
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str r1, [r0, #SA110_CONTROL_o] ;\
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;\
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/* Open a 2MB window */ ;\
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mov r1, #0x1c0000 ;\
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str r1,[r0, #SA110_SDRAM_BASE_ADDRESS_MASK_o] ;\
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mov r1, #0xe00000 ;\
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str r1,[r0, #SA110_SDRAM_BASE_ADDRESS_OFFSET_o] ;\
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;\
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/* Only init PCI if central function is set and */ ;\
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/* standalone bit is cleared */ ;\
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ldr r1, [r0, #SA110_CONTROL_o] ;\
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tst r1, #SA110_CONTROL_CFN ;\
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beq 1f ;\
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;\
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ldr r1, =0x40012000 ;\
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ldr r1, [r1] ;\
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tst r1, #0x40 ;\
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bne 1f ;\
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;\
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/* Don't respond to any commands */ ;\
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mov r1, #0 ;\
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str r1, [r0, #SA110_PCI_CFG_COMMAND_o] ;\
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;\
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str r1, [r0, #SA110_PCI_CFG_SDRAM_BAR_o] ;\
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mov r1, #0x40000000 ;\
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str r1, [r0, #SA110_PCI_CFG_CSR_MEM_BAR_o] ;\
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mov r1, #0xf000 ;\
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str r1, [r0, #SA110_PCI_CFG_CSR_IO_BAR_o] ;\
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;\
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/* respond to I/O space & Memory transactions. */ ;\
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mov r1, #0x17 ;\
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str r1, [r0, #SA110_PCI_CFG_COMMAND_o] ;\
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1: ;\
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/* Signal PCI_init_complete */ ;\
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ldr r1, [r0, #SA110_CONTROL_o] ;\
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orr r1, r1, #SA110_CONTROL_INIT_COMPLETE ;\
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str r1, [r0, #SA110_CONTROL_o] ;\
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/*---------------------------------------------------------------------------*/
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/* end of hal_platform_setup.h */
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#endif /* CYGONCE_HAL_PLATFORM_SETUP_H */
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