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//==========================================================================
//
//      brutus_misc.c
//
//      HAL misc board support code for StrongARM SA1110/Brutus
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):    gthomas
// Contributors: hmt
//               Travis C. Furrer <furrer@mit.edu>
// Date:         2000-05-21
// Purpose:      HAL board support
// Description:  Implementations of HAL board interfaces
//
//####DESCRIPTIONEND####
//
//========================================================================*/
 
#include <pkgconf/hal.h>
#include <pkgconf/system.h>
#include CYGBLD_HAL_PLATFORM_H
 
#include <cyg/infra/cyg_type.h>         // base types
#include <cyg/infra/cyg_trac.h>         // tracing macros
#include <cyg/infra/cyg_ass.h>          // assertion macros
 
#include <cyg/hal/hal_io.h>             // IO macros
#include <cyg/hal/hal_arch.h>           // Register state info
#include <cyg/hal/hal_diag.h>
#include <cyg/hal/hal_intr.h>           // Interrupt names
#include <cyg/hal/hal_cache.h>
#include <cyg/hal/hal_sa11x0.h>         // Hardware definitions
#include <cyg/hal/brutus.h>             // Platform specifics
 
#include <cyg/infra/diag.h>             // diag_printf
 
// All the MM table layout is here:
#include <cyg/hal/hal_mm.h>
 
#include <string.h> // memset
 
void
hal_mmu_init(void)
{
    unsigned long ttb_base = SA11X0_RAM_BANK0_BASE + 0x4000;
    unsigned long i;
 
    /*
     * Set the TTB register
     */
    asm volatile ("mcr  p15,0,%0,c2,c0,0" : : "r"(ttb_base) /*:*/);
 
    /*
     * Set the Domain Access Control Register
     */
    i = ARM_ACCESS_DACR_DEFAULT;
    asm volatile ("mcr  p15,0,%0,c3,c0,0" : : "r"(i) /*:*/);
 
    /*
     * First clear all TT entries - ie Set them to Faulting
     */
    memset((void *)ttb_base, 0, ARM_FIRST_LEVEL_PAGE_TABLE_SIZE);
 
    /*               Actual  Virtual  Size   Attributes                                                    Function  */
    /*               Base     Base     MB      cached?           buffered?        access permissions                 */
    /*             xxx00000  xxx00000                                                                                */
    X_ARM_MMU_SECTION(0x000,  0x400,     1,  ARM_CACHEABLE,   ARM_BUFFERABLE,   ARM_ACCESS_PERM_RW_RW); /* Boot flash ROMspace */
    X_ARM_MMU_SECTION(0x080,  0x080,     4,  ARM_CACHEABLE,   ARM_BUFFERABLE,   ARM_ACCESS_PERM_RW_RW); /* Application flash ROM */
    X_ARM_MMU_SECTION(0x100,  0x100,     1,  ARM_CACHEABLE,   ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* Static RAM - 512K */
    X_ARM_MMU_SECTION(0x180,  0x180,     1,  ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* Static select 3 */
    X_ARM_MMU_SECTION(0x200,  0x200,   256,  ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* PCMCIA Socket 0 */
    X_ARM_MMU_SECTION(0x300,  0x300,   256,  ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* PCMCIA Sockets 1 */
    X_ARM_MMU_SECTION(0x800,  0x800, 0x400,  ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* StrongARM(R) Registers */
    X_ARM_MMU_SECTION(0xC00,  0x000,     4,  ARM_CACHEABLE,   ARM_BUFFERABLE,   ARM_ACCESS_PERM_RW_RW); /* DRAM Bank 0 */
    X_ARM_MMU_SECTION(0xC80,  0x004,     4,  ARM_CACHEABLE,   ARM_BUFFERABLE,   ARM_ACCESS_PERM_RW_RW); /* DRAM Bank 1 */
    X_ARM_MMU_SECTION(0xD00,  0x008,     4,  ARM_CACHEABLE,   ARM_BUFFERABLE,   ARM_ACCESS_PERM_RW_RW); /* DRAM Bank 2 */
    X_ARM_MMU_SECTION(0xD80,  0x00C,     4,  ARM_CACHEABLE,   ARM_BUFFERABLE,   ARM_ACCESS_PERM_RW_RW); /* DRAM Bank 3 */
    X_ARM_MMU_SECTION(0xC00,  0xC00,   256,  ARM_UNCACHEABLE, ARM_BUFFERABLE,   ARM_ACCESS_PERM_RW_RW); /* DRAM Banks - raw access */
    X_ARM_MMU_SECTION(0xE00,  0xE00,   128,  ARM_CACHEABLE,   ARM_BUFFERABLE,   ARM_ACCESS_PERM_RW_RW); /* Zeros (Cache Clean) Bank */
 
}
 
//
// Platform specific initialization
//
 
void
plf_hardware_init(void)
{
}
 
#include CYGHWR_MEMORY_LAYOUT_H
typedef void code_fun(void);
void brutus_program_new_stack(void *func)
{
    register CYG_ADDRESS stack_ptr asm("sp");
    register CYG_ADDRESS old_stack asm("r4");
    register code_fun *new_func asm("r0");
    old_stack = stack_ptr;
    stack_ptr = CYGMEM_REGION_ram + CYGMEM_REGION_ram_SIZE - sizeof(CYG_ADDRESS);
    new_func = (code_fun*)func;
    new_func();
    stack_ptr = old_stack;
    return;
}
 
// ------------------------------------------------------------------------
// EOF brutus_misc.c

Line No.	Rev	Author	Line
1	27	unneback	`//==========================================================================`
2			`//`
3			`// brutus_misc.c`
4			`//`
5			`// HAL misc board support code for StrongARM SA1110/Brutus`
6			`//`
7			`//==========================================================================`
8			`//####ECOSGPLCOPYRIGHTBEGIN####`
9			`// -------------------------------------------`
10			`// This file is part of eCos, the Embedded Configurable Operating System.`
11			`// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.`
12			`//`
13			`// eCos is free software; you can redistribute it and/or modify it under`
14			`// the terms of the GNU General Public License as published by the Free`
15			`// Software Foundation; either version 2 or (at your option) any later version.`
16			`//`
17			`// eCos is distributed in the hope that it will be useful, but WITHOUT ANY`
18			`// WARRANTY; without even the implied warranty of MERCHANTABILITY or`
19			`// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License`
20			`// for more details.`
21			`//`
22			`// You should have received a copy of the GNU General Public License along`
23			`// with eCos; if not, write to the Free Software Foundation, Inc.,`
24			`// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.`
25			`//`
26			`// As a special exception, if other files instantiate templates or use macros`
27			`// or inline functions from this file, or you compile this file and link it`
28			`// with other works to produce a work based on this file, this file does not`
29			`// by itself cause the resulting work to be covered by the GNU General Public`
30			`// License. However the source code for this file must still be made available`
31			`// in accordance with section (3) of the GNU General Public License.`
32			`//`
33			`// This exception does not invalidate any other reasons why a work based on`
34			`// this file might be covered by the GNU General Public License.`
35			`//`
36			`// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.`
37			`// at http://sources.redhat.com/ecos/ecos-license/`
38			`// -------------------------------------------`
39			`//####ECOSGPLCOPYRIGHTEND####`
40			`//==========================================================================`
41			`//#####DESCRIPTIONBEGIN####`
42			`//`
43			`// Author(s): gthomas`
44			`// Contributors: hmt`
45			`// Travis C. Furrer <furrer@mit.edu>`
46			`// Date: 2000-05-21`
47			`// Purpose: HAL board support`
48			`// Description: Implementations of HAL board interfaces`
49			`//`
50			`//####DESCRIPTIONEND####`
51			`//`
52			`//========================================================================*/`
53
54			`#include <pkgconf/hal.h>`
55			`#include <pkgconf/system.h>`
56			`#include CYGBLD_HAL_PLATFORM_H`
57
58			`#include <cyg/infra/cyg_type.h> // base types`
59			`#include <cyg/infra/cyg_trac.h> // tracing macros`
60			`#include <cyg/infra/cyg_ass.h> // assertion macros`
61
62			`#include <cyg/hal/hal_io.h> // IO macros`
63			`#include <cyg/hal/hal_arch.h> // Register state info`
64			`#include <cyg/hal/hal_diag.h>`
65			`#include <cyg/hal/hal_intr.h> // Interrupt names`
66			`#include <cyg/hal/hal_cache.h>`
67			`#include <cyg/hal/hal_sa11x0.h> // Hardware definitions`
68			`#include <cyg/hal/brutus.h> // Platform specifics`
69
70			`#include <cyg/infra/diag.h> // diag_printf`
71
72			`// All the MM table layout is here:`
73			`#include <cyg/hal/hal_mm.h>`
74
75			`#include <string.h> // memset`
76
77			`void`
78			`hal_mmu_init(void)`
79			`{`
80			`unsigned long ttb_base = SA11X0_RAM_BANK0_BASE + 0x4000;`
81			`unsigned long i;`
82
83			`/*`
84			`* Set the TTB register`
85			`*/`
86			`asm volatile ("mcr p15,0,%0,c2,c0,0" : : "r"(ttb_base) /:/);`
87
88			`/*`
89			`* Set the Domain Access Control Register`
90			`*/`
91			`i = ARM_ACCESS_DACR_DEFAULT;`
92			`asm volatile ("mcr p15,0,%0,c3,c0,0" : : "r"(i) /:/);`
93
94			`/*`
95			`* First clear all TT entries - ie Set them to Faulting`
96			`*/`
97			`memset((void *)ttb_base, 0, ARM_FIRST_LEVEL_PAGE_TABLE_SIZE);`
98
99			`/* Actual Virtual Size Attributes Function */`
100			`/* Base Base MB cached? buffered? access permissions */`
101			`/* xxx00000 xxx00000 */`
102			`X_ARM_MMU_SECTION(0x000, 0x400, 1, ARM_CACHEABLE, ARM_BUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* Boot flash ROMspace */`
103			`X_ARM_MMU_SECTION(0x080, 0x080, 4, ARM_CACHEABLE, ARM_BUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* Application flash ROM */`
104			`X_ARM_MMU_SECTION(0x100, 0x100, 1, ARM_CACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* Static RAM - 512K */`
105			`X_ARM_MMU_SECTION(0x180, 0x180, 1, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* Static select 3 */`
106			`X_ARM_MMU_SECTION(0x200, 0x200, 256, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* PCMCIA Socket 0 */`
107			`X_ARM_MMU_SECTION(0x300, 0x300, 256, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* PCMCIA Sockets 1 */`
108			`X_ARM_MMU_SECTION(0x800, 0x800, 0x400, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* StrongARM(R) Registers */`
109			`X_ARM_MMU_SECTION(0xC00, 0x000, 4, ARM_CACHEABLE, ARM_BUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* DRAM Bank 0 */`
110			`X_ARM_MMU_SECTION(0xC80, 0x004, 4, ARM_CACHEABLE, ARM_BUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* DRAM Bank 1 */`
111			`X_ARM_MMU_SECTION(0xD00, 0x008, 4, ARM_CACHEABLE, ARM_BUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* DRAM Bank 2 */`
112			`X_ARM_MMU_SECTION(0xD80, 0x00C, 4, ARM_CACHEABLE, ARM_BUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* DRAM Bank 3 */`
113			`X_ARM_MMU_SECTION(0xC00, 0xC00, 256, ARM_UNCACHEABLE, ARM_BUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* DRAM Banks - raw access */`
114			`X_ARM_MMU_SECTION(0xE00, 0xE00, 128, ARM_CACHEABLE, ARM_BUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* Zeros (Cache Clean) Bank */`
115
116			`}`
117
118			`//`
119			`// Platform specific initialization`
120			`//`
121
122			`void`
123			`plf_hardware_init(void)`
124			`{`
125			`}`
126
127			`#include CYGHWR_MEMORY_LAYOUT_H`
128			`typedef void code_fun(void);`
129			`void brutus_program_new_stack(void *func)`
130			`{`
131			`register CYG_ADDRESS stack_ptr asm("sp");`
132			`register CYG_ADDRESS old_stack asm("r4");`
133			`register code_fun *new_func asm("r0");`
134			`old_stack = stack_ptr;`
135			`stack_ptr = CYGMEM_REGION_ram + CYGMEM_REGION_ram_SIZE - sizeof(CYG_ADDRESS);`
136			`new_func = (code_fun*)func;`
137			`new_func();`
138			`stack_ptr = old_stack;`
139			`return;`
140			`}`
141
142			`// ------------------------------------------------------------------------`
143			`// EOF brutus_misc.c`

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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [arm/] [sa11x0/] [brutus/] [v2_0/] [src/] [brutus_misc.c] - Blame information for rev 174