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# ====================================================================

#

#      hal_arm_sa11x0_nano.cdl

#

#      ARM SA1110/nanoEngine platform HAL package configuration data

#

# ====================================================================

#####ECOSGPLCOPYRIGHTBEGIN####

## -------------------------------------------

## This file is part of eCos, the Embedded Configurable Operating System.

## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.

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#####ECOSGPLCOPYRIGHTEND####

# ====================================================================

######DESCRIPTIONBEGIN####

#

# Author(s):      gthomas

# Original data:  gthomas

# Contributors:   hmt

# Date:           2001-02-12

#

#####DESCRIPTIONEND####

#

# ====================================================================

cdl_package CYGPKG_HAL_ARM_SA11X0_NANO {

    display       "ARM SA1110/nanoEngine evaluation board"

    parent        CYGPKG_HAL_ARM_SA11X0

    hardware

    include_dir   cyg/hal

    define_header hal_arm_sa11x0_nano.h

    description   "

        This HAL platform package provides

        support for the Intel StrongARM SA1110 based evalation board,

        made by Bright Star Engineering (BSE), known as 'nanoEngine'."

    compile       nano_misc.c

    implements    CYGINT_HAL_DEBUG_GDB_STUBS

    implements    CYGINT_HAL_DEBUG_GDB_STUBS_BREAK

    implements    CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT

    implements    CYGINT_HAL_ARM_MEM_REAL_REGION_TOP

    implements    CYGHWR_HAL_ARM_SA11X0_UART1

    implements    CYGHWR_HAL_ARM_SA11X0_UART3

    define_proc {

        puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H   "

        puts $::cdl_system_header "#define CYGBLD_HAL_VARIANT_H  "

        puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H "

        puts $::cdl_header "#define HAL_PLATFORM_CPU    \"StrongARM 1110\""

        puts $::cdl_header "#define HAL_PLATFORM_BOARD  \"nanoEngine\""

        puts $::cdl_header "#define HAL_PLATFORM_EXTRA  \"by Bright Star Engineering\""

        puts $::cdl_header "#define HAL_ARCH_PROGRAM_NEW_STACK nano_program_new_stack"

    }

    cdl_component CYG_HAL_STARTUP {

        display       "Startup type"

        flavor        data

        default_value {"RAM"}

        legal_values  {"RAM" "ROM"}

        no_define

        define -file system.h CYG_HAL_STARTUP

        description   "

           When targetting the nanoEngine it is possible to build

           the system for either RAM bootstrap or ROM bootstrap(s). Select

           'ram' when building programs to load into RAM using eCos GDB

           stubs.  Select 'rom' when building a stand-alone application

           which will be put into ROM, or for the special case of

           building the eCos GDB stubs themselves."

        cdl_component CYGBLD_HAL_STARTUP_ROM_POST_BEFORE_ECOS {

            display "POST code exists at base of flash"

            active_if  { CYG_HAL_STARTUP == "ROM" }

            calculated 1 ; # REQUIRED for BSE BOOT PROM

            description "

            To accommodate POST (power-on self-test) code,

            or other preboot loader code such as the BSE nanoEngine Firmware,

            in the start of

            the flash, that is run at startup, we can link RedBoot (or any

            ROM start eCos application) for a higher address, specifically

            256kBytes higher than usual in this case."

            cdl_option CYGBLD_HAL_STARTUP_ROM_POST_OMIT_SDRAM_INIT {

                display "Omit SDRAM initialization if already set up"

                calculated 1 ; # REQUIRED for BSE BOOT PROM

                description "

            POST code will likely already initialize SDRAM.  This option

            enables code that omits SDRAM initialization, if it appears

            already to be set up."

            }

        }

    }

    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD {

        display       "Diagnostic serial port baud rate"

        flavor        data

        legal_values  9600 19200 38400 115200

        default_value 38400 ; # BUT BSE BOOT PROM IS 9600

        description   "

            This option selects the baud rate used for the diagnostic port.

            Note: this should match the value chosen for the GDB port if the

            diagnostic and GDB port are the same."

    }

    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_BAUD {

        display       "GDB serial port baud rate"

        flavor        data

        legal_values  9600 19200 38400 115200

        default_value 38400 ; # BUT BSE BOOT PROM IS 9600

        description   "

            This option selects the baud rate used for the diagnostic port.

            Note: this should match the value chosen for the GDB port if the

            diagnostic and GDB port are the same."

    }

    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS {

        display      "Number of communication channels on the board"

        flavor       data

        calculated   2

        description "

            Channel 1 is the little 6-way phone socket, connected to UART3.

            Channel 0 is the little 6-way phone socket, connected to UART1.

            Channel 0 is nearest the power socket and reset button.

            Channel 0 is the default for all serial I/O."

    }

    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL {

        display          "Debug serial port"

        active_if        CYGPRI_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_CONFIGURABLE

        flavor data

        legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1

        default_value    0

        description      "

            The nanoEngine board has two serial ports. This option

            chooses which port will be used to connect to a host

            running GDB."

    }

    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_DEFAULT {

        display      "Default console channel."

        flavor       data

        legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1

        calculated   0

    }

    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL {

        display          "Diagnostic serial port"

        active_if        CYGPRI_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_CONFIGURABLE

        flavor data

        legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1

        default_value    CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_DEFAULT

        description      "

        The nanoEngine board has two serial ports.  This option

        chooses which port will be used for diagnostic output."

    }

    cdl_component CYGBLD_GLOBAL_OPTIONS {

        display "Global build options"

        flavor  none

        no_define

        description   "

            Global build options including control over

            compiler flags, linker flags and choice of toolchain."

        parent  CYGPKG_NONE

        cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {

            display "Global command prefix"

            flavor  data

            no_define

            default_value { "arm-elf" }

            description "

                This option specifies the command prefix used when

                invoking the build tools."

        }

        cdl_option CYGBLD_GLOBAL_CFLAGS {

            display "Global compiler flags"

            flavor  data

            no_define

            default_value { "-mcpu=strongarm1100 -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" }

            description   "

                This option controls the global compiler flags which are used to

                compile all packages by default. Individual packages may define

                options which override these global flags."

        }

        cdl_option CYGBLD_GLOBAL_LDFLAGS {

            display "Global linker flags"

            flavor  data

            no_define

            default_value { "-Wl,--gc-sections -Wl,-static -g -O2 -nostdlib" }

            description   "

                This option controls the global linker flags. Individual

                packages may define options which override these global flags."

        }

        cdl_option CYGBLD_BUILD_GDB_STUBS {

            display "Build GDB stub ROM image"

            default_value 0

            requires { CYG_HAL_STARTUP == "ROM" }

            requires CYGSEM_HAL_ROM_MONITOR

            requires CYGBLD_BUILD_COMMON_GDB_STUBS

            requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS

            requires CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT

            requires CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT

            requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT

            requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM

            no_define

            description "

                This option enables the building of the GDB stubs for the

                board. The common HAL controls takes care of most of the

                build process, but the final conversion from ELF image to

                binary data is handled by the platform CDL, allowing

                relocation of the data if necessary."

            make -priority 320 {

                /bin/gdb_module.bin : /bin/gdb_module.img

                $(OBJCOPY) --remove-section=.fixed_vectors -O binary $< $@

            }

        }

    }

    cdl_component CYGPKG_HAL_ARM_SA11X0_NANO_OPTIONS {

        display "StrongARM SA1110/BRIGHTSTAR NANOENGINE build options"

        flavor  none

        no_define

        description   "

            Package specific build options including control over

            compiler flags used only in building this package,

            and details of which tests are built."

        cdl_option CYGPKG_HAL_ARM_SA11X0_NANO_CFLAGS_ADD {

            display "Additional compiler flags"

            flavor  data

            no_define

            default_value { "" }

            description   "

                This option modifies the set of compiler flags for

                building the StrongARM nanoEngine HAL. These flags are used in addition

                to the set of global flags."

        }

        cdl_option CYGPKG_HAL_ARM_SA11X0_NANO_CFLAGS_REMOVE {

            display "Suppressed compiler flags"

            flavor  data

            no_define

            default_value { "" }

            description   "

                This option modifies the set of compiler flags for

                building the StrongARM nanoEngine HAL. These flags are removed from

                the set of global flags if present."

        }

        cdl_option CYGPKG_HAL_ARM_SA11X0_NANO_TESTS {

            display "StrongARM SA1110/nanoEngine tests"

            flavor  data

            no_define

#            calculated { "tests/dram-test" }

            calculated { "" }

            description   "

                This option specifies the set of tests for the StrongARM nanoEngine HAL."

        }

    }

    cdl_component CYGHWR_MEMORY_LAYOUT {

        display "Memory layout"

        flavor data

        no_define

        calculated { CYG_HAL_STARTUP == "RAM" ? "arm_sa11x0_nano_ram" : \

      CYGBLD_HAL_STARTUP_ROM_POST_BEFORE_ECOS ? "arm_sa11x0_nano_post" : \

                                                "arm_sa11x0_nano_rom" }

        cdl_option CYGHWR_MEMORY_LAYOUT_LDI {

            display "Memory layout linker script fragment"

            flavor data

            no_define

            define -file system.h CYGHWR_MEMORY_LAYOUT_LDI

            calculated { CYG_HAL_STARTUP == "RAM" ? "" : \

          CYGBLD_HAL_STARTUP_ROM_POST_BEFORE_ECOS ? "" : \

                                                    "" }

        }

        cdl_option CYGHWR_MEMORY_LAYOUT_H {

            display "Memory layout header file"

            flavor data

            no_define

            define -file system.h CYGHWR_MEMORY_LAYOUT_H

            calculated { CYG_HAL_STARTUP == "RAM" ? "" : \

          CYGBLD_HAL_STARTUP_ROM_POST_BEFORE_ECOS ? "" : \

                                                    "" }

        }

    }

    cdl_option CYGSEM_HAL_ROM_MONITOR {

        display       "Behave as a ROM monitor"

        flavor        bool

        default_value 0

        parent        CYGPKG_HAL_ROM_MONITOR

        requires      { CYG_HAL_STARTUP == "ROM" }

        description   "

            Enable this option if this program is to be used as a ROM monitor,

            i.e. applications will be loaded into RAM on the board, and this

            ROM monitor may process exceptions or interrupts generated from the

            application. This enables features such as utilizing a separate

            interrupt stack when exceptions are generated."

    }

    cdl_option CYGSEM_HAL_USE_ROM_MONITOR {

         display       "Work with a ROM monitor"

         flavor        booldata

         legal_values  { "Generic" "GDB_stubs" }

         default_value { CYG_HAL_STARTUP == "RAM" ? "GDB_stubs" : 0 }

         parent        CYGPKG_HAL_ROM_MONITOR

         requires      { CYG_HAL_STARTUP == "RAM" }

         description   "

             Support can be enabled for different varieties of ROM monitor.

             This support changes various eCos semantics such as the encoding

             of diagnostic output, or the overriding of hardware interrupt

             vectors.

             Firstly there is \"Generic\" support which prevents the HAL

             from overriding the hardware vectors that it does not use, to

             instead allow an installed ROM monitor to handle them. This is

             the most basic support which is likely to be common to most

             implementations of ROM monitor.

             \"GDB_stubs\" provides support when GDB stubs are included in

             the ROM monitor or boot ROM."

     }

    cdl_component CYGPKG_REDBOOT_HAL_OPTIONS {

        display       "Redboot HAL options"

        flavor        none

        no_define

        parent        CYGPKG_REDBOOT

        active_if     CYGPKG_REDBOOT

        description   "

            This option lists the target's requirements for a valid Redboot

            configuration."

        # compile -library=libextras.a redboot_cmds.c

        cdl_option CYGBLD_BUILD_REDBOOT_BIN {

            display       "Build Redboot ROM binary image"

            active_if     CYGBLD_BUILD_REDBOOT

            default_value 1

            no_define

            description "This option enables the conversion of the Redboot ELF

                         image to a binary image suitable for ROM programming."

            make -priority 325 {

                /bin/redboot.bin : /bin/redboot.elf

                $(OBJCOPY) --strip-debug $< $(@:.bin=.img)

                $(OBJCOPY) -O srec $< $(@:.bin=.srec)

                $(OBJCOPY) -O binary $< $@

            }

        }

    }

}