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unneback |
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Installation of RedBoot on a Target Board using RedBoot's Flash Commands
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------------------------------------------------------------------------
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These are generic instructions applicable to RedBoot for many platforms.
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Details of what you type have been changed to refer specifically to the
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nanoEngine hardware, but you should also read the further instructions for
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Bright Star Engineering's nanoEngine and SA1110 boards - known as target
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"nano" in eCos configuration terms - which follow.
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Here's how to install RedBoot, using the redboot images you should find in
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loaders/PLATFORM/
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in your installation directory (sizes and dates are just examples):
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431497 Aug 9 15:28 redboot-ram.elf
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184802 Aug 9 15:28 redboot-ram.srec
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433104 Aug 9 15:29 redboot-rom.elf (not used in this recipe)
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194732 Aug 9 15:29 redboot-rom.srec
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Copy the two '.srec' files to /tftpboot or where-ever they have to be for
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your TFTP server.
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Briefly, we use whatever boot flash image you have in place already (CygMon
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or an eCos stub ROM) along with GDB, to execute a RAM based version of
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RedBoot. That is used, in its command-line mode, to fetch a ROM-based boot
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image of RedBoot and write it into the flash memory. "Fetching" the image
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means TFTP from a server; the image must be in S-Record format. We then
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reset the target, thus running the newly-installed boot image of RedBoot.
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That in turn is used, in its command-line mode, to fetch a RAM-based boot
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image of RedBoot and write it into a different area of the flash memory, in
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order to make it easier to do the first part (running a RAM-based RedBoot
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in order to update the boot block) again in future.
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NB: the instructions below refer to a system with 8Mb of flash, at address
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0x50000000 in memory. That address is common to SA11x0 CPUs.
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Other boards might have a different start address, such as 0x41000000 and
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different flash blocksizes. RedBoot's startup banner will tell you the
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details, if all is functioning correctly. If the address is different, you
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must use different addresses for saving the images into the Flash Image
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System (fis). The command "fis list" will tell you the addresses to use
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for the "RedBoot" and "RedBoot[backup]" images, immediately after the "fis
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init" command.
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Alternatively you can make a plain binary from the redboot-rom.elf and
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"blow" that into the boot flash using the means of your choice, as with
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previous systems.
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1. Load a RedBoot, built for RAM startup, into RAM using existing GDB
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stubs. Note: do not run it yet!
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% arm-elf-gdb -nw loaders/nano/redboot-ram.elf
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GNU gdb 4.18-ecos-99r1-991015
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Copyright 1998 Free Software Foundation, Inc.
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GDB is free software, covered by the GNU General Public License, and you are
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welcome to change it and/or distribute copies of it under certain conditions.
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Type "show copying" to see the conditions. This version of GDB is supported
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for customers of Cygnus Solutions. Type "show warranty" for details.
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This GDB was configured as "--host=i686-pc-linux-gnu
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--target=arm-elf"...(no debugging symbols found)...
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(gdb) set remotebaud 38400
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(gdb) tar rem /dev/ttyS0
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Remote debugging using /dev/ttyS0
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0x41000838 in ?? ()
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(gdb) load
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Loading section .rom_vectors, size 0x44 lma 0x20000
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Loading section .text, size 0xf06c lma 0x20044
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Loading section .rodata, size 0x19a8 lma 0x2f0b0
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Loading section .data, size 0x474 lma 0x30a58
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Start address 0x20044 , load size 69324
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Transfer rate: 25208 bits/sec.
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(gdb) detach
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Ending remote debugging.
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(gdb) q
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2. Execute RedBoot from RAM, and initialize the flash filing system.
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Notes: the key here is the "-o" option which keeps minicom from
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sending junk.
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The magic phrase "$c#63" is important: you must type it in exactly
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thus. It is the packet which a "continue" command in GDB would send
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to the target. If you get no response, try "+$c#63" instead.
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The IP and server info comes from BOOTP, which is how this RedBoot
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will start up if the flash does not contain good config info.
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% minicom -o ttyS0
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$c#63
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RedBoot(tm) debug environment - built 07:45:57, Aug 7 2000
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Copyright (C) 2000, Red Hat, Inc.
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RAM: 0x00000000-0x01000000
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FLASH: 0x50000000 - 0x50400000, 32 blocks of 0x00020000 bytes ea.
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IP: 192.168.1.25, Default server: 192.168.1.101
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RedBoot> fi init
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About to initialize [format] FLASH image system - are you sure (y/n)? y
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*** Initialize FLASH Image System
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Warning: device contents not erased, some blocks may not be usable
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... Erase from 0x503c0000-0x50400000: .
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... Program from 0x00fb0000-0x00fb0400 at 0x503c0000: .
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3. Program RedBoot image into FLASH:
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This expects the file redboot-post.srec (see below) to exist in the
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TFTP server space on the server that answered the BOOTP request.
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It loads into the free flash memory following the boot firmware, at
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address 0x50040000.
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RedBoot> lo -v /tftpboot/redboot-post.srec -b 0x00100000
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Address offset = bf100000
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Entry point: 0x50040044, address range: 0x50040000-0x50051384
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RedBoot> fi cr RedBoot[post] -f 0x50040000 -b 0x00100000 -l 0x20000
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An image named 'RedBoot[post]' exists - are you sure (y/n)? y
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... Erase from 0x50040000-0x50060000: .
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... Program from 0x00100000-0x00120000 at 0x50040000: .
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... Erase from 0x503c0000-0x50400000: .
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... Program from 0x00fb0000-0x00ff0000 at 0x503c0000: .
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RedBoot>
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****reset the board here, leaving your terminal program connected****
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RedBoot(tm) debug environment - built 07:47:35, Aug 7 2000
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Copyright (C) 2000, Red Hat, Inc.
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RAM: 0x00000000-0x01000000
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FLASH: 0x50000000 - 0x50400000, 32 blocks of 0x00020000 bytes ea.
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IP: 192.168.1.25, Default server: 192.168.1.101
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RedBoot>
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4. Install RAM based RedBoot for backup/update:
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Similar considerations apply: redboot-ram.srec must be an S-record
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version of RedBoot built for RAM startup.
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RedBoot> lo -v /tftpboot/redboot-ram.srec
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Entry point: 0x00020044, address range: 0x00020000-0x00030ecc
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RedBoot> fi cr RedBoot[backup] -f 0x50060000 -b 0x20000 -r 0x20000 -l 0x20000
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An image named 'RedBoot[backup]' exists - are you sure (y/n)? y
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... Erase from 0x50060000-0x50080000: .
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... Program from 0x00020000-0x00040000 at 0x50060000: .
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... Erase from 0x503c0000-0x50400000: .
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... Program from 0x00fb0000-0x00ff0000 at 0x503c0000: .
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RedBoot>
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You have now updated your board completely. Phew!
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5. To update RedBoot with a new version of RedBoot, it is necessary to run
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a RAM-based version of RedBoot which itself re-writes the ROM-based one,
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because you can't re-write the code that is executing at the time.
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RedBoot> fi lo RedBoot[backup]
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RedBoot> g
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+
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RedBoot(tm) debug environment - built 07:45:57, Aug 7 2000
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Copyright (C) 2000, Red Hat, Inc.
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RAM: 0x00000000-0x01000000
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FLASH: 0x50000000 - 0x50400000, 32 blocks of 0x00020000 bytes ea.
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IP: 192.168.1.25, Default server: 192.168.1.101
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RedBoot>
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.. continue with step 3, using whatever your new boot image is called
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in the TFTP-place, in .srec format.
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You probably also want to set up then environment with your own IP
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addresses and so on. Recall that this IP address is the one you use for
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GDB to talk to the board, not the IP address which the eCos application
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will take on (by BOOTP/DHCP or whatever means according to configury as
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usual).
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RedBoot> fconfig
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Network debug at boot time: false
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Use BOOTP for network configuration: false
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Local IP address: 192.168.1.25
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Default server IP address: 192.168.1.101
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GDB connection port: 1000
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Run script at boot: false
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RedBoot>
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RedBoot for the nanoEngine/commEngine "nano" Target
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---------------------------------------------------
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Unlike other targets, the nanoEngine comes equipped with boot firmware
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which you cannot modify. See chapter 5 "nanoEngine Firmware" of the
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nanoEngine Hardware Reference Manual (we refer to "July 17, 2000 Rev 0.6")
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from Bright Star Engineering.
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Because of this, eCos and so Redboot supports only these two startup types:
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RAM and POST, rather than the more usual ROM, RAM and optionally POST.
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Briefly, the POST-startup RedBoot image lives in flash following the BSE
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firmware. The BSE firmware is configured, using its standard "bootcmd"
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parameter, to jump into the RedBoot image at startup.
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You can perform the initial load of the POST-startup RedBoot image into
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flash using the BSE firmware's "load" command. This will load, using TFTP,
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a binary file and program it into flash in one neat operation. Because no
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memory management is used in the BSE firmware, flash is mapped from address
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zero upwards, so the address for the RedBoot POST image is 0x40000. You
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must use the binary version of RedBoot for this, "redboot-post.bin"
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This assumes you have set up the other BSE firmware config parameters such
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that it can communicate over your network, to your TFTP server.
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>
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>load /tftpboot/redboot-post.bin 40000
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loading ... erasing blk at 00040000
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erasing blk at 00050000
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94168 bytes loaded cksum 00008579
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done
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>
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> set bootcmd "go 40000"
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> get
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myip = 10.16.19.198
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netmask = 255.255.255.0
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eth = 0
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gateway = 10.16.19.66
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serverip = 10.16.19.66
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bootcmd = go 40000
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>
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NB: the BSE firmware runs its serial IO at 9600 Baud; RedBoot runs instead
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at 38400 Baud. You must select the right baud rate in your terminal
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program to be able to set up the BSE firmware.
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After a reset, the BSE firmware will print
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Boot: BSE 2000 Sep 12 2000 14:00:30
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autoboot: "go 40000" [hit ESC to abort]
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and then RedBoot starts, switching to 38400 Baud.
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Once you have installed a bootable RedBoot in the system in this manner, we
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advice re-installing using the generic method described first in this note
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in order that the Flash Image System contains an appropriate description of
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the flash entries.
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Rebuilding RedBoot from Source
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------------------------------
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To rebuild RedBoot from source, first locate the configuration export files
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for your platform in the eCos source repository. The RAM and POST startup
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configuration exports can usually be found in a directory named "misc" in
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the platform HAL in the eCos source repository, named either:
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2164 Nov 29 14:59 misc/redboot_RAM.cfg
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2221 Nov 29 14:59 misc/redboot_POST.cfg
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or
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1432 Feb 1 13:27 misc/redboot_RAM.ecm
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1487 Feb 1 14:38 misc/redboot_POST.ecm
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Having located these files, copy them say to /tmp, say, for less typing.
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To make redboot for RAM startup:
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mkdir redboot.RAM
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cd redboot.RAM
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ecosconfig new nano redboot
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ecosconfig import /tmp/redboot_RAM.ecm
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ecosconfig tree
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make
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To build the POST version, in a different build/config directory, just use
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the config export redboot_POST.ecm (or .cfg) instead.
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The resulting files will be, in each of the POST and RAM startup build
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places:
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70456 ..../install/bin/redboot.bin
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433104 ..../install/bin/redboot.elf
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91407 ..../install/bin/redboot.img
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194732 ..../install/bin/redboot.srec
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The .elf and .srec files have the obvious relationship to those supplied in
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the "loaders/nano" directory in the install.
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Cohabiting with POST in Flash
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-----------------------------
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The configuration export named redboot_POST.ecm configures redboot to build
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for execution at address 0x50040000 (or during bootup, 0x00040000). This
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is to allow power-on self-test (POST) code or immutable firmware to live in
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the lower addresses of the flash and to run before RedBoot gets control.
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The assumption is that RedBoot will be entered at its base address in
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physical memory, ie. 0x00040000. Alternatively, for testing, you can call
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it in an already running system by "go 0x50040040" at another RedBoot
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prompt, or a branch to that address; the address is where the reset vector
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points, and is reported by RedBoot's tftp load command and listed by the
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fis list command, amongst other places.
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Using the POST configuration enables a normal config option which causes
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linking and initialization against memory layout files called "...post..."
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rather than "...rom..." or "...ram..." in the include/pkgconf directory,
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specifically:
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665 Feb 9 17:57 include/pkgconf/mlt_arm_sa11x0_nano_post.h
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839 Feb 9 17:57 include/pkgconf/mlt_arm_sa11x0_nano_post.ldi
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585 Feb 9 17:57 include/pkgconf/mlt_arm_sa11x0_nano_post.mlt
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It is these you should edit if you wish to move that execution address from
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0x50040000 in the POST configuration. Startup type naturally remains ROM
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in this configuration.
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Because the nanoEngine contains immutable boot firmware at the start of
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flash, RedBoot for this target is configured to reserve that area in the
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Flash Image System, and to create by default an entry for the POST startup
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RedBoot.
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RedBoot> fis list
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Name FLASH addr Mem addr Length Entry point
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(reserved) 0x50000000 0x50000000 0x00040000 0x00000000
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RedBoot[post] 0x50040000 0x00100000 0x00020000 0x50040040
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RedBoot[backup] 0x50060000 0x00020000 0x00020000 0x00020040
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RedBoot config 0x503E0000 0x503E0000 0x00010000 0x00000000
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FIS directory 0x503F0000 0x503F0000 0x00010000 0x00000000
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RedBoot>
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The entry "(reserved)" ensures that the FIS cannot attempt to overwrite the
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BSE firmware, thus ensuring that the board remains bootable and recoverable
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even after installing a broken RedBoot image.
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Special Redboot Commands
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------------------------
|
324 |
|
|
|
325 |
|
|
The nanoEngine/commEngine has one or two Intel i82559 Ethernet controllers
|
326 |
|
|
installed, but these have no associated serial EEPROM in which to record
|
327 |
|
|
their Ethernet Station Address (ESA, or MAC address). The BSE firmware
|
328 |
|
|
records an ESA for the device it uses, but this information is not
|
329 |
|
|
available to RedBoot; we cannot share it.
|
330 |
|
|
|
331 |
|
|
To keep the ESAs for the two ethernet interfaces, two new items of RedBoot
|
332 |
|
|
configuration data are introduced. You can list them with the RedBoot
|
333 |
|
|
command "fconfig -l" thus:
|
334 |
|
|
|
335 |
|
|
RedBoot> fconfig -l
|
336 |
|
|
Run script at boot: false
|
337 |
|
|
Use BOOTP for network configuration: false
|
338 |
|
|
Local IP address: 10.16.19.91
|
339 |
|
|
Default server IP address: 10.16.19.66
|
340 |
|
|
Network hardware address [MAC] for eth0: 0x00:0xB5:0xE0:0xB5:0xE0:0x99
|
341 |
|
|
Network hardware address [MAC] for eth1: 0x00:0xB5:0xE0:0xB5:0xE0:0x9A
|
342 |
|
|
GDB connection port: 9000
|
343 |
|
|
Network debug at boot time: false
|
344 |
|
|
RedBoot>
|
345 |
|
|
|
346 |
|
|
You should set them before running RedBoot or eCos applications with the
|
347 |
|
|
board connected to a network. The fconfig command can be used as for any
|
348 |
|
|
configuration data item; the entire ESA is entered in one line.
|
349 |
|
|
|
350 |
|
|
|
351 |
|
|
Memory Maps
|
352 |
|
|
-----------
|
353 |
|
|
|
354 |
|
|
The first level page table is located at physical address
|
355 |
|
|
0xc0004000. No second level tables are used.
|
356 |
|
|
|
357 |
|
|
NOTE
|
358 |
|
|
The virtual memory maps in this section use a C and B column to
|
359 |
|
|
indicate whether or not the region is cached (C) or buffered (B).
|
360 |
|
|
|
361 |
|
|
Physical Address Range Description
|
362 |
|
|
----------------------- ----------------------------------
|
363 |
|
|
0x00000000 - 0x003fffff 4Mb FLASH (nCS0)
|
364 |
|
|
0x18000000 - 0x18ffffff Internal PCI bus - 2 x i82559 ethernet
|
365 |
|
|
0x40000000 - 0x4fffffff External IO or PCI bus
|
366 |
|
|
0x80000000 - 0xbfffffff SA-1110 Internal Registers
|
367 |
|
|
0xc0000000 - 0xc7ffffff DRAM Bank 0 - 32Mb SDRAM
|
368 |
|
|
0xc8000000 - 0xcfffffff DRAM Bank 1 - empty
|
369 |
|
|
0xe0000000 - 0xe7ffffff Cache Clean
|
370 |
|
|
|
371 |
|
|
Virtual Address Range C B Description
|
372 |
|
|
----------------------- - - ----------------------------------
|
373 |
|
|
0x00000000 - 0x001fffff Y Y DRAM - 8Mb to 32Mb
|
374 |
|
|
0x18000000 - 0x180fffff N N Internal PCI bus - 2 x i82559 ethernet
|
375 |
|
|
0x40000000 - 0x4fffffff N N External IO or PCI bus
|
376 |
|
|
0x50000000 - 0x51ffffff Y Y Up to 32Mb FLASH (nCS0)
|
377 |
|
|
0x80000000 - 0xbfffffff N N SA-1110 Internal Registers
|
378 |
|
|
0xc0000000 - 0xc0ffffff N Y DRAM Bank 0: 8 or 16Mb
|
379 |
|
|
0xc8000000 - 0xc8ffffff N Y DRAM Bank 1: 8 or 16Mb or absent
|
380 |
|
|
0xe0000000 - 0xe7ffffff Y Y Cache Clean
|
381 |
|
|
|
382 |
|
|
The FLASH based RedBoot POST-startup image occupies virtual addresses
|
383 |
|
|
0x50040000 - 0x5005ffff.
|
384 |
|
|
|
385 |
|
|
The ethernet devices use a "PCI window" to communicate with the CPU. This
|
386 |
|
|
is 1Mb of SDRAM which is shared with the ethernet devices that are on the
|
387 |
|
|
PCI bus. It is neither cached nor buffered, to ensure that CPU and PCI
|
388 |
|
|
accesses see correct data in the correct order. By default it is
|
389 |
|
|
configured to be megabyte number 30, at addresses 0x01e00000-0x01efffff.
|
390 |
|
|
This can be modified - and indeed must be, if less than 32Mb of SDRAM is
|
391 |
|
|
installed - via the memory layout tool, or by moving the section
|
392 |
|
|
"__pci_window" referred to by symbols CYGMEM_SECTION_pci_window* in the
|
393 |
|
|
linker script.
|
394 |
|
|
|
395 |
|
|
Though the nanoEngine ships with 32Mb of SDRAM all attached to DRAM bank 0,
|
396 |
|
|
the code can cope with any of these combinations also; "2 x " in this
|
397 |
|
|
context means one device in each DRAM Bank.
|
398 |
|
|
|
399 |
|
|
1 x 8Mb = 8Mb 2 x 8Mb = 16Mb
|
400 |
|
|
1 x 16Mb = 16Mb 2 x 16Mb = 32Mb
|
401 |
|
|
|
402 |
|
|
All are programmed the same in the memory controller.
|
403 |
|
|
|
404 |
|
|
Startup code detects which is fitted and programs the memory map
|
405 |
|
|
accordingly. If the device(s) is 8Mb, then there are gaps in the
|
406 |
|
|
physical memory map, because a high order address bit is not
|
407 |
|
|
connected. The gaps are the higher 2Mb out of every 4Mb.
|
408 |
|
|
|
409 |
|
|
The SA11x0 OS timer is used as a polled timer to provide timeout
|
410 |
|
|
support within RedBoot.
|
411 |
|
|
|
412 |
|
|
|
413 |
|
|
Nano Platform Port
|
414 |
|
|
------------------
|
415 |
|
|
|
416 |
|
|
The nano is in the set of SA11X0-based platforms. It uses the
|
417 |
|
|
arm architectural HAL, the sa11x0 variant HAL, plus the nano
|
418 |
|
|
platform hal. These are components
|
419 |
|
|
CYGPKG_HAL_ARM hal/arm/arch/
|
420 |
|
|
CYGPKG_HAL_ARM_SA11X0 hal/arm/sa11x0/var
|
421 |
|
|
CYGPKG_HAL_ARM_SA11X0_NANO hal/arm/sa11x0/nano
|
422 |
|
|
respectively.
|
423 |
|
|
|
424 |
|
|
The target name is "nano" which includes all these, plus the
|
425 |
|
|
ethernet driver packages, flash driver, and so on.
|
426 |
|
|
|
427 |
|
|
|
428 |
|
|
Ethernet Driver
|
429 |
|
|
---------------
|
430 |
|
|
|
431 |
|
|
The ethernet driver is in two parts:
|
432 |
|
|
|
433 |
|
|
A generic ether driver for Intel i8255x series devices, specifically the
|
434 |
|
|
i82559, is devs/eth/intel/i82559. Its package name is
|
435 |
|
|
CYGPKG_DEVS_ETH_INTEL_I82559.
|
436 |
|
|
|
437 |
|
|
The platform-specific ether driver is devs/eth/arm/nano. Its package is
|
438 |
|
|
CYGPKG_DEVS_ETH_ARM_NANO. This tells the generic driver the address in IO
|
439 |
|
|
memory of the chip, for example, and other configuration details.
|
440 |
|
|
|
441 |
|
|
This driver picks up the ESA from RedBoot's configuration data - unless
|
442 |
|
|
configured to use a static ESA in the usual manner.
|
443 |
|
|
|