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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [arm/] [sa11x0/] [var/] [v2_0/] [include/] [hal_var_ints.h] - Blame information for rev 249

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#ifndef CYGONCE_HAL_VAR_INTS_H
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#define CYGONCE_HAL_VAR_INTS_H
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//==========================================================================
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//
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//      hal_var_ints.h
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//
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//      HAL Interrupt and clock support
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    gthomas
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// Contributors: gthomas
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// Date:         2000-05-08
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// Purpose:      Define Interrupt support
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// Description:  The interrupt details for the SA1110/Assabet are defined here.
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// Usage:
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//               #include <pkgconf/system.h>
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//               #include CYGBLD_HAL_VARIANT_H
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//               #include CYGBLD_HAL_VAR_INTS_H
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//
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//               ...
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//              
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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#include <cyg/hal/hal_sa11x0.h>         // registers
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#define CYGNUM_HAL_INTERRUPT_GPIO0   0
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#define CYGNUM_HAL_INTERRUPT_GPIO1   1
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#define CYGNUM_HAL_INTERRUPT_GPIO2   2
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#define CYGNUM_HAL_INTERRUPT_GPIO3   3
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#define CYGNUM_HAL_INTERRUPT_GPIO4   4
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#define CYGNUM_HAL_INTERRUPT_GPIO5   5
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#define CYGNUM_HAL_INTERRUPT_GPIO6   6
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#define CYGNUM_HAL_INTERRUPT_GPIO7   7
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#define CYGNUM_HAL_INTERRUPT_GPIO8   8
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#define CYGNUM_HAL_INTERRUPT_GPIO9   9
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#define CYGNUM_HAL_INTERRUPT_GPIO10  10
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#define CYGNUM_HAL_INTERRUPT_GPIO    11  // Don't use directly!
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#define CYGNUM_HAL_INTERRUPT_LCD     12
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#define CYGNUM_HAL_INTERRUPT_UDC     13
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#define CYGNUM_HAL_INTERRUPT_UART1   15
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#define CYGNUM_HAL_INTERRUPT_UART2   16
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#define CYGNUM_HAL_INTERRUPT_UART3   17
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#define CYGNUM_HAL_INTERRUPT_MCP     18
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#define CYGNUM_HAL_INTERRUPT_SSP     19
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#define CYGNUM_HAL_INTERRUPT_TIMER0  26
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#define CYGNUM_HAL_INTERRUPT_TIMER1  27
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#define CYGNUM_HAL_INTERRUPT_TIMER2  28
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#define CYGNUM_HAL_INTERRUPT_TIMER3  29
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#define CYGNUM_HAL_INTERRUPT_HZ      30
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#define CYGNUM_HAL_INTERRUPT_ALARM   31
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// GPIO bits 31..11 can generate interrupts as well, but they all
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// end up clumped into interrupt signal #11.  Using the symbols
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// below allow for detection of these separately.
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#define CYGNUM_HAL_INTERRUPT_GPIO11  (32+11)
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#define CYGNUM_HAL_INTERRUPT_GPIO12  (32+12)
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#define CYGNUM_HAL_INTERRUPT_GPIO13  (32+13)
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#define CYGNUM_HAL_INTERRUPT_GPIO14  (32+14)
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#define CYGNUM_HAL_INTERRUPT_GPIO15  (32+15)
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#define CYGNUM_HAL_INTERRUPT_GPIO16  (32+16)
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#define CYGNUM_HAL_INTERRUPT_GPIO17  (32+17)
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#define CYGNUM_HAL_INTERRUPT_GPIO18  (32+18)
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#define CYGNUM_HAL_INTERRUPT_GPIO19  (32+19)
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#define CYGNUM_HAL_INTERRUPT_GPIO20  (32+20)
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#define CYGNUM_HAL_INTERRUPT_GPIO21  (32+21)
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#define CYGNUM_HAL_INTERRUPT_GPIO22  (32+22)
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#define CYGNUM_HAL_INTERRUPT_GPIO23  (32+23)
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#define CYGNUM_HAL_INTERRUPT_GPIO24  (32+24)
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#define CYGNUM_HAL_INTERRUPT_GPIO25  (32+25)
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#define CYGNUM_HAL_INTERRUPT_GPIO26  (32+26)
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#define CYGNUM_HAL_INTERRUPT_GPIO27  (32+27)
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#define CYGNUM_HAL_INTERRUPT_NONE    -1
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#define CYGNUM_HAL_ISR_MIN            0
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#define CYGNUM_HAL_ISR_MAX           (27+32)
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#define CYGNUM_HAL_ISR_COUNT            (CYGNUM_HAL_ISR_MAX+1)
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// The vector used by the Real time clock
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#define CYGNUM_HAL_INTERRUPT_RTC        CYGNUM_HAL_INTERRUPT_TIMER0
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// SA11x0 method for reading clock interrupt latency
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#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY
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externC void hal_clock_latency(cyg_uint32 *);
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# define HAL_CLOCK_LATENCY( _pvalue_ ) \
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         hal_clock_latency( (cyg_uint32 *)(_pvalue_) )
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#endif
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//----------------------------------------------------------------------------
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// Reset.
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#define HAL_PLATFORM_RESET()                                               \
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    CYG_MACRO_START                                                        \
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    cyg_uint32 ctrl;                                                       \
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                                                                           \
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    /* By disabling interupts we will just hang in the loop below      */  \
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    /* if for some reason the software reset fails.                    */  \
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    HAL_DISABLE_INTERRUPTS(ctrl);                                          \
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                                                                           \
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    /* Software reset. */                                                  \
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    *SA11X0_RESET_SOFTWARE_RESET = SA11X0_INVOKE_SOFTWARE_RESET;           \
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                                                                           \
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    for(;;); /* hang here forever if reset fails */                        \
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    CYG_MACRO_END
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// Fallback (never really used)
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#define HAL_PLATFORM_RESET_ENTRY 0x00000000
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#endif // CYGONCE_HAL_VAR_INTS_H

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