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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [arm/] [snds/] [v2_0/] [cdl/] [hal_arm_snds.cdl] - Blame information for rev 27

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#==========================================================================
#
#      hal_arm_snds.cdl
#
#
#
#==========================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
#==========================================================================
######DESCRIPTIONBEGIN####
#
# Author(s):    gthomas
# Contributors: gthomas, jskov
#               Grant Edwards 
# Date:         2001-07-31
# Purpose:
# Description:
#
#####DESCRIPTIONEND####
#
#========================================================================*/
 
 
cdl_package CYGPKG_HAL_ARM_SNDS {
    display       "Samsung SNDS Evaluation Board"
    parent        CYGPKG_HAL_ARM
    define_header hal_arm_snds.h
    include_dir   cyg/hal
    hardware
    description   "
        The SNDS  HAL package provides the support needed to run
        eCos on a Samsung SNDS Eval board"
 
    compile       hal_diag.c snds100_misc.c
 
    implements    CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT
    implements    CYGINT_HAL_DEBUG_GDB_STUBS
    implements    CYGINT_HAL_DEBUG_GDB_STUBS_BREAK
    implements    CYGINT_HAL_ARM_ARCH_ARM7
    implements    CYGINT_HAL_ARM_THUMB_ARCH
    # FIXME: Add endian option
 
    define_proc {
        puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H   "
        puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H "
        puts $::cdl_header ""
        puts $::cdl_header "#define HAL_PLATFORM_CPU    \"ARM 7TDMI\""
        puts $::cdl_header "#define HAL_PLATFORM_BOARD  \"Samsung SNDS\""
        puts $::cdl_header "#define HAL_PLATFORM_EXTRA  \"\""
        puts $::cdl_header ""
    }
 
    cdl_component CYG_HAL_STARTUP {
        display       "Startup type"
        flavor        data
        legal_values  {"RAM" "ROM"}
        default_value {"RAM"}
        no_define
        define -file system.h CYG_HAL_STARTUP
        description   "
           When targetting the SNDS board it is possible to build
           the system for either RAM bootstrap or ROM bootstrap.
           RAM bootstrap generally requires that the board
           is equipped with ROMs containing a suitable ROM monitor or
           equivalent software that allows GDB to download the eCos
           application on to the board. The ROM bootstrap typically
           requires that the eCos application be blown into EPROMs or
           equivalent technology."
    }
 
    cdl_component CYG_HAL_CPUTYPE {
        display       "cpu type"
        flavor        data
        legal_values  {"KS32C5000A" "S3C4510A"}
        default_value {"S3C4510A"}
        no_define
        define -file system.h CYG_HAL_CPUTYPE
        description   "Which version of processor is on board."
    }
 
    cdl_component CYGNUM_HAL_CPUCLOCK {
        display       "cpu clock"
        flavor        data
        legal_values  10000000 to 100000000
        default_value 50000000
        no_define
        define -file system.h CYGNUM_HAL_CPUCLOCK
        description   "Frequency of cpu clock in Hz."
    }
 
    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS {
        display      "Number of diag/debug communication channels on the board"
        flavor       data
        calculated   2
    }
 
    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_DEFAULT {
        display      "Default console channel."
        flavor       data
        legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
        calculated   0
    }
 
    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL {
        display          "Debug serial port"
        flavor data
        legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
        default_value    0
        description      "The SNDS board has two diag/debug
                          serial ports. This option chooses which port will
                          be used to connect to a host running GDB."
     }
 
     cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL {
         display          "Diagnostic serial port"
         flavor data
         legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
         default_value    CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_DEFAULT
         description      "
            The SNDS board has two diag/debug serial ports.  This option
            chooses which port will be used for diagnostic output."
     }
 
    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CHANNELS_DEFAULT_BAUD {
        display       "Console/GDB serial port baud rate"
        flavor        data
        legal_values  9600 19200 38400 57600 115200
        default_value 38400
        description   "
            This option controls the default baud rate used for the
            Console/GDB connection."
    }
 
    # Real-time clock/counter specifics
    cdl_component CYGNUM_HAL_RTC_CONSTANTS {
        display       "Real-time clock constants"
        flavor        none
 
        cdl_option CYGNUM_HAL_RTC_NUMERATOR {
            display       "Real-time clock numerator"
            flavor        data
            calculated    1000000000
        }
        cdl_option CYGNUM_HAL_RTC_DENOMINATOR {
            display       "Real-time clock denominator"
            flavor        data
            calculated    100
        }
        cdl_option CYGNUM_HAL_RTC_PERIOD {
            display       "Real-time clock period"
            flavor        data
           calculated (CYGNUM_HAL_CPUCLOCK/CYGNUM_HAL_RTC_DENOMINATOR)
        }
    }
 
    cdl_component CYGBLD_GLOBAL_OPTIONS {
        display "Global build options"
        flavor  none
        parent  CYGPKG_NONE
        description   "
            Global build options including control over
            compiler flags, linker flags and choice of toolchain."
 
        cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {
            display "Global command prefix"
            flavor  data
            no_define
            default_value { "arm-elf" }
            description "
                This option specifies the command prefix used when
                invoking the build tools."
        }
 
        cdl_option CYGBLD_GLOBAL_CFLAGS {
            display "Global compiler flags"
            flavor  data
            no_define
            if {1} {
                 default_value { (CYGHWR_THUMB && CYGHWR_HAL_ARM_BIGENDIAN) ? "-mthumb-interwork -mbig-endian -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" :
                   CYGHWR_THUMB ? "-mthumb-interwork -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" :
                   (CYGHWR_HAL_ARM_CPU_FAMILY == "ARM9") && CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm9 -mbig-endian -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" :
                   (CYGHWR_HAL_ARM_CPU_FAMILY == "ARM9") && ! CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm9 -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" :
                   (CYGHWR_HAL_ARM_CPU_FAMILY != "ARM9") && CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm7tdmi -mbig-endian -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" :
                   "-mcpu=arm7tdmi -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" }
            } else {
                default_value { (CYGHWR_HAL_ARM_CPU_FAMILY == "ARM9") && CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm9 -mbig-endian -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" :
                   (CYGHWR_HAL_ARM_CPU_FAMILY == "ARM9") && ! CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm9 -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" :
                   (CYGHWR_HAL_ARM_CPU_FAMILY != "ARM9") && CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm7tdmi -mbig-endian -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" :
                   "-mcpu=arm7tdmi -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" }
            }
            description   "
                This option controls the global compiler flags which are used to
                compile all packages by default. Individual packages may define
                options which override these global flags."
        }
 
        cdl_option CYGBLD_GLOBAL_LDFLAGS {
            display "Global linker flags"
            flavor  data
            no_define
            if {1} {
                 default_value { (CYGHWR_THUMB && CYGHWR_HAL_ARM_BIGENDIAN) ? "-mthumb-interwork -mbig-endian -g -nostdlib -Wl,--gc-sections -Wl,-static" :
                   CYGHWR_THUMB ? "-mthumb-interwork -g -nostdlib -Wl,--gc-sections -Wl,-static" :
                   (CYGHWR_HAL_ARM_CPU_FAMILY == "ARM9") && CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm9 -mbig-endian -g -nostdlib -Wl,--gc-sections -Wl,-static" :
                   (CYGHWR_HAL_ARM_CPU_FAMILY == "ARM9") && ! CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm9 -g -nostdlib -Wl,--gc-sections -Wl,-static" :
                   (CYGHWR_HAL_ARM_CPU_FAMILY != "ARM9") && CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm7tdmi -mbig-endian -g -nostdlib -Wl,--gc-sections -Wl,-static" :
                   "-mcpu=arm7tdmi -g -nostdlib -Wl,--gc-sections -Wl,-static" }
            } else {
                default_value { (CYGHWR_HAL_ARM_CPU_FAMILY == "ARM9") && CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm9 -mbig-endian -g -nostdlib -Wl,--gc-sections -Wl,-static" :
                   (CYGHWR_HAL_ARM_CPU_FAMILY == "ARM9") && ! CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm9 -g -nostdlib -Wl,--gc-sections -Wl,-static" :
                   (CYGHWR_HAL_ARM_CPU_FAMILY != "ARM9") && CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm7tdmi -mbig-endian -g -nostdlib -Wl,--gc-sections -Wl,-static" :
                   "-mcpu=arm7tdmi -g -nostdlib -Wl,--gc-sections -Wl,-static" }
            }
            description   "
                This option controls the global linker flags. Individual
                packages may define options which override these global flags."
        }
 
        cdl_option CYGBLD_BUILD_GDB_STUBS {
            display "Build GDB stub ROM image"
            default_value 0
            requires { CYG_HAL_STARTUP == "ROM" }
            requires CYGSEM_HAL_ROM_MONITOR
            requires CYGBLD_BUILD_COMMON_GDB_STUBS
            requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
            requires CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
            requires CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT
            requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
            requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM
            no_define
            description "
                This option enables the building of the GDB stubs for the
                board. The common HAL controls takes care of most of the
                build process, but the final conversion from ELF image to
                binary data is handled by the platform CDL, allowing
                relocation of the data if necessary."
 
            make -priority 320 {
                /bin/gdb_module.bin : /bin/gdb_module.img
                $(OBJCOPY) -O binary $< $@
            }
        }
    }
 
    cdl_component CYGHWR_MEMORY_LAYOUT {
        display "Memory layout"
        flavor data
        no_define
        calculated { CYG_HAL_STARTUP == "RAM" ? "arm_snds_ram" : \
                                                "arm_snds_rom" }
 
        cdl_option CYGHWR_MEMORY_LAYOUT_LDI {
            display "Memory layout linker script fragment"
            flavor data
            no_define
            define -file system.h CYGHWR_MEMORY_LAYOUT_LDI
            calculated { CYG_HAL_STARTUP == "RAM" ? "" : \
                                                    ""}
        }
 
        cdl_option CYGHWR_MEMORY_LAYOUT_H {
            display "Memory layout header file"
            flavor data
            no_define
            define -file system.h CYGHWR_MEMORY_LAYOUT_H
            calculated { CYG_HAL_STARTUP == "RAM" ? "" : \
                                                    ""}
        }
    }
 
 
    cdl_option CYGSEM_HAL_ROM_MONITOR {
        display       "Behave as a ROM monitor"
        flavor        bool
        default_value 0
        parent        CYGPKG_HAL_ROM_MONITOR
        requires      { CYG_HAL_STARTUP == "ROM" }
        description   "
            Enable this option if this program is to be used as a ROM monitor,
            i.e. applications will be loaded into RAM on the board, and this
            ROM monitor may process exceptions or interrupts generated from the
            application. This enables features such as utilizing a separate
            interrupt stack when exceptions are generated."
    }
 
    cdl_component CYGPKG_CYGMON_HAL_OPTIONS {
        display       "CygMon HAL options"
        flavor        none
        no_define
        parent        CYGPKG_CYGMON
        active_if     CYGPKG_CYGMON
        requires      CYGPKG_IO_SERIAL_ARM_SNDS
        requires      {(CYGDAT_CYGMON_CONSOLE_DEV != "\"/dev/ser0\"") || \
                       (CYGPKG_IO_SERIAL_ARM_SNDS_SERIAL0 &&              \
                       (CYGNUM_IO_SERIAL_ARM_SNDS_SERIAL0_BUFSIZE == 512))}
        requires      {(CYGDAT_CYGMON_CONSOLE_DEV != "\"/dev/ser1\"") || \
                       (CYGPKG_IO_SERIAL_ARM_SNDS_SERIAL1 &&              \
                       (CYGNUM_IO_SERIAL_ARM_SNDS_SERIAL1_BUFSIZE == 512))}
        description   "
            This option also lists the target's requirements for a valid CygMon
            configuration."
 
 
        cdl_option CYGDAT_CYGMON_CONSOLE_DEV {
            display       "Serial port for default console"
            flavor data
            default_value { "\"/dev/ser0\"" }
            description   "
                This option selects the physical device to use as the default
                console device for CygMon."
 
        }
 
        cdl_option CYGBLD_BUILD_CYGMON_BIN {
            display       "Build CygMon ROM binary image"
            active_if     CYGBLD_BUILD_CYGMON
            default_value 1
            no_define
            description "This option enables the conversion of the CygMon ELF
                         image to a binary image suitable for ROM programming."
 
            make -priority 325 {
                /bin/cygmon.bin : /bin/cygmon.elf
                $(OBJCOPY) --strip-debug --change-addresses=0xFC060000 $< $(@:.bin=.img)
                $(OBJCOPY) -O srec $< $(@:.bin=.srec)
                $(OBJCOPY) -O binary $< $@
            }
        }
    }
 
    cdl_component CYGPKG_REDBOOT_HAL_OPTIONS {
        display       "Redboot HAL options"
        flavor        none
        no_define
        parent        CYGPKG_REDBOOT
        active_if     CYGPKG_REDBOOT
        description   "
            This option lists the target's requirements for a valid Redboot
            configuration."
 
        cdl_option CYGBLD_BUILD_REDBOOT_BIN {
            display       "Build Redboot ROM binary image"
            active_if     CYGBLD_BUILD_REDBOOT
            default_value 1
            no_define
            description "This option enables the conversion of the Redboot ELF
                         image to a binary image suitable for ROM programming."
 
            make -priority 325 {
                /bin/redboot.bin : /bin/redboot.elf
                $(OBJCOPY) --strip-debug $< $(@:.bin=.img)
                $(OBJCOPY) -O srec $< $(@:.bin=.srec)
                $(OBJCOPY) -O binary $< $@
            }
        }
    }
 
}

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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [arm/] [snds/] [v2_0/] [cdl/] [hal_arm_snds.cdl] - Blame information for rev 27

Line No.	Rev	Author	Line
1	27	unneback	`#==========================================================================`
2			`#`
3			`# hal_arm_snds.cdl`
4			`#`
5			`#`
6			`#`
7			`#==========================================================================`
8			`#####ECOSGPLCOPYRIGHTBEGIN####`
9			`## -------------------------------------------`
10			`## This file is part of eCos, the Embedded Configurable Operating System.`
11			`## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.`
12			`##`
13			`## eCos is free software; you can redistribute it and/or modify it under`
14			`## the terms of the GNU General Public License as published by the Free`
15			`## Software Foundation; either version 2 or (at your option) any later version.`
16			`##`
17			`## eCos is distributed in the hope that it will be useful, but WITHOUT ANY`
18			`## WARRANTY; without even the implied warranty of MERCHANTABILITY or`
19			`## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License`
20			`## for more details.`
21			`##`
22			`## You should have received a copy of the GNU General Public License along`
23			`## with eCos; if not, write to the Free Software Foundation, Inc.,`
24			`## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.`
25			`##`
26			`## As a special exception, if other files instantiate templates or use macros`
27			`## or inline functions from this file, or you compile this file and link it`
28			`## with other works to produce a work based on this file, this file does not`
29			`## by itself cause the resulting work to be covered by the GNU General Public`
30			`## License. However the source code for this file must still be made available`
31			`## in accordance with section (3) of the GNU General Public License.`
32			`##`
33			`## This exception does not invalidate any other reasons why a work based on`
34			`## this file might be covered by the GNU General Public License.`
35			`##`
36			`## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.`
37			`## at http://sources.redhat.com/ecos/ecos-license/`
38			`## -------------------------------------------`
39			`#####ECOSGPLCOPYRIGHTEND####`
40			`#==========================================================================`
41			`######DESCRIPTIONBEGIN####`
42			`#`
43			`# Author(s): gthomas`
44			`# Contributors: gthomas, jskov`
45			`# Grant Edwards`
46			`# Date: 2001-07-31`
47			`# Purpose:`
48			`# Description:`
49			`#`
50			`#####DESCRIPTIONEND####`
51			`#`
52			`#========================================================================*/`
53
54
55			`cdl_package CYGPKG_HAL_ARM_SNDS {`
56			`display "Samsung SNDS Evaluation Board"`
57			`parent CYGPKG_HAL_ARM`
58			`define_header hal_arm_snds.h`
59			`include_dir cyg/hal`
60			`hardware`
61			`description "`
62			`The SNDS HAL package provides the support needed to run`
63			`eCos on a Samsung SNDS Eval board"`
64
65			`compile hal_diag.c snds100_misc.c`
66
67			`implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT`
68			`implements CYGINT_HAL_DEBUG_GDB_STUBS`
69			`implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK`
70			`implements CYGINT_HAL_ARM_ARCH_ARM7`
71			`implements CYGINT_HAL_ARM_THUMB_ARCH`
72			`# FIXME: Add endian option`
73
74			`define_proc {`
75			`puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H "`
76			`puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H "`
77			`puts $::cdl_header ""`
78			`puts $::cdl_header "#define HAL_PLATFORM_CPU \"ARM 7TDMI\""`
79			`puts $::cdl_header "#define HAL_PLATFORM_BOARD \"Samsung SNDS\""`
80			`puts $::cdl_header "#define HAL_PLATFORM_EXTRA \"\""`
81			`puts $::cdl_header ""`
82			`}`
83
84			`cdl_component CYG_HAL_STARTUP {`
85			`display "Startup type"`
86			`flavor data`
87			`legal_values {"RAM" "ROM"}`
88			`default_value {"RAM"}`
89			`no_define`
90			`define -file system.h CYG_HAL_STARTUP`
91			`description "`
92			`When targetting the SNDS board it is possible to build`
93			`the system for either RAM bootstrap or ROM bootstrap.`
94			`RAM bootstrap generally requires that the board`
95			`is equipped with ROMs containing a suitable ROM monitor or`
96			`equivalent software that allows GDB to download the eCos`
97			`application on to the board. The ROM bootstrap typically`
98			`requires that the eCos application be blown into EPROMs or`
99			`equivalent technology."`
100			`}`
101
102			`cdl_component CYG_HAL_CPUTYPE {`
103			`display "cpu type"`
104			`flavor data`
105			`legal_values {"KS32C5000A" "S3C4510A"}`
106			`default_value {"S3C4510A"}`
107			`no_define`
108			`define -file system.h CYG_HAL_CPUTYPE`
109			`description "Which version of processor is on board."`
110			`}`
111
112			`cdl_component CYGNUM_HAL_CPUCLOCK {`
113			`display "cpu clock"`
114			`flavor data`
115			`legal_values 10000000 to 100000000`
116			`default_value 50000000`
117			`no_define`
118			`define -file system.h CYGNUM_HAL_CPUCLOCK`
119			`description "Frequency of cpu clock in Hz."`
120			`}`
121
122			`cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS {`
123			`display "Number of diag/debug communication channels on the board"`
124			`flavor data`
125			`calculated 2`
126			`}`
127
128			`cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_DEFAULT {`
129			`display "Default console channel."`
130			`flavor data`
131			`legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1`
132			`calculated 0`
133			`}`
134
135			`cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL {`
136			`display "Debug serial port"`
137			`flavor data`
138			`legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1`
139			`default_value 0`
140			`description "The SNDS board has two diag/debug`
141			`serial ports. This option chooses which port will`
142			`be used to connect to a host running GDB."`
143			`}`
144
145			`cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL {`
146			`display "Diagnostic serial port"`
147			`flavor data`
148			`legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1`
149			`default_value CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_DEFAULT`
150			`description "`
151			`The SNDS board has two diag/debug serial ports. This option`
152			`chooses which port will be used for diagnostic output."`
153			`}`
154
155			`cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CHANNELS_DEFAULT_BAUD {`
156			`display "Console/GDB serial port baud rate"`
157			`flavor data`
158			`legal_values 9600 19200 38400 57600 115200`
159			`default_value 38400`
160			`description "`
161			`This option controls the default baud rate used for the`
162			`Console/GDB connection."`
163			`}`
164
165			`# Real-time clock/counter specifics`
166			`cdl_component CYGNUM_HAL_RTC_CONSTANTS {`
167			`display "Real-time clock constants"`
168			`flavor none`
169
170			`cdl_option CYGNUM_HAL_RTC_NUMERATOR {`
171			`display "Real-time clock numerator"`
172			`flavor data`
173			`calculated 1000000000`
174			`}`
175			`cdl_option CYGNUM_HAL_RTC_DENOMINATOR {`
176			`display "Real-time clock denominator"`
177			`flavor data`
178			`calculated 100`
179			`}`
180			`cdl_option CYGNUM_HAL_RTC_PERIOD {`
181			`display "Real-time clock period"`
182			`flavor data`
183			`calculated (CYGNUM_HAL_CPUCLOCK/CYGNUM_HAL_RTC_DENOMINATOR)`
184			`}`
185			`}`
186
187			`cdl_component CYGBLD_GLOBAL_OPTIONS {`
188			`display "Global build options"`
189			`flavor none`
190			`parent CYGPKG_NONE`
191			`description "`
192			`Global build options including control over`
193			`compiler flags, linker flags and choice of toolchain."`
194
195			`cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {`
196			`display "Global command prefix"`
197			`flavor data`
198			`no_define`
199			`default_value { "arm-elf" }`
200			`description "`
201			`This option specifies the command prefix used when`
202			`invoking the build tools."`
203			`}`
204
205			`cdl_option CYGBLD_GLOBAL_CFLAGS {`
206			`display "Global compiler flags"`
207			`flavor data`
208			`no_define`
209			`if {1} {`
210			`default_value { (CYGHWR_THUMB && CYGHWR_HAL_ARM_BIGENDIAN) ? "-mthumb-interwork -mbig-endian -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" :`
211			`CYGHWR_THUMB ? "-mthumb-interwork -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" :`
212			`(CYGHWR_HAL_ARM_CPU_FAMILY == "ARM9") && CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm9 -mbig-endian -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" :`
213			`(CYGHWR_HAL_ARM_CPU_FAMILY == "ARM9") && ! CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm9 -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" :`
214			`(CYGHWR_HAL_ARM_CPU_FAMILY != "ARM9") && CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm7tdmi -mbig-endian -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" :`
215			`"-mcpu=arm7tdmi -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" }`
216			`} else {`
217			`default_value { (CYGHWR_HAL_ARM_CPU_FAMILY == "ARM9") && CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm9 -mbig-endian -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" :`
218			`(CYGHWR_HAL_ARM_CPU_FAMILY == "ARM9") && ! CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm9 -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" :`
219			`(CYGHWR_HAL_ARM_CPU_FAMILY != "ARM9") && CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm7tdmi -mbig-endian -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" :`
220			`"-mcpu=arm7tdmi -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" }`
221			`}`
222			`description "`
223			`This option controls the global compiler flags which are used to`
224			`compile all packages by default. Individual packages may define`
225			`options which override these global flags."`
226			`}`
227
228			`cdl_option CYGBLD_GLOBAL_LDFLAGS {`
229			`display "Global linker flags"`
230			`flavor data`
231			`no_define`
232			`if {1} {`
233			`default_value { (CYGHWR_THUMB && CYGHWR_HAL_ARM_BIGENDIAN) ? "-mthumb-interwork -mbig-endian -g -nostdlib -Wl,--gc-sections -Wl,-static" :`
234			`CYGHWR_THUMB ? "-mthumb-interwork -g -nostdlib -Wl,--gc-sections -Wl,-static" :`
235			`(CYGHWR_HAL_ARM_CPU_FAMILY == "ARM9") && CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm9 -mbig-endian -g -nostdlib -Wl,--gc-sections -Wl,-static" :`
236			`(CYGHWR_HAL_ARM_CPU_FAMILY == "ARM9") && ! CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm9 -g -nostdlib -Wl,--gc-sections -Wl,-static" :`
237			`(CYGHWR_HAL_ARM_CPU_FAMILY != "ARM9") && CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm7tdmi -mbig-endian -g -nostdlib -Wl,--gc-sections -Wl,-static" :`
238			`"-mcpu=arm7tdmi -g -nostdlib -Wl,--gc-sections -Wl,-static" }`
239			`} else {`
240			`default_value { (CYGHWR_HAL_ARM_CPU_FAMILY == "ARM9") && CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm9 -mbig-endian -g -nostdlib -Wl,--gc-sections -Wl,-static" :`
241			`(CYGHWR_HAL_ARM_CPU_FAMILY == "ARM9") && ! CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm9 -g -nostdlib -Wl,--gc-sections -Wl,-static" :`
242			`(CYGHWR_HAL_ARM_CPU_FAMILY != "ARM9") && CYGHWR_HAL_ARM_BIGENDIAN ? "-mcpu=arm7tdmi -mbig-endian -g -nostdlib -Wl,--gc-sections -Wl,-static" :`
243			`"-mcpu=arm7tdmi -g -nostdlib -Wl,--gc-sections -Wl,-static" }`
244			`}`
245			`description "`
246			`This option controls the global linker flags. Individual`
247			`packages may define options which override these global flags."`
248			`}`
249
250			`cdl_option CYGBLD_BUILD_GDB_STUBS {`
251			`display "Build GDB stub ROM image"`
252			`default_value 0`
253			`requires { CYG_HAL_STARTUP == "ROM" }`
254			`requires CYGSEM_HAL_ROM_MONITOR`
255			`requires CYGBLD_BUILD_COMMON_GDB_STUBS`
256			`requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS`
257			`requires CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT`
258			`requires CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT`
259			`requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT`
260			`requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM`
261			`no_define`
262			`description "`
263			`This option enables the building of the GDB stubs for the`
264			`board. The common HAL controls takes care of most of the`
265			`build process, but the final conversion from ELF image to`
266			`binary data is handled by the platform CDL, allowing`
267			`relocation of the data if necessary."`
268
269			`make -priority 320 {`
270			`/bin/gdb_module.bin : /bin/gdb_module.img`
271			`$(OBJCOPY) -O binary $< $@`
272			`}`
273			`}`
274			`}`
275
276			`cdl_component CYGHWR_MEMORY_LAYOUT {`
277			`display "Memory layout"`
278			`flavor data`
279			`no_define`
280			`calculated { CYG_HAL_STARTUP == "RAM" ? "arm_snds_ram" : \`
281			`"arm_snds_rom" }`
282
283			`cdl_option CYGHWR_MEMORY_LAYOUT_LDI {`
284			`display "Memory layout linker script fragment"`
285			`flavor data`
286			`no_define`
287			`define -file system.h CYGHWR_MEMORY_LAYOUT_LDI`
288			`calculated { CYG_HAL_STARTUP == "RAM" ? "" : \`
289			`""}`
290			`}`
291
292			`cdl_option CYGHWR_MEMORY_LAYOUT_H {`
293			`display "Memory layout header file"`
294			`flavor data`
295			`no_define`
296			`define -file system.h CYGHWR_MEMORY_LAYOUT_H`
297			`calculated { CYG_HAL_STARTUP == "RAM" ? "" : \`
298			`""}`
299			`}`
300			`}`
301
302
303			`cdl_option CYGSEM_HAL_ROM_MONITOR {`
304			`display "Behave as a ROM monitor"`
305			`flavor bool`
306			`default_value 0`
307			`parent CYGPKG_HAL_ROM_MONITOR`
308			`requires { CYG_HAL_STARTUP == "ROM" }`
309			`description "`
310			`Enable this option if this program is to be used as a ROM monitor,`
311			`i.e. applications will be loaded into RAM on the board, and this`
312			`ROM monitor may process exceptions or interrupts generated from the`
313			`application. This enables features such as utilizing a separate`
314			`interrupt stack when exceptions are generated."`
315			`}`
316
317			`cdl_component CYGPKG_CYGMON_HAL_OPTIONS {`
318			`display "CygMon HAL options"`
319			`flavor none`
320			`no_define`
321			`parent CYGPKG_CYGMON`
322			`active_if CYGPKG_CYGMON`
323			`requires CYGPKG_IO_SERIAL_ARM_SNDS`
324			`requires {(CYGDAT_CYGMON_CONSOLE_DEV != "\"/dev/ser0\"") \|\| \`
325			`(CYGPKG_IO_SERIAL_ARM_SNDS_SERIAL0 && \`
326			`(CYGNUM_IO_SERIAL_ARM_SNDS_SERIAL0_BUFSIZE == 512))}`
327			`requires {(CYGDAT_CYGMON_CONSOLE_DEV != "\"/dev/ser1\"") \|\| \`
328			`(CYGPKG_IO_SERIAL_ARM_SNDS_SERIAL1 && \`
329			`(CYGNUM_IO_SERIAL_ARM_SNDS_SERIAL1_BUFSIZE == 512))}`
330			`description "`
331			`This option also lists the target's requirements for a valid CygMon`
332			`configuration."`
333
334
335			`cdl_option CYGDAT_CYGMON_CONSOLE_DEV {`
336			`display "Serial port for default console"`
337			`flavor data`
338			`default_value { "\"/dev/ser0\"" }`
339			`description "`
340			`This option selects the physical device to use as the default`
341			`console device for CygMon."`
342
343			`}`
344
345			`cdl_option CYGBLD_BUILD_CYGMON_BIN {`
346			`display "Build CygMon ROM binary image"`
347			`active_if CYGBLD_BUILD_CYGMON`
348			`default_value 1`
349			`no_define`
350			`description "This option enables the conversion of the CygMon ELF`
351			`image to a binary image suitable for ROM programming."`
352
353			`make -priority 325 {`
354			`/bin/cygmon.bin : /bin/cygmon.elf`
355			`$(OBJCOPY) --strip-debug --change-addresses=0xFC060000 $< $(@:.bin=.img)`
356			`$(OBJCOPY) -O srec $< $(@:.bin=.srec)`
357			`$(OBJCOPY) -O binary $< $@`
358			`}`
359			`}`
360			`}`
361
362			`cdl_component CYGPKG_REDBOOT_HAL_OPTIONS {`
363			`display "Redboot HAL options"`
364			`flavor none`
365			`no_define`
366			`parent CYGPKG_REDBOOT`
367			`active_if CYGPKG_REDBOOT`
368			`description "`
369			`This option lists the target's requirements for a valid Redboot`
370			`configuration."`
371
372			`cdl_option CYGBLD_BUILD_REDBOOT_BIN {`
373			`display "Build Redboot ROM binary image"`
374			`active_if CYGBLD_BUILD_REDBOOT`
375			`default_value 1`
376			`no_define`
377			`description "This option enables the conversion of the Redboot ELF`
378			`image to a binary image suitable for ROM programming."`
379
380			`make -priority 325 {`
381			`/bin/redboot.bin : /bin/redboot.elf`
382			`$(OBJCOPY) --strip-debug $< $(@:.bin=.img)`
383			`$(OBJCOPY) -O srec $< $(@:.bin=.srec)`
384			`$(OBJCOPY) -O binary $< $@`
385			`}`
386			`}`
387			`}`
388
389			`}`