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#ifndef CYGONCE_HAL_PLATFORM_INTS_H
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#define CYGONCE_HAL_PLATFORM_INTS_H
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//==========================================================================
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//
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// hal_platform_ints.h
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//
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// HAL Interrupt and clock support
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): msalter
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// Contributors:
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// Date: 2000-10-10
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// Purpose: Define Interrupt support
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// Description: The interrupt details for the IQ80310 are defined here.
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// Usage:
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// #include <cyg/hal/hal_platform_ints.h>
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// ...
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//
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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#define CYGNUM_HAL_INTERRUPT_TIMER 27 // external timer
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#define CYGNUM_HAL_INTERRUPT_ETHERNET 28 // onboard enet
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#define CYGNUM_HAL_INTERRUPT_SERIAL_A 29 // 16x50 uart A
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#define CYGNUM_HAL_INTERRUPT_SERIAL_B 30 // 16x50 uart B
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#define CYGNUM_HAL_INTERRUPT_PCI_S_INTD 31 // secondary PCI INTD
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// The hardware doesn't (yet?) provide masking or status for these
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// even though they can trigger cpu interrupts. ISRs will need to
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// poll the device to see if the device actually triggered the
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// interrupt.
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#define CYGNUM_HAL_INTERRUPT_PCI_S_INTC 32 // secondary PCI INTC
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#define CYGNUM_HAL_INTERRUPT_PCI_S_INTB 33 // secondary PCI INTB
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#define CYGNUM_HAL_INTERRUPT_PCI_S_INTA 34 // secondary PCI INTA
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// The vector used by the Real time clock
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#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_TIMER
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//#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_PMU_CCNT_OVFL
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#endif // CYGONCE_HAL_PLATFORM_INTS_H
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// EOF hal_platform_ints.h
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