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//=============================================================================
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//
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// flash.c - Cyclone Diagnostics
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//
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//=============================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): Scott Coulter, Jeff Frazier, Eric Breeden
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// Contributors:
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// Date: 2001-01-25
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// Purpose:
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// Description:
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//
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//####DESCRIPTIONEND####
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//
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//===========================================================================*/
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#include <redboot.h>
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#ifdef CYGPKG_IO_FLASH
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#include <cyg/io/flash.h>
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#include "iq80310.h" /* 80310 chip set specific */
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#include "7_segment_displays.h"
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#include "test_menu.h"
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typedef unsigned char FLASH_TYPE;
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#define MASK 0xff /* for 1 bank */
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/* 28F016S5/28F640J3A Command Definitions - First Bus Cycle */
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#define RESET_CMD (0xffffffff & MASK)
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#define WRITE_TO_BUF_CMD (0xe8e8e8e8 & MASK)
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#define WRITE_CONFIRM_CMD (0xd0d0d0d0 & MASK)
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#define READ_ID_CMD (0x90909090 & MASK)
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#define READ_STAT_REG (0x70707070 & MASK)
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#define CLEAR_STAT_REG (0x50505050 & MASK)
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#define ERASE_CMD (0x20202020 & MASK)
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#define PROGRAM_CMD (0x40404040 & MASK)
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#define BEP_SUSPEND (0xb0b0b0b0 & MASK)
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#define BEP_RESUME (0xd0d0d0d0 & MASK)
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#define LOCK_CMD (0x60606060 & MASK)
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#define CLEAR_LOCK_BIT_SETUP (0x60606060 & MASK) /* 10/06/00 */
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/* 28F016S5/28F640J3A Command Definitions - Second Bus Cycle */
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#define ERASE_CONFIRM (0xd0d0d0d0 & MASK)
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#define LOCK_BLOCK_CONFIRM (0x01010101 & MASK)
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#define MASTER_LOCK_CONFIRM (0xf1f1f1f1 & MASK) /* DO NOT EVER set master enable bit!!! */
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#define UNLOCK_BLOCK_CONFIRM (0xd0d0d0d0 & MASK)
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#define CLEAR_LOCK_BIT_CONFIRM (0xd0d0d0d0 & MASK) /* 10/06/00 */
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/* Flash category definitions */
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#define SECTOR_PROG 0
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#define BLOCK_PROG 1
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/* status register bits */
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#define WSM_READY (FLASH_TYPE) (1 << 7)
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#define WSM_BUSY (FLASH_TYPE) (0 << 7)
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#define BE_SUSPENDED (FLASH_TYPE) (1 << 6)
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#define BE_COMPLETED (FLASH_TYPE) (0 << 6)
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#define ERASE_UNLOCK_ERROR (FLASH_TYPE) (1 << 5)
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#define ERASE_UNLOCK_SUCCESS (FLASH_TYPE) (0 << 5)
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#define CLEAR_LOCK_BIT_ERROR (FLASH_TYPE) (1 << 5) /* 10/06/00 */
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#define CLEAR_LOCK_BIT_SUCCESS (FLASH_TYPE) (0 << 5) /* 10/06/00 */
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#define PROGRAM_LOCK_ERROR (FLASH_TYPE) (1 << 4)
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#define PROGRAM_LOCK_SUCCESS (FLASH_TYPE) (0 << 4)
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#define SET_LOCK_BIT_ERROR (FLASH_TYPE) (1 << 4) /* 10/17/00 */
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#define SET_LOCK_BIT_SUCCESS (FLASH_TYPE) (0 << 4) /* 10/17/00 */
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#define VPP_LOW_DETECT (FLASH_TYPE) (1 << 3)
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#define VPP_OK (FLASH_TYPE) (0 << 3)
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#define PROGRAM_SUSPENDED (FLASH_TYPE) (1 << 2)
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#define PROGRAM_COMPLETED (FLASH_TYPE) (0 << 2)
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#define DEVICE_PROTECTED (FLASH_TYPE) (1 << 1)
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#define DEVICE_UNLOCKED (FLASH_TYPE) (0 << 1)
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/* Other Intel 28F016S5/28F640J3A definitions */
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#define CMD_SEQ_ERR (FLASH_TYPE) (ERASE_UNLOCK_ERROR | PROGRAM_LOCK_ERROR)
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#define ALL_FLASH_STATUS (FLASH_TYPE) (0xfe)
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#define UNKNOWN_ERR (FLASH_TYPE) (0xff)
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#define TEST_BUF_LONGS 16384
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#define TEST_BUF_CHARS 65536
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#define MADE_BY_INTEL (0x89898989 & MASK) /* Manufacturer Code, read at address 0, note that address bit A0 is not used in x8 or x16 mode when obtaining identifier code */
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#define I28F640J3A (0x17171717 & MASK) /* Device Code, read at address 1, note that bit address A0 is not used in x8 or x16 mode when obtaining identifier code */
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/*#define FLASH_BLOCK_SIZE 0x10000*/ /* 28F016S5 */
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#define FLASH_BLOCK_SIZE 0x20000 /* 28F640J3A */
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#define BLOCK_LOCKED 1
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#define BLOCK_UNLOCKED 0
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// First 4K page of flash at physical address zero is
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// virtually mapped at address 0xd0000000.
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#define FLASH_P2V(x) ((volatile FLASH_TYPE *)(((unsigned)(x) < 0x1000) ? \
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((unsigned)(x) | 0xd0000000) : \
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(unsigned)(x)))
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unsigned long *flash_buffer = (unsigned long *)0xa1000000;
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int cmd_stat;
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extern void _flushICache(void);
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extern void _enableICache(void);
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extern void _disableICache(void);
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extern void _switchMMUpageTables(void);
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extern void _usec_delay(void);
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extern void _msec_delay(void);
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unsigned long eeprom_size;
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unsigned long flash_base;
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ADDR eeprom_prog_first, eeprom_prog_last;
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extern long hexIn(void);
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extern char *sgets(char *s);
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/* forward declarations */
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void init_eeprom(void) RAM_FUNC_SECT;
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int check_eeprom(ADDR addr, unsigned long length) RAM_FUNC_SECT;
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int check_bstat(int block_num) RAM_FUNC_SECT;
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int set_all_lock_bits(void) RAM_FUNC_SECT; /* 10/11/00 added */
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int clear_all_lock_bits(ADDR addr) RAM_FUNC_SECT; /* 10/06/00 added */
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int erase_eeprom(ADDR addr, unsigned long length) RAM_FUNC_SECT;
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int write_eeprom(ADDR start_addr, const void *data_arg, int data_size) RAM_FUNC_SECT;
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void flash_test(MENU_ARG arg) RAM_FUNC_SECT;
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void display_val(int num) RAM_FUNC_SECT;
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void display_out (int msb_flag, unsigned char val) RAM_FUNC_SECT;
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#define MSB_DISPLAY_REG (volatile unsigned char *)0xfe840000
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#define LSB_DISPLAY_REG (volatile unsigned char *)0xfe850000
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void display_out (int msb_flag, unsigned char val)
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{
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volatile unsigned char *ledPtr;
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if (msb_flag)
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ledPtr = MSB_DISPLAY_REG;
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else
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ledPtr = LSB_DISPLAY_REG;
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*ledPtr = SevSegDecode[val & 0xf];
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}
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void display_val (int number)
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{
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unsigned char disp_val = number % 256;
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unsigned char msb, lsb;
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lsb = disp_val & 0x0f;
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msb = (disp_val & 0xf0) >> 4;
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display_out (0, lsb);
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display_out (1, msb);
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}
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/********************************************************/
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/* INIT FLASH */
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/* */
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/* This routine initializes the variables for timing */
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/* with any board configuration. This is used to get */
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/* exact timing every time. */
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/********************************************************/
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void init_eeprom(void)
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{
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unsigned char MfgCode=MADE_BY_INTEL;
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unsigned char DevCode=I28F640J3A;
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eeprom_size = 0x800000;
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printf( "\nManufacturer Code = 0x%x\n", MfgCode);
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printf( "Device Code = %x\n", DevCode);
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printf( "Flash Memory size = 0x%x\n", eeprom_size);
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return;
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}
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/********************************************************/
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/* CHECK EEPROM */
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/* Check if Flash is Blank */
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/* */
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/* returns OK if it is; returns ERROR and sets cmd_stat */
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/* to an error code if memory region is not Flash or if */
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/* it is not blank. */
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/* */
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/********************************************************/
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int check_eeprom(ADDR addr, unsigned long length)
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{
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FLASH_TYPE *p, *end;
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if (eeprom_size == 0) {
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cmd_stat = E_NO_FLASH;
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return ERR;
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}
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if (addr == NO_ADDR) {
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addr = FLASH_BLK4_BASE_ADDR; /* start at base address of block */
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length = eeprom_size - RESERVED_AREA_SIZE;
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} else if (length == 0)
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length = 1;
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p = (FLASH_TYPE *)addr;
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end = (FLASH_TYPE *)FLASH_TOP_ADDR;
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/* search for first non blank address starting at base address of Flash Block 2 */
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while (p != end) {
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if (*FLASH_P2V(p) != 0xff) {
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eeprom_prog_first = (ADDR)p; /* found first non blank memory cell */
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/* now find last non blank memory cell starting from top of Flash memory */
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for (p = end - 1; *FLASH_P2V(p) == 0xff; --p)
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;
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eeprom_prog_last = (ADDR)p; /* found last non blank memory cell */
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249 |
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cmd_stat = E_EEPROM_PROG;
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return ERR;
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}
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p++;
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}
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return OK;
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256 |
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}
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257 |
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258 |
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/********************************************************/
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259 |
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/* SET ALL LOCK BITS */
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260 |
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/* */
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261 |
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/* returns OK if successful; otherwise returns ERROR */
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262 |
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/* and sets cmd_stat to an error code */
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263 |
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/* The 28F640J3A is divided into 64, 128Kbyte blocks */
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264 |
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/* This routine sets a lock bit in the block specified */
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265 |
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/* by a given address */
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266 |
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/********************************************************/
|
267 |
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int set_all_lock_bits()
|
268 |
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{
|
269 |
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unsigned long addr = 0x0;
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270 |
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void *err_addr;
|
271 |
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int stat;
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272 |
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273 |
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if ((stat = flash_lock((void *)addr, 4 * FLASH_BLOCK_SIZE, (void **)&err_addr)) != 0)
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return stat;
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275 |
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276 |
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return( OK );
|
277 |
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}
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278 |
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279 |
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|
280 |
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/********************************************************/
|
281 |
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/* CLEAR ALL LOCK BITS */
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282 |
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/* */
|
283 |
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/* returns OK if successful; otherwise returns ERROR */
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284 |
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/* and sets cmd_stat to an error code */
|
285 |
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/* The 28F640J3A is divided into 64, 128Kbyte blocks */
|
286 |
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/* This routine clears all block lock bits */
|
287 |
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/********************************************************/
|
288 |
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int clear_all_lock_bits(ADDR addr)
|
289 |
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{
|
290 |
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void *err_addr;
|
291 |
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int stat;
|
292 |
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|
293 |
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if ((stat = flash_unlock((void *)0, eeprom_size, (void **)&err_addr)) != 0)
|
294 |
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return stat;
|
295 |
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return OK;
|
296 |
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}
|
297 |
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|
298 |
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|
299 |
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/********************************************************/
|
300 |
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/* ERASE EEPROM */
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301 |
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/* */
|
302 |
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/* returns OK if erase was successful, */
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303 |
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/* otherwise returns ERROR */
|
304 |
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/* and sets cmd_stat to an error code */
|
305 |
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/* */
|
306 |
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/********************************************************/
|
307 |
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int erase_eeprom(ADDR addr, unsigned long length)
|
308 |
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{
|
309 |
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void *err_addr;
|
310 |
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int num_blocks;
|
311 |
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|
312 |
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/********************************************************/
|
313 |
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/* The 28F640J3A is divided into 64, 128Kbyte blocks */
|
314 |
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/* each of which must be individually erased. */
|
315 |
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/* This routine and erases a whole number of blocks */
|
316 |
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/********************************************************/
|
317 |
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318 |
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/* don't erase boot area even if entire eeprom is specified */
|
319 |
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if (addr == NO_ADDR) {
|
320 |
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addr = FLASH_BLK4_BASE_ADDR;
|
321 |
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length = eeprom_size - RESERVED_AREA_SIZE;
|
322 |
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}
|
323 |
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|
324 |
|
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if (length == 0) {
|
325 |
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/* 10/06/00 */
|
326 |
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printf( "erase_eeprom, return OK, length=0\n");
|
327 |
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return OK;
|
328 |
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}
|
329 |
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|
330 |
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/* start address must be block-aligned */
|
331 |
|
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if ((addr % FLASH_BLOCK_SIZE) != 0) {
|
332 |
|
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cmd_stat = E_EEPROM_ADDR;
|
333 |
|
|
printf( "erase_eeprom, addr = 0x%x\n", addr);
|
334 |
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|
printf( "erase_eeprom, FLASH_BLOCK_SIZE = 0x%x\n", FLASH_BLOCK_SIZE);
|
335 |
|
|
printf( "erase_eeprom, return ERR, (addr %% FLASH_BLOCK_SIZE) = %d\n", addr % FLASH_BLOCK_SIZE);
|
336 |
|
|
|
337 |
|
|
return ERR;
|
338 |
|
|
}
|
339 |
|
|
|
340 |
|
|
/* figure out how many blocks require erasure - round up using integer division */
|
341 |
|
|
if (length % FLASH_BLOCK_SIZE) /* non-multiple, round up */
|
342 |
|
|
num_blocks = (length + FLASH_BLOCK_SIZE) / FLASH_BLOCK_SIZE;
|
343 |
|
|
else /* multiple number of blocks */
|
344 |
|
|
num_blocks = length / FLASH_BLOCK_SIZE;
|
345 |
|
|
|
346 |
|
|
if (eeprom_size == 0) {
|
347 |
|
|
cmd_stat = E_NO_FLASH;
|
348 |
|
|
return ERR;
|
349 |
|
|
}
|
350 |
|
|
|
351 |
|
|
if (flash_erase((void *)addr, num_blocks * FLASH_BLOCK_SIZE, (void **)&err_addr) != 0) {
|
352 |
|
|
cmd_stat = E_EEPROM_FAIL;
|
353 |
|
|
return ERR;
|
354 |
|
|
}
|
355 |
|
|
|
356 |
|
|
return OK;
|
357 |
|
|
}
|
358 |
|
|
|
359 |
|
|
|
360 |
|
|
/********************************************************/
|
361 |
|
|
/* WRITE EEPROM */
|
362 |
|
|
/* */
|
363 |
|
|
/* returns OK if successful; otherwise returns ERROR */
|
364 |
|
|
/* and sets cmd_stat to an error code */
|
365 |
|
|
/* */
|
366 |
|
|
/********************************************************/
|
367 |
|
|
int
|
368 |
|
|
write_eeprom(ADDR start_addr, const void *data_arg, int data_size)
|
369 |
|
|
{
|
370 |
|
|
void *err_addr;
|
371 |
|
|
|
372 |
|
|
if (flash_program((void *)start_addr, data_arg, data_size, &err_addr) != 0) {
|
373 |
|
|
cmd_stat = E_EEPROM_FAIL;
|
374 |
|
|
return ERR;
|
375 |
|
|
}
|
376 |
|
|
return OK;
|
377 |
|
|
}
|
378 |
|
|
|
379 |
|
|
|
380 |
|
|
/*****************************************************************************
|
381 |
|
|
*
|
382 |
|
|
* flash_test - System Flash ROM diagnostics
|
383 |
|
|
*
|
384 |
|
|
* A destructive Flash ROM Read/Write test. Note that the area of Flash
|
385 |
|
|
* which is tested changes based on whether the diagnostic is being invoked
|
386 |
|
|
* from the System code or from the Factory code (can't write over MON960).
|
387 |
|
|
*
|
388 |
|
|
* This test basically does a Longword Address test to the Flash area.
|
389 |
|
|
*
|
390 |
|
|
*/
|
391 |
|
|
void flash_test(MENU_ARG arg)
|
392 |
|
|
{
|
393 |
|
|
|
394 |
|
|
ADDR start_addr = (ADDR)FLASH_ADDR; /* Original */
|
395 |
|
|
|
396 |
|
|
int i;
|
397 |
|
|
unsigned long *f_ptr = (unsigned long *)FLASH_ADDR;
|
398 |
|
|
int bytes_written = 0;
|
399 |
|
|
unsigned long flash_data;
|
400 |
|
|
char answer[20];
|
401 |
|
|
|
402 |
|
|
/* 10/31/00 */
|
403 |
|
|
int status;
|
404 |
|
|
|
405 |
|
|
init_eeprom();
|
406 |
|
|
|
407 |
|
|
printf("***********************************\n");
|
408 |
|
|
printf("*** WARNING ***\n");
|
409 |
|
|
printf("*** This test is destructive to ***\n");
|
410 |
|
|
printf("*** all contents of the FLASH! ***\n");
|
411 |
|
|
printf("***********************************\n");
|
412 |
|
|
|
413 |
|
|
printf("\nDo you wish to continue? (y/n)\n");
|
414 |
|
|
sgets(answer);
|
415 |
|
|
printf("\n\n");
|
416 |
|
|
if ((answer[0] != 'y') && (answer[0] != 'Y'))
|
417 |
|
|
return;
|
418 |
|
|
|
419 |
|
|
printf ("FLASH begins at 0x%X\n", FLASH_ADDR);
|
420 |
|
|
printf ("Total FLASH size = 0x%X\n\n", eeprom_size);
|
421 |
|
|
printf ("Checking FLASH ...\n");
|
422 |
|
|
if (check_eeprom(NO_ADDR, 0) == OK)
|
423 |
|
|
printf("FLASH is erased\n\n");
|
424 |
|
|
else
|
425 |
|
|
printf("FLASH is programmed between 0x%X and 0x%X\n\n",
|
426 |
|
|
eeprom_prog_first, eeprom_prog_last);
|
427 |
|
|
|
428 |
|
|
printf ("\nClearing Block Lock Bits... \n");
|
429 |
|
|
if(clear_all_lock_bits(NO_ADDR)==OK)
|
430 |
|
|
printf("Done!\n\n");
|
431 |
|
|
else
|
432 |
|
|
printf("Error!\n\n");
|
433 |
|
|
|
434 |
|
|
printf ("Erasing FLASH...\n");
|
435 |
|
|
if (erase_eeprom(NO_ADDR, 0) != OK)
|
436 |
|
|
printf("Error on erase_eeprom()\n\n");
|
437 |
|
|
else
|
438 |
|
|
printf("Done Erasing FLASH!\n\n");
|
439 |
|
|
|
440 |
|
|
(ADDR)start_addr = (ADDR)FLASH_BLK4_BASE_ADDR;
|
441 |
|
|
|
442 |
|
|
printf ("Writing Longword Data to FLASH...\n");
|
443 |
|
|
|
444 |
|
|
/* write to all of available Flash ROM. Don't do this thousands of times
|
445 |
|
|
since the Flash has only 100,000 write cycles in its lifespan */
|
446 |
|
|
|
447 |
|
|
while (bytes_written < (eeprom_size - RESERVED_AREA_SIZE)) {
|
448 |
|
|
flash_data = (unsigned long)start_addr;
|
449 |
|
|
for (i=0; i<TEST_BUF_LONGS; i++) {
|
450 |
|
|
flash_buffer[i] = flash_data; /* put address in buffer */
|
451 |
|
|
flash_data += 4; /* increment address */
|
452 |
|
|
}
|
453 |
|
|
if (write_eeprom (start_addr, (void *)flash_buffer, TEST_BUF_CHARS) != OK) {
|
454 |
|
|
printf("Error on write_eeprom()\n");
|
455 |
|
|
goto finish;
|
456 |
|
|
}
|
457 |
|
|
start_addr = (unsigned long)start_addr + TEST_BUF_CHARS;
|
458 |
|
|
bytes_written += TEST_BUF_CHARS;
|
459 |
|
|
}
|
460 |
|
|
|
461 |
|
|
printf ("Write Complete, Verifying Data...\n");
|
462 |
|
|
bytes_written = 0;
|
463 |
|
|
|
464 |
|
|
f_ptr = (unsigned long *)FLASH_BLK4_BASE_ADDR;
|
465 |
|
|
|
466 |
|
|
while (bytes_written < (eeprom_size - RESERVED_AREA_SIZE)) {
|
467 |
|
|
if (*f_ptr != (unsigned long)f_ptr) {
|
468 |
|
|
printf ("Data verification error at 0x%X\n", (unsigned long)f_ptr);
|
469 |
|
|
printf ("Expected 0x%X Got 0x%X\n", (unsigned long)f_ptr, *f_ptr);
|
470 |
|
|
goto finish;
|
471 |
|
|
}
|
472 |
|
|
f_ptr++;
|
473 |
|
|
bytes_written += 4;
|
474 |
|
|
}
|
475 |
|
|
printf ("Done Verifying Longword Data!\n\n");
|
476 |
|
|
|
477 |
|
|
printf ("Checking FLASH...\n");
|
478 |
|
|
if (check_eeprom(NO_ADDR, 0) == OK)
|
479 |
|
|
printf("FLASH is erased\n\n");
|
480 |
|
|
else
|
481 |
|
|
printf("FLASH is programmed between 0x%X and 0x%X\n\n",
|
482 |
|
|
eeprom_prog_first, eeprom_prog_last);
|
483 |
|
|
|
484 |
|
|
printf ("Erasing FLASH...\n");
|
485 |
|
|
if (erase_eeprom(NO_ADDR, 0) != OK)
|
486 |
|
|
printf("Error on erase_eeprom()\n\n");
|
487 |
|
|
else
|
488 |
|
|
printf("Done Erasing FLASH!\n\n");
|
489 |
|
|
|
490 |
|
|
printf ("Checking FLASH...\n");
|
491 |
|
|
if (check_eeprom(NO_ADDR, 0) == OK)
|
492 |
|
|
printf("FLASH is erased\n\n");
|
493 |
|
|
else
|
494 |
|
|
printf("FLASH is programmed between 0x%X and 0x%X\n\n",
|
495 |
|
|
eeprom_prog_first, eeprom_prog_last);
|
496 |
|
|
|
497 |
|
|
/* reinitialize variables */
|
498 |
|
|
bytes_written = 0;
|
499 |
|
|
|
500 |
|
|
start_addr = (ADDR)FLASH_BLK4_BASE_ADDR;
|
501 |
|
|
f_ptr = (unsigned long *)FLASH_BLK4_BASE_ADDR;
|
502 |
|
|
|
503 |
|
|
printf ("Writing Inverted Longword Data to FLASH...\n");
|
504 |
|
|
|
505 |
|
|
/* write to all of available Flash ROM. Don't do this thousands of times
|
506 |
|
|
since the Flash has only 100,000 write cycles in its lifespan */
|
507 |
|
|
|
508 |
|
|
while (bytes_written < (eeprom_size - RESERVED_AREA_SIZE)) {
|
509 |
|
|
flash_data = (unsigned long)start_addr;
|
510 |
|
|
for (i=0; i<TEST_BUF_LONGS; i++) {
|
511 |
|
|
flash_buffer[i] = ~flash_data; /* put address BAR in buffer */
|
512 |
|
|
flash_data += 4; /* increment address */
|
513 |
|
|
}
|
514 |
|
|
if (write_eeprom (start_addr, (void *)flash_buffer, TEST_BUF_CHARS) != OK) {
|
515 |
|
|
printf("Error on write_eeprom()\n");
|
516 |
|
|
goto finish;
|
517 |
|
|
}
|
518 |
|
|
start_addr = (unsigned long)start_addr + TEST_BUF_CHARS;
|
519 |
|
|
bytes_written += TEST_BUF_CHARS;
|
520 |
|
|
}
|
521 |
|
|
|
522 |
|
|
printf ("Write Complete, Verifying Data...\n");
|
523 |
|
|
bytes_written = 0;
|
524 |
|
|
|
525 |
|
|
while (bytes_written < (eeprom_size - RESERVED_AREA_SIZE)) {
|
526 |
|
|
if (*f_ptr != (~(unsigned long)f_ptr)) {
|
527 |
|
|
printf ("Data verification error at 0x%X\n", (unsigned long)f_ptr);
|
528 |
|
|
printf ("Expected 0x%X Got 0x%X\n", (~(unsigned long)f_ptr), *f_ptr);
|
529 |
|
|
goto finish;
|
530 |
|
|
}
|
531 |
|
|
f_ptr++;
|
532 |
|
|
bytes_written += 4;
|
533 |
|
|
}
|
534 |
|
|
printf ("Done Verifying Inverted Longword Data!\n\n");
|
535 |
|
|
|
536 |
|
|
|
537 |
|
|
printf ("Checking FLASH...\n");
|
538 |
|
|
if (check_eeprom(NO_ADDR, 0) == OK)
|
539 |
|
|
printf("FLASH is erased\n\n");
|
540 |
|
|
else {
|
541 |
|
|
printf("FLASH is programmed between 0x%X and 0x%X\n\n",
|
542 |
|
|
eeprom_prog_first, eeprom_prog_last);
|
543 |
|
|
}
|
544 |
|
|
|
545 |
|
|
printf ("Erasing FLASH...\n");
|
546 |
|
|
if (erase_eeprom(NO_ADDR, 0) != OK)
|
547 |
|
|
printf("Error on erase_eeprom()\n\n");
|
548 |
|
|
else
|
549 |
|
|
printf("Done Erasing FLASH!\n\n");
|
550 |
|
|
|
551 |
|
|
printf ("Checking FLASH...\n");
|
552 |
|
|
if (check_eeprom(NO_ADDR, 0) == OK)
|
553 |
|
|
printf("FLASH is erased\n\n");
|
554 |
|
|
else
|
555 |
|
|
printf("FLASH is programmed between 0x%X and 0x%X\n\n",
|
556 |
|
|
eeprom_prog_first, eeprom_prog_last);
|
557 |
|
|
|
558 |
|
|
/* 11/02/00 */
|
559 |
|
|
printf ("Setting Lock Bits for Blocks 0-3... \n");
|
560 |
|
|
if( (status = set_all_lock_bits() ) == OK )
|
561 |
|
|
printf("Done!\n");
|
562 |
|
|
else
|
563 |
|
|
printf("Error! status =0x%x\n", status);
|
564 |
|
|
|
565 |
|
|
finish:
|
566 |
|
|
_flushICache();
|
567 |
|
|
|
568 |
|
|
printf ("\nHit <CR> to Continue...\n");
|
569 |
|
|
(void)hexIn();
|
570 |
|
|
return;
|
571 |
|
|
}
|
572 |
|
|
|
573 |
|
|
#endif // CYGPKG_IO_FLASH
|