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//=============================================================================
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//
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// i557_eep.c - Cyclone Diagnostics
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//
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//=============================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): Scott Coulter, Jeff Frazier, Eric Breeden
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// Contributors:
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// Date: 2001-01-25
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// Purpose:
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// Description:
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//
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//####DESCRIPTIONEND####
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//
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//===========================================================================*/
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#include "i557_eep.h"
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/*****************************************************************************
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*
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* Serial EEPROM Access code for the i557/558
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*
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* Revision History:
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* -----------------
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*
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*
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* 05jun98, snc Added setup time for eeprom CS. Changed eeprom_delay to use the
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* processor's internal timer. Fixed programming algorithm to poll
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* the eeprom's DO line to look for the transition from BUSY to READY
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* which indicates that the programming operation has completed.
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* 03jun98, snc Added setup time delay on data writes (delay before asserting
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* a rising edge on the SK. Fixed eeprom_get_word() to explicitly
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* clear a bit position in the buffer after reading a low on the
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* data lines.
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* 23oct96, snc Ported to the PCI914
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*
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*/
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/*
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* Timing information. According to the National Semiconductor manual,
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* the SK High Minimum time = SK Low Minimum time = 250 nsec. However,
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* the minimum SK cycle time is 1 usec, so a 250 nsec high/750 nsec. low
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* sequence or equivalent would be required.
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*/
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/* Serial clock line */
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#define SK_LOW_PERIOD 500 /* nsec, Time serial clock is low */
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#define SK_HIGH_PERIOD 500 /* nsec, Time serial clock is high */
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/* Serial data line */
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#define DATA_IN_HOLD_TIME 20 /* nsec, SK low to EEDI change */
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#define DATA_IN_SETUP_TIME 100 /* nsec, EEDI change to SK high */
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/* Serial clock and data line states (assumes ports are non-inverting) */
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#define HIGH 1
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#define LOW 0
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/* Select setup time to rising edge of SK */
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#define SELECT_SETUP_TIME 50 /* nsec */
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/* De-select time between consecutive commands */
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#define DESELECT_TIME 100 /* nsec */
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/* local functions */
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static void set_sda_line (unsigned long pci_base, /* PCI Base address */
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int state); /* HIGH or LOW */
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static int get_sda_line (unsigned long pci_base); /* PCI Base address */
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static void set_scl_line (unsigned long pci_base, /* PCI Base address */
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int state); /* HIGH or LOW */
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void eeprom_delay (int nsec);
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static int eeprom_send_start (unsigned long pci_base, int command);
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static int eeprom_send_addr (unsigned long pci_base,
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unsigned char eeprom_addr);
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static int eeprom_get_word (unsigned long pci_base,
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unsigned short *word_addr);
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static int eeprom_put_word (unsigned long pci_base,
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unsigned short data);
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static int eeprom_write_enable(unsigned long pci_base);
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static int eeprom_write_disable(unsigned long pci_base);
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/* global variables */
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int powerup_wait_done = 0; /* set true after power-up wait done */
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/*-------------------------------------------------------------
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* Function: int eeprom_read ()
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*
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* Action: Read data from the eeprom, place it at p_data
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*
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* Returns: OK if read worked, EEPROM_NOT_RESPONDING if
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* read fails.
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*-------------------------------------------------------------*/
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int eeprom_read (unsigned long pci_base,/* PCI Base address */
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int eeprom_addr, /* word offset from start of eeprom */
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unsigned short *p_data,/* where to put data in memory */
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int nwords /* number of 16bit words to read */
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)
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{
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int status; /* result code */
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int i; /* loop variable */
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/*
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* Make sure caller isn't requesting a read beyond the end of the
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* eeprom.
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*/
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if ((eeprom_addr + nwords) > EEPROM_WORD_SIZE)
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return (EEPROM_TO_SMALL);
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/* Read in desired number of words */
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for (i = 0; i < nwords; i++, eeprom_addr++) {
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/* Select the serial EEPROM */
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SELECT_557_EEP(pci_base);
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/* Wait CS setup time */
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eeprom_delay (SELECT_SETUP_TIME);
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/* Send start/read command to begin the read */
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if (((status = eeprom_send_start (pci_base, EEPROM_READ)) != OK) ||
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/* Send address */
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((status = eeprom_send_addr (pci_base, eeprom_addr)) != OK))
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return (status);
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if ((status = eeprom_get_word (pci_base, p_data++)) != OK)
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return (status);
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/* De-Select the serial EEPROM */
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DESELECT_557_EEP(pci_base);
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/* wait the required de-select time between commands */
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eeprom_delay (DESELECT_TIME);
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}
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return (OK);
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}
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/*-------------------------------------------------------------
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* Function: int eeprom_write ()
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*
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* Action: Write data from p_data to the eeprom
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*
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* Returns: OK if write worked, EEPROM_NOT_RESPONDING if
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* write failed.
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*-------------------------------------------------------------*/
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int eeprom_write (unsigned long pci_base,/* PCI Base address */
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int eeprom_addr, /* word offset from start of eeprom */
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unsigned short *p_data,/* data source in memory */
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int nwords /* number of 16bit words to read */
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)
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{
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int status; /* result code */
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int i; /* loop variable */
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int check_cntr;
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unsigned short data;
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/*
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* Make sure caller isn't requesting a read beyond the end of the
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* eeprom.
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*/
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if ((eeprom_addr + nwords) > EEPROM_WORD_SIZE)
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return (EEPROM_TO_SMALL);
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/* enable eeprom writes */
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if ((status = eeprom_write_enable(pci_base)) != OK)
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return(status);
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/* Read in desired number of words */
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for (i = 0; i < nwords; i++, eeprom_addr++) {
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/* Select the serial EEPROM */
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SELECT_557_EEP(pci_base);
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/* Wait CS setup time */
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eeprom_delay (SELECT_SETUP_TIME);
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/* Send start/write command to begin the read */
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if (((status = eeprom_send_start (pci_base, EEPROM_WRITE)) != OK) ||
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/* Send address */
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((status = eeprom_send_addr (pci_base, eeprom_addr)) != OK))
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return (status);
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data = *p_data++;
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if ((status = eeprom_put_word (pci_base, data)) != OK)
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return (status);
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/* De-Select the serial EEPROM */
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DESELECT_557_EEP(pci_base);
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/* wait the required de-select time between commands */
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eeprom_delay (DESELECT_TIME);
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/* Re-Select the serial EEPROM */
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SELECT_557_EEP(pci_base);
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/* now that the write command/data have been clocked into the EEPROM
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we must wait for the BUSY indicator (DO driven low) to indicate
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READY (DO driven high) */
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check_cntr = 0;
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while (1) {
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check_cntr++;
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if (get_sda_line (pci_base) == HIGH) break; /* programming complete */
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if (check_cntr > 100000) { /* timeout */
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/* De-Select the serial EEPROM */
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DESELECT_557_EEP(pci_base);
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/* wait the required de-select time between commands */
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eeprom_delay (DESELECT_TIME);
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return (EEPROM_ERROR);
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}
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}
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/* De-Select the serial EEPROM */
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DESELECT_557_EEP(pci_base);
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/* wait the required de-select time between commands */
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eeprom_delay (DESELECT_TIME);
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}
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/* disable eeprom writes */
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if ((status = eeprom_write_disable(pci_base)) != OK)
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return(status);
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263 |
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return (OK);
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}
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266 |
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/*-------------------------------------------------------------
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267 |
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* Function: int eeprom_write_enable ()
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*
|
269 |
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* Action: Enable writes to the eeprom
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*
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271 |
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* Returns: OK if command sent, EEPROM_NOT_RESPONDING if not.
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272 |
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*
|
273 |
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*-------------------------------------------------------------*/
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274 |
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int eeprom_write_enable (unsigned long pci_base)
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{
|
276 |
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int status; /* result code */
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277 |
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|
278 |
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/* Select the serial EEPROM */
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279 |
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SELECT_557_EEP(pci_base);
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280 |
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|
281 |
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/* Wait CS setup time */
|
282 |
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eeprom_delay (SELECT_SETUP_TIME);
|
283 |
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|
284 |
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/* Send start/write enable command */
|
285 |
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if (((status = eeprom_send_start (pci_base, EEPROM_EWEN)) != OK) ||
|
286 |
|
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/* Send address */
|
287 |
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((status = eeprom_send_addr (pci_base, EEPROM_EWEN_OP)) != OK))
|
288 |
|
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return (status);
|
289 |
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|
290 |
|
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/* De-Select the serial EEPROM */
|
291 |
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DESELECT_557_EEP(pci_base);
|
292 |
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|
293 |
|
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/* wait the required de-select time between commands */
|
294 |
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eeprom_delay (DESELECT_TIME);
|
295 |
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|
296 |
|
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return (OK);
|
297 |
|
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}
|
298 |
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|
299 |
|
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/*-------------------------------------------------------------
|
300 |
|
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* Function: int eeprom_write_disable ()
|
301 |
|
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*
|
302 |
|
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* Action: Disable writes to the eeprom
|
303 |
|
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*
|
304 |
|
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* Returns: OK if command sent, EEPROM_NOT_RESPONDING if not.
|
305 |
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*
|
306 |
|
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*-------------------------------------------------------------*/
|
307 |
|
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int eeprom_write_disable (unsigned long pci_base)
|
308 |
|
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{
|
309 |
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int status; /* result code */
|
310 |
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|
311 |
|
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/* Select the serial EEPROM */
|
312 |
|
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SELECT_557_EEP(pci_base);
|
313 |
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|
314 |
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/* Wait CS setup time */
|
315 |
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eeprom_delay (SELECT_SETUP_TIME);
|
316 |
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|
317 |
|
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/* Send start/write enable command */
|
318 |
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if (((status = eeprom_send_start (pci_base, EEPROM_EWDS)) != OK) ||
|
319 |
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/* Send address */
|
320 |
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((status = eeprom_send_addr (pci_base, EEPROM_EWDS_OP)) != OK))
|
321 |
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return (status);
|
322 |
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|
323 |
|
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/* De-Select the serial EEPROM */
|
324 |
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DESELECT_557_EEP(pci_base);
|
325 |
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|
326 |
|
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/* wait the required de-select time between commands */
|
327 |
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eeprom_delay (DESELECT_TIME);
|
328 |
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|
329 |
|
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return (OK);
|
330 |
|
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}
|
331 |
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|
332 |
|
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|
333 |
|
|
/******************************************************************************
|
334 |
|
|
*
|
335 |
|
|
* eeprom_delay - delay for a specified number of nanoseconds
|
336 |
|
|
*
|
337 |
|
|
* Note: this routine is a generous approximation as delays for eeproms
|
338 |
|
|
* are specified as minimums.
|
339 |
|
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*/
|
340 |
|
|
void eeprom_delay (int nsec)
|
341 |
|
|
{
|
342 |
|
|
extern void polled_delay (int usec);
|
343 |
|
|
|
344 |
|
|
/* generously delay 1 usec. for each nsec. */
|
345 |
|
|
polled_delay (nsec);
|
346 |
|
|
}
|
347 |
|
|
|
348 |
|
|
/******************************************************************************
|
349 |
|
|
*
|
350 |
|
|
* eeprom_send_start - send a start bit with a read opcode to the '557 serial
|
351 |
|
|
* eeprom
|
352 |
|
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*
|
353 |
|
|
*/
|
354 |
|
|
static int eeprom_send_start (unsigned long pci_base, int command)
|
355 |
|
|
{
|
356 |
|
|
int op_code[2];
|
357 |
|
|
|
358 |
|
|
switch (command) {
|
359 |
|
|
case EEPROM_WRITE:
|
360 |
|
|
op_code[0] = LOW;
|
361 |
|
|
op_code[1] = HIGH;
|
362 |
|
|
break;
|
363 |
|
|
|
364 |
|
|
case EEPROM_READ:
|
365 |
|
|
op_code[0] = HIGH;
|
366 |
|
|
op_code[1] = LOW;
|
367 |
|
|
break;
|
368 |
|
|
|
369 |
|
|
case EEPROM_ERASE:
|
370 |
|
|
op_code[0] = HIGH;
|
371 |
|
|
op_code[1] = HIGH;
|
372 |
|
|
break;
|
373 |
|
|
|
374 |
|
|
case EEPROM_EWEN:
|
375 |
|
|
case EEPROM_EWDS:
|
376 |
|
|
op_code[0] = LOW;
|
377 |
|
|
op_code[1] = LOW;
|
378 |
|
|
break;
|
379 |
|
|
|
380 |
|
|
default:
|
381 |
|
|
return(EEPROM_INVALID_CMD);
|
382 |
|
|
}
|
383 |
|
|
|
384 |
|
|
set_scl_line (pci_base, LOW);
|
385 |
|
|
set_sda_line (pci_base, HIGH); /* start bit */
|
386 |
|
|
eeprom_delay (DATA_IN_SETUP_TIME);
|
387 |
|
|
set_scl_line (pci_base, HIGH); /* clock high */
|
388 |
|
|
eeprom_delay (SK_HIGH_PERIOD);
|
389 |
|
|
set_scl_line (pci_base, LOW); /* clock low */
|
390 |
|
|
eeprom_delay (SK_LOW_PERIOD);
|
391 |
|
|
|
392 |
|
|
/* send the opcode */
|
393 |
|
|
set_sda_line (pci_base, op_code[0]); /* MSB of opcode */
|
394 |
|
|
eeprom_delay (DATA_IN_SETUP_TIME);
|
395 |
|
|
set_scl_line (pci_base, HIGH); /* clock high */
|
396 |
|
|
eeprom_delay (SK_HIGH_PERIOD);
|
397 |
|
|
set_scl_line (pci_base, LOW); /* clock low */
|
398 |
|
|
eeprom_delay (SK_LOW_PERIOD);
|
399 |
|
|
set_sda_line (pci_base, op_code[1]); /* LSB of opcode */
|
400 |
|
|
eeprom_delay (DATA_IN_SETUP_TIME);
|
401 |
|
|
set_scl_line (pci_base, HIGH); /* clock high */
|
402 |
|
|
eeprom_delay (SK_HIGH_PERIOD);
|
403 |
|
|
set_scl_line (pci_base, LOW); /* clock low */
|
404 |
|
|
eeprom_delay (SK_LOW_PERIOD);
|
405 |
|
|
|
406 |
|
|
return (OK);
|
407 |
|
|
}
|
408 |
|
|
|
409 |
|
|
/******************************************************************************
|
410 |
|
|
*
|
411 |
|
|
* eeprom_send_addr - send the read address to the '557 serial eeprom
|
412 |
|
|
*
|
413 |
|
|
*/
|
414 |
|
|
static int eeprom_send_addr (unsigned long pci_base,
|
415 |
|
|
unsigned char eeprom_addr)
|
416 |
|
|
{
|
417 |
|
|
register int i;
|
418 |
|
|
|
419 |
|
|
/* Do each address bit, MSB => LSB - after each address bit is
|
420 |
|
|
sent, read the EEDO bit on the '557 to check for the "dummy 0 bit"
|
421 |
|
|
which when set to 0, indicates that the address field is complete */
|
422 |
|
|
for (i = 5; i >= 0; i--) {
|
423 |
|
|
/* If this bit is a 1, set SDA high. If 0, set it low */
|
424 |
|
|
if (eeprom_addr & (1 << i))
|
425 |
|
|
set_sda_line (pci_base, HIGH);
|
426 |
|
|
else
|
427 |
|
|
set_sda_line (pci_base, LOW);
|
428 |
|
|
|
429 |
|
|
eeprom_delay (DATA_IN_SETUP_TIME); /* Data setup before raising clock */
|
430 |
|
|
set_scl_line (pci_base, HIGH); /* Clock in this data bit */
|
431 |
|
|
eeprom_delay (SK_HIGH_PERIOD);
|
432 |
|
|
set_scl_line (pci_base, LOW); /* Prepare for next bit */
|
433 |
|
|
eeprom_delay (SK_LOW_PERIOD);
|
434 |
|
|
|
435 |
|
|
/* check to see if "dummy 0 bit" is set to 0 indicating address
|
436 |
|
|
complete */
|
437 |
|
|
if (get_sda_line (pci_base) == LOW)
|
438 |
|
|
break; /* address complete */
|
439 |
|
|
}
|
440 |
|
|
return (OK);
|
441 |
|
|
}
|
442 |
|
|
|
443 |
|
|
/******************************************************************************
|
444 |
|
|
*
|
445 |
|
|
* eeprom_get_word - read a 16 bit word from the '557 serial eeprom
|
446 |
|
|
*
|
447 |
|
|
* Note: this routine assumes that the start/opcode/address have already
|
448 |
|
|
* been set up
|
449 |
|
|
*/
|
450 |
|
|
static int eeprom_get_word (unsigned long pci_base,
|
451 |
|
|
unsigned short *word_addr)
|
452 |
|
|
{
|
453 |
|
|
register int i;
|
454 |
|
|
|
455 |
|
|
/* Do each data bit, MSB => LSB */
|
456 |
|
|
for (i = 15; i >= 0; i--) {
|
457 |
|
|
set_scl_line (pci_base, HIGH);
|
458 |
|
|
eeprom_delay (SK_HIGH_PERIOD);
|
459 |
|
|
|
460 |
|
|
if (get_sda_line (pci_base) == HIGH)
|
461 |
|
|
*word_addr |= (1 << i); /* store bit as a '1' */
|
462 |
|
|
else
|
463 |
|
|
*word_addr &= ~(1 << i); /* store bit as a '0' */
|
464 |
|
|
|
465 |
|
|
set_scl_line (pci_base, LOW);
|
466 |
|
|
eeprom_delay (SK_LOW_PERIOD);
|
467 |
|
|
}
|
468 |
|
|
return (OK);
|
469 |
|
|
}
|
470 |
|
|
|
471 |
|
|
/******************************************************************************
|
472 |
|
|
*
|
473 |
|
|
* eeprom_put_word - write a 16 bit word to the '557 serial eeprom
|
474 |
|
|
*
|
475 |
|
|
* Note: this routine assumes that the start/opcode/address have already
|
476 |
|
|
* been set up
|
477 |
|
|
*/
|
478 |
|
|
static int eeprom_put_word (unsigned long pci_base,
|
479 |
|
|
unsigned short data)
|
480 |
|
|
{
|
481 |
|
|
register int i;
|
482 |
|
|
|
483 |
|
|
/* Do each data bit, MSB => LSB */
|
484 |
|
|
for (i = 15; i >= 0; i--) {
|
485 |
|
|
if (data & (1 << i))
|
486 |
|
|
set_sda_line(pci_base, HIGH);
|
487 |
|
|
else
|
488 |
|
|
set_sda_line(pci_base, LOW);
|
489 |
|
|
|
490 |
|
|
eeprom_delay (DATA_IN_SETUP_TIME);
|
491 |
|
|
set_scl_line (pci_base, HIGH);
|
492 |
|
|
eeprom_delay (SK_HIGH_PERIOD);
|
493 |
|
|
set_scl_line (pci_base, LOW);
|
494 |
|
|
eeprom_delay (SK_LOW_PERIOD);
|
495 |
|
|
}
|
496 |
|
|
return (OK);
|
497 |
|
|
}
|
498 |
|
|
|
499 |
|
|
/*-------------------------------------------------------------
|
500 |
|
|
* Function: void set_scl_line ()
|
501 |
|
|
*
|
502 |
|
|
* Action: Sets the value of the eeprom's serial clock line
|
503 |
|
|
* to the value HIGH or LOW.
|
504 |
|
|
*
|
505 |
|
|
* Returns: N/A.
|
506 |
|
|
*-------------------------------------------------------------*/
|
507 |
|
|
static void set_scl_line (unsigned long pci_base, /* PCI address */
|
508 |
|
|
int state) /* HIGH or LOW */
|
509 |
|
|
{
|
510 |
|
|
if (state == HIGH)
|
511 |
|
|
SK_HIGH_557_EEP (pci_base);
|
512 |
|
|
else if (state == LOW)
|
513 |
|
|
SK_LOW_557_EEP (pci_base);
|
514 |
|
|
}
|
515 |
|
|
|
516 |
|
|
/*-------------------------------------------------------------
|
517 |
|
|
* Function: void set_sda_line ()
|
518 |
|
|
*
|
519 |
|
|
* Action: Sets the value of the eeprom's serial data line
|
520 |
|
|
* to the value HIGH or LOW.
|
521 |
|
|
*
|
522 |
|
|
* Returns: N/A.
|
523 |
|
|
*-------------------------------------------------------------*/
|
524 |
|
|
static void set_sda_line (unsigned long pci_base, /* PCI address */
|
525 |
|
|
int state) /* HIGH or LOW */
|
526 |
|
|
{
|
527 |
|
|
if (state == HIGH)
|
528 |
|
|
EEDI_HIGH_557_EEP (pci_base);
|
529 |
|
|
else if (state == LOW)
|
530 |
|
|
EEDI_LOW_557_EEP (pci_base);
|
531 |
|
|
}
|
532 |
|
|
|
533 |
|
|
/*-------------------------------------------------------------
|
534 |
|
|
* Function: int get_sda_line ()
|
535 |
|
|
*
|
536 |
|
|
* Action: Returns the value of the eeprom's serial data line
|
537 |
|
|
*
|
538 |
|
|
* Returns: HIGH or LOW.
|
539 |
|
|
*-------------------------------------------------------------*/
|
540 |
|
|
static int get_sda_line (unsigned long pci_base) /* PCI address */
|
541 |
|
|
{
|
542 |
|
|
int ret_val; /* result code */
|
543 |
|
|
|
544 |
|
|
if (EEDO_557_EEP (pci_base))
|
545 |
|
|
ret_val = HIGH;
|
546 |
|
|
else
|
547 |
|
|
ret_val = LOW;
|
548 |
|
|
|
549 |
|
|
return (ret_val);
|
550 |
|
|
}
|