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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [arm/] [xscale/] [npwr/] [v2_0/] [include/] [pkgconf/] [mlt_arm_xscale_npwr_rom.h] - Blame information for rev 174

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Line No. Rev Author Line
1 27 unneback
// eCos memory layout - Tue Sep 05 18:46:49 2000
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// This is a generated file - do not edit
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#ifndef __ASSEMBLER__
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#include <cyg/infra/cyg_type.h>
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#include <stddef.h>
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#endif
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#define CYGMEM_REGION_ram (0xA0000000)
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#define CYGMEM_REGION_ram_SIZE (0x2000000)
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#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
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#define CYGMEM_REGION_rom (0x00000000)
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#define CYGMEM_REGION_rom_SIZE (0x800000)
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#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
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#ifndef __ASSEMBLER__
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extern char CYG_LABEL_NAME (__heap1) [];
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#endif
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#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
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#define CYGMEM_SECTION_heap1_SIZE (0xa2000000 - (size_t) CYG_LABEL_NAME (__heap1))
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#ifndef __ASSEMBLER__
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extern char CYG_LABEL_NAME (__pci_window) [];
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#endif
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// #define CYGMEM_SECTION_pci_window (CYG_LABEL_NAME (__pci_window))
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// #define CYGMEM_SECTION_pci_window_SIZE (0x100000)

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