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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [arm/] [xscale/] [verde/] [v2_0/] [include/] [hal_var_ints.h] - Blame information for rev 773

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#ifndef CYGONCE_HAL_VAR_INTS_H
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#define CYGONCE_HAL_VAR_INTS_H
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//==========================================================================
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//
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//      hal_var_ints.h
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//
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//      HAL Interrupt and clock support
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    msalter
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// Contributors: msalter
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// Date:         2001-12-03
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// Purpose:      Define Interrupt support
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// Description:  The interrupt details for XScale CPUs are defined here.
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// Usage:
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//               #include <pkgconf/system.h>
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//               #include CYGBLD_HAL_VARIANT_H
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//               #include CYGBLD_HAL_VAR_INTS_H
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//
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//               ...
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//              
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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#include <cyg/hal/hal_verde.h>         // registers
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//
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// Values for the vector argument of cyg_drv_interrupt_create() and
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// other interrupt related interfaces.
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//
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#define CYGNUM_HAL_INTERRUPT_NONE         -1
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#define CYGNUM_HAL_INTERRUPT_DMA0_EOT      0
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#define CYGNUM_HAL_INTERRUPT_DMA0_EOC      1
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#define CYGNUM_HAL_INTERRUPT_DMA1_EOT      2
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#define CYGNUM_HAL_INTERRUPT_DMA1_EOC      3
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#define CYGNUM_HAL_INTERRUPT_RSVD_4        4
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#define CYGNUM_HAL_INTERRUPT_RSVD_5        5
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#define CYGNUM_HAL_INTERRUPT_AA_EOT        6
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#define CYGNUM_HAL_INTERRUPT_AA_EOC        7
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#define CYGNUM_HAL_INTERRUPT_CORE_PMON     8
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#define CYGNUM_HAL_INTERRUPT_TIMER0        9
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#define CYGNUM_HAL_INTERRUPT_TIMER1        10
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#define CYGNUM_HAL_INTERRUPT_I2C_0         11
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#define CYGNUM_HAL_INTERRUPT_I2C_1         12
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#define CYGNUM_HAL_INTERRUPT_MESSAGING     13
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#define CYGNUM_HAL_INTERRUPT_ATU_BIST      14
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#define CYGNUM_HAL_INTERRUPT_PERFMON       15
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#define CYGNUM_HAL_INTERRUPT_CORE_PMU      16
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#define CYGNUM_HAL_INTERRUPT_BIU_ERR       17
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#define CYGNUM_HAL_INTERRUPT_ATU_ERR       18
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#define CYGNUM_HAL_INTERRUPT_MCU_ERR       19
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#define CYGNUM_HAL_INTERRUPT_DMA0_ERR      20
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#define CYGNUM_HAL_INTERRUPT_DMA1_ERR      21
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#define CYGNUM_HAL_INTERRUPT_RSVD_22       22
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#define CYGNUM_HAL_INTERRUPT_AA_ERR        23
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#define CYGNUM_HAL_INTERRUPT_MSG_ERR       24
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#define CYGNUM_HAL_INTERRUPT_SSP           25
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#define CYGNUM_HAL_INTERRUPT_MSG_IBPQ      26
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#define CYGNUM_HAL_INTERRUPT_XINT0         27
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#define CYGNUM_HAL_INTERRUPT_XINT1         28
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#define CYGNUM_HAL_INTERRUPT_XINT2         29
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#define CYGNUM_HAL_INTERRUPT_XINT3         30
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#define CYGNUM_HAL_INTERRUPT_HPI           31
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#define CYGNUM_HAL_VAR_ISR_MAX  31
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#define CYGNUM_HAL_ISR_MIN      0
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#define CYGNUM_HAL_ISR_MAX      31
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#define CYGNUM_HAL_ISR_COUNT    (CYGNUM_HAL_ISR_MAX+1)
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#define CYGNUM_HAL_INTERRUPT_RTC  CYGNUM_HAL_INTERRUPT_TIMER0
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#endif // CYGONCE_HAL_VAR_INTS_H
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// ------------------------------------------------------------------------
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// Dynamically set the timer interrupt rate.
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// Not for application use at all.
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externC void
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hal_clock_reinitialize(          int *pfreq,    /* inout */
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                        unsigned int *pperiod,  /* inout */
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                        unsigned int old_hz );  /* in */
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#define HAL_CLOCK_REINITIALIZE( _freq, _period, _old_hz ) \
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        hal_clock_reinitialize( &_freq, &_period, _old_hz )
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//----------------------------------------------------------------------------
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// Reset.
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#define HAL_PLATFORM_RESET()                                               \
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    CYG_MACRO_START                                                        \
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    cyg_uint32 ctrl;                                                       \
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                                                                           \
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    /* By disabling interupts we will just hang in the loop below      */  \
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    /* if for some reason the software reset fails.                    */  \
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    HAL_DISABLE_INTERRUPTS(ctrl);                                          \
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                                                                           \
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    *ATU_PCSR = PCSR_RESET_I_BUS | PCSR_RESET_P_BUS;                       \
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                                                                           \
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    for(;;); /* hang here forever if reset fails */                        \
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    CYG_MACRO_END
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// Fallback (never really used)
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#define HAL_PLATFORM_RESET_ENTRY 0x00000000
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// EOF hal_var_ints.h

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