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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [calmrisc16/] [ceb/] [v2_0/] [src/] [ser.c] - Blame information for rev 174

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//=============================================================================
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//
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//      ser.c
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//
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//      Simple driver for the MDSChip serial port
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//
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//=============================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):   msalter
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// Contributors:msalter
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// Date:        2001-02-12
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// Description: Simple driver for the MDSChip serial port
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//
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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#include <pkgconf/hal.h>
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#include <pkgconf/system.h>
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#include CYGBLD_HAL_PLATFORM_H
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#include <cyg/hal/hal_arch.h>           // SAVE/RESTORE GP macros
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#include <cyg/hal/hal_io.h>             // IO macros
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#include <cyg/hal/hal_if.h>             // interface API
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#include <cyg/hal/hal_intr.h>           // HAL_ENABLE/MASK/UNMASK_INTERRUPTS
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#include <cyg/hal/hal_misc.h>           // Helper functions
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#include <cyg/hal/drv_api.h>            // CYG_ISR_HANDLED
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// We have no control over baud rate
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#if CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD==57600
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#define CYG_DEV_SERIAL_BAUD_DIVISOR    BAUD_57600
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#endif
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#ifndef CYG_DEV_SERIAL_BAUD_DIVISOR
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#error Missing/incorrect serial baud rate defined - CDL error?
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#endif
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//-----------------------------------------------------------------------------
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typedef struct {
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    cyg_uint8* base;
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    cyg_int32 msec_timeout;
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    int isr_vector;
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} channel_data_t;
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static channel_data_t channels[1] = {
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    { (cyg_uint8*)0, 1000, 0}
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};
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//-----------------------------------------------------------------------------
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// The minimal init, get and put functions. All by polling.
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void
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cyg_hal_plf_serial_init_channel(void* __ch_data)
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{
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    cyg_hal_plf_write_sr_rbr(0);
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    cyg_hal_plf_write_sr_tbr(0);
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    cyg_hal_plf_write_tbr(0);
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    cyg_hal_plf_write_rbr(0);
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}
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void
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cyg_hal_plf_serial_putc(void* __ch_data, cyg_uint8 __ch)
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{
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    // wait for tx rdy
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    while (cyg_hal_plf_read_sr_tbr() != 0) ;
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    // Now, write it
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    cyg_hal_plf_write_tbr(__ch);
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    // and set TBR
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    cyg_hal_plf_write_sr_tbr(1);
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}
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static cyg_bool
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cyg_hal_plf_serial_getc_nonblock(void* __ch_data, cyg_uint8* ch)
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{
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    if (cyg_hal_plf_read_sr_rbr() == 0)
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        return false;
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    *ch = cyg_hal_plf_read_rbr();
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    cyg_hal_plf_write_sr_rbr(0);
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    return true;
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}
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cyg_uint8
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cyg_hal_plf_serial_getc(void* __ch_data)
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{
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    cyg_uint8 ch;
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    while(!cyg_hal_plf_serial_getc_nonblock(__ch_data, &ch));
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    return ch;
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}
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static void
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cyg_hal_plf_serial_write(void* __ch_data, const cyg_uint8* __buf,
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                         cyg_uint32 __len)
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{
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    while(__len-- > 0)
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        cyg_hal_plf_serial_putc(__ch_data, *__buf++);
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}
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static void
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cyg_hal_plf_serial_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len)
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{
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    while(__len-- > 0)
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        *__buf++ = cyg_hal_plf_serial_getc(__ch_data);
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}
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cyg_bool
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cyg_hal_plf_serial_getc_timeout(void* __ch_data, cyg_uint8* ch)
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{
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    int delay_count;
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    channel_data_t* chan;
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    cyg_bool res;
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    // Some of the diagnostic print code calls through here with no idea what the ch_data is.
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    // Go ahead and assume it is channels[0].
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    if (__ch_data == 0)
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      __ch_data = (void*)&channels[0];
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    chan = (channel_data_t*)__ch_data;
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    delay_count = chan->msec_timeout * 10; // delay in .1 ms steps
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    for(;;) {
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        res = cyg_hal_plf_serial_getc_nonblock(__ch_data, ch);
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        if (res || 0 == delay_count--)
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            break;
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        CYGACC_CALL_IF_DELAY_US(100);
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    }
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    return res;
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}
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static int
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cyg_hal_plf_serial_control(void *__ch_data, __comm_control_cmd_t __func, ...)
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{
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    static int irq_state = 0;
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    channel_data_t* chan;
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    int ret = 0;
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    // Some of the diagnostic print code calls through here with no idea what the ch_data is.
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    // Go ahead and assume it is channels[0].
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    if (__ch_data == 0)
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      __ch_data = (void*)&channels[0];
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    chan = (channel_data_t*)__ch_data;
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    switch (__func) {
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    case __COMMCTL_IRQ_ENABLE:
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        irq_state = 1;
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        HAL_INTERRUPT_SET_LEVEL(chan->isr_vector, 1);
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        HAL_INTERRUPT_UNMASK(chan->isr_vector);
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        break;
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    case __COMMCTL_IRQ_DISABLE:
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        ret = irq_state;
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        irq_state = 0;
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        HAL_INTERRUPT_MASK(chan->isr_vector);
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        break;
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    case __COMMCTL_DBG_ISR_VECTOR:
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        ret = chan->isr_vector;
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        break;
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    case __COMMCTL_SET_TIMEOUT:
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    {
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        va_list ap;
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        va_start(ap, __func);
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        ret = chan->msec_timeout;
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        chan->msec_timeout = va_arg(ap, cyg_uint32);
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        va_end(ap);
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    }
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    break;
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    case __COMMCTL_SETBAUD:
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    {
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        cyg_uint32 baud_rate;
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        va_list ap;
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        va_start(ap, __func);
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        baud_rate = va_arg(ap, cyg_uint32);
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        va_end(ap);
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        switch (baud_rate)
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        {
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        case 57600:  break;
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        default:     return -1;
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        }
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    }
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    break;
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    case __COMMCTL_GETBAUD:
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        break;
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    default:
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        break;
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    }
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    return ret;
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}
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static int
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cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc,
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                       CYG_ADDRWORD __vector, CYG_ADDRWORD __data)
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{
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    *__ctrlc = 0;
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    return 0;
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}
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static void
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cyg_hal_plf_serial_init(void)
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{
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    hal_virtual_comm_table_t* comm;
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    int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
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    // Disable interrupts.
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    HAL_INTERRUPT_MASK(channels[0].isr_vector);
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    // Init channels
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    cyg_hal_plf_serial_init_channel((void*)&channels[0]);
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    // Setup procs in the vector table
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    // Set channel 0
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    CYGACC_CALL_IF_SET_CONSOLE_COMM(0);
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    comm = CYGACC_CALL_IF_CONSOLE_PROCS();
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    CYGACC_COMM_IF_CH_DATA_SET(*comm, &channels[0]);
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    CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
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    CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
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    CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
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    CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
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    CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
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    CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
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    CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
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    // Restore original console
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    CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
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}
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void
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cyg_hal_plf_comms_init(void)
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{
281
    static int initialized = 0;
282
 
283
    if (initialized)
284
        return;
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    initialized = 1;
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288
    cyg_hal_plf_serial_init();
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}
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//-----------------------------------------------------------------------------
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// end of ser16c550c.c
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