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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [calmrisc32/] [arch/] [v2_0/] [src/] [hal_misc.c] - Blame information for rev 584

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//==========================================================================
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//
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//      hal_misc.c
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//
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//      HAL miscellaneous functions
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    nickg
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// Contributors: nickg, jlarmour
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// Date:         1999-01-21
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// Purpose:      HAL miscellaneous functions
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// Description:  This file contains miscellaneous functions provided by the
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//               HAL.
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//
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//####DESCRIPTIONEND####
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//
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//========================================================================*/
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#include <pkgconf/hal.h>
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#include <cyg/infra/cyg_type.h>         // Base types
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#include <cyg/infra/cyg_trac.h>         // tracing macros
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#include <cyg/infra/cyg_ass.h>          // assertion macros
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#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS
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#include <cyg/hal/hal_arch.h>           // architectural definitions
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#include <cyg/hal/hal_intr.h>           // Interrupt handling
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#include <cyg/hal/hal_cache.h>          // Cache handling
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/*------------------------------------------------------------------------*/
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/* If required, define a variable to store the clock period.              */
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#ifdef CYGHWR_HAL_CLOCK_PERIOD_DEFINED
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CYG_WORD32 cyg_hal_clock_period;
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#endif
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/*------------------------------------------------------------------------*/
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/* First level C exception handler.                                       */
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externC void __handle_exception (void);
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externC HAL_SavedRegisters *_hal_registers;
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externC void* volatile __mem_fault_handler;
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externC cyg_uint32 cyg_hal_exception_handler(HAL_SavedRegisters *regs)
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{
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    int vec = regs->vector;
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#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS)
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    // If we caught an exception inside the stubs, see if we were expecting it
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    // and if so jump to the saved address
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    if (__mem_fault_handler) {
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        switch (vec) {
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          case CYGNUM_HAL_VECTOR_SWI:
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            regs->spc_swi = (CYG_ADDRWORD)__mem_fault_handler;
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            break;
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          case CYGNUM_HAL_VECTOR_FIQ:
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            regs->spc_fiq = (CYG_ADDRWORD)__mem_fault_handler;
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            break;
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          case CYGNUM_HAL_VECTOR_IRQ:
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            regs->spc_irq = (CYG_ADDRWORD)__mem_fault_handler;
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            break;
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          default:
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            regs->spc_expt = (CYG_ADDRWORD)__mem_fault_handler;
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            break;
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        }
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        return 0; // Caught an exception inside stubs        
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    }
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    // Set the pointer to the registers of the current exception
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    // context. At entry the GDB stub will expand the
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    // HAL_SavedRegisters structure into a (bigger) register array.
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    _hal_registers = regs;
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    __handle_exception();
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#elif defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT) && defined(CYGPKG_HAL_EXCEPTIONS)
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    // We should decode the vector and pass a more appropriate
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    // value as the second argument. For now we simply pass a
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    // pointer to the saved registers. We should also divert
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    // breakpoint and other debug vectors into the debug stubs.
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    cyg_hal_deliver_exception( vec, (CYG_ADDRWORD)regs );
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#else
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    CYG_FAIL("Exception!!!");
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#endif    
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    return 0;
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}
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/*------------------------------------------------------------------------*/
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/* default ISR                                                            */
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#ifndef CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT
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externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data)
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{
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#if defined(CYGDBG_HAL_CALM32_DEBUG_GDB_CTRLC_SUPPORT) &&      \
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    defined(CYGHWR_HAL_GDB_PORT_VECTOR) &&              \
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    defined(HAL_CTRLC_ISR)
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#ifndef CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN    
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    if( vector == CYGHWR_HAL_GDB_PORT_VECTOR )
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#endif        
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    {
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        cyg_uint32 result = HAL_CTRLC_ISR( vector, data );
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        if( result != 0 ) return result;
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    }
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#if defined(CYGSEM_HAL_USE_ROM_MONITOR_CygMon)
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#if defined(HAL_DIAG_IRQ_CHECK)
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    {
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        cyg_uint32 ret;
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        /* let ROM monitor handle unexpected interrupts */
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        HAL_DIAG_IRQ_CHECK(vector, ret);
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        if (ret<=0)
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            return ret;
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    }
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#endif // def HAL_DIAG_IRQ_CHECK
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#endif // def CYGSEM_HAL_USE_ROM_MONITOR_CygMon
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#endif
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    CYG_TRACE1(true, "Interrupt: %d", vector);
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    CYG_FAIL("Spurious Interrupt!!!");
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    return 0;
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}
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#else // CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT
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externC cyg_uint32 hal_arch_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data)
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{
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#if defined(CYGDBG_HAL_CALM32_DEBUG_GDB_CTRLC_SUPPORT) &&      \
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    defined(CYGHWR_HAL_GDB_PORT_VECTOR) &&              \
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    defined(HAL_CTRLC_ISR)
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#if defined(CYGSEM_HAL_USE_ROM_MONITOR_CygMon)
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#if defined(HAL_DIAG_IRQ_CHECK)
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    {
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        cyg_uint32 ret;
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        /* let ROM monitor handle unexpected interrupts */
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        HAL_DIAG_IRQ_CHECK(vector, ret);
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        if (ret<=0)
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            return ret;
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    }
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#endif // def HAL_DIAG_IRQ_CHECK
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#endif // def CYGSEM_HAL_USE_ROM_MONITOR_CygMon
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#endif
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    return 0;
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}
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#endif // CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT
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/*------------------------------------------------------------------------*/
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/* data copy and bss zero functions                                       */
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typedef void (CYG_SYM_ADDRESS)(void);
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// All these must use this type of address to stop them being given relocations
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// relative to $gp (i.e. assuming they would be in .sdata)
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extern CYG_SYM_ADDRESS __ram_data_start;
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extern CYG_SYM_ADDRESS __ram_data_end;
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extern CYG_SYM_ADDRESS __rom_data_start;
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#ifdef CYG_HAL_STARTUP_ROM      
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void hal_copy_data(void)
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{
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    short *p = (short *)&__ram_data_start;
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    short *q = (short *)&__rom_data_start;
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    short x;
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    while( p != (short *)&__ram_data_end ) {
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        asm volatile( "ldch %0,@%1\n" : "=r"(x) : "r"(q) );
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        *p++ = x;
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        q++;
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    }
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}
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#endif
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extern CYG_SYM_ADDRESS __bss_start;
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extern CYG_SYM_ADDRESS __bss_end;
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void hal_zero_bss(void)
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{
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    short *p = (short *)&__bss_start;
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    while( p != (short *)&__bss_end )
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        *p++ = 0;
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}
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/*------------------------------------------------------------------------*/
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#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG
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cyg_bool cyg_hal_stop_constructors;
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#endif
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typedef void (*pfunc) (void);
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extern pfunc __CTOR_LIST__[];
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extern pfunc __CTOR_END__[];
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void
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cyg_hal_invoke_constructors(void)
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{
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#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG
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    static pfunc *p = &__CTOR_END__[-1];
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    cyg_hal_stop_constructors = 0;
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    for (; p >= __CTOR_LIST__; p--) {
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        (*p) ();
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        if (cyg_hal_stop_constructors) {
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            p--;
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            break;
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        }
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    }
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#else
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    pfunc *p;
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    for (p = &__CTOR_END__[-1]; p >= __CTOR_LIST__; p--)
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        (*p) ();
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#endif
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} // cyg_hal_invoke_constructors()
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/*------------------------------------------------------------------------*/
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/* Determine the index of the ls bit of the supplied mask.                */
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cyg_uint32 hal_lsbit_index(cyg_uint32 mask)
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{
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    cyg_uint32 n = mask;
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    static const signed char tab[64] =
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    { -1, 0, 1, 12, 2, 6, 0, 13, 3, 0, 7, 0, 0, 0, 0, 14, 10,
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      4, 0, 0, 8, 0, 0, 25, 0, 0, 0, 0, 0, 21, 27 , 15, 31, 11,
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      5, 0, 0, 0, 0, 0, 9, 0, 0, 24, 0, 0 , 20, 26, 30, 0, 0, 0,
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      0, 23, 0, 19, 29, 0, 22, 18, 28, 17, 16, 0
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    };
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    n &= ~(n-1UL);
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    n = (n<<16)-n;
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    n = (n<<6)+n;
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    n = (n<<4)+n;
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    return tab[n>>26];
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}
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/*------------------------------------------------------------------------*/
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/* Determine the index of the ms bit of the supplied mask.                */
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291
cyg_uint32 hal_msbit_index(cyg_uint32 mask)
292
{
293
    cyg_uint32 x = mask;
294
    cyg_uint32 w;
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296
    /* Phase 1: make word with all ones from that one to the right */
297
    x |= x >> 16;
298
    x |= x >> 8;
299
    x |= x >> 4;
300
    x |= x >> 2;
301
    x |= x >> 1;
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303
    /* Phase 2: calculate number of "1" bits in the word        */
304
    w = (x & 0x55555555) + ((x >> 1) & 0x55555555);
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    w = (w & 0x33333333) + ((w >> 2) & 0x33333333);
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    w = w + (w >> 4);
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    w = (w & 0x000F000F) + ((w >> 8) & 0x000F000F);
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    return (cyg_uint32)((w + (w >> 16)) & 0xFF) - 1;
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310
}
311
 
312
/*------------------------------------------------------------------------*/
313
/* Idle thread action                                                     */
314
 
315
#include <cyg/infra/diag.h>
316
 
317
void hal_idle_thread_action( cyg_uint32 count )
318
{
319
}
320
 
321
/*------------------------------------------------------------------------*/
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/* End of hal_misc.c                                                      */

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