OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [frv/] [arch/] [v2_0/] [include/] [frv_stub.h] - Blame information for rev 174

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 27 unneback
#ifndef CYGONCE_HAL_FRV_STUB_H
2
#define CYGONCE_HAL_FRV_STUB_H
3
//========================================================================
4
//
5
//      frv_stub.h
6
//
7
//      FUJITSU-specific definitions for generic stub
8
//
9
//========================================================================
10
//####ECOSGPLCOPYRIGHTBEGIN####
11
// -------------------------------------------
12
// This file is part of eCos, the Embedded Configurable Operating System.
13
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
14
//
15
// eCos is free software; you can redistribute it and/or modify it under
16
// the terms of the GNU General Public License as published by the Free
17
// Software Foundation; either version 2 or (at your option) any later version.
18
//
19
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
20
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
21
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
22
// for more details.
23
//
24
// You should have received a copy of the GNU General Public License along
25
// with eCos; if not, write to the Free Software Foundation, Inc.,
26
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27
//
28
// As a special exception, if other files instantiate templates or use macros
29
// or inline functions from this file, or you compile this file and link it
30
// with other works to produce a work based on this file, this file does not
31
// by itself cause the resulting work to be covered by the GNU General Public
32
// License. However the source code for this file must still be made available
33
// in accordance with section (3) of the GNU General Public License.
34
//
35
// This exception does not invalidate any other reasons why a work based on
36
// this file might be covered by the GNU General Public License.
37
//
38
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
39
// at http://sources.redhat.com/ecos/ecos-license/
40
// -------------------------------------------
41
//####ECOSGPLCOPYRIGHTEND####
42
//========================================================================
43
//#####DESCRIPTIONBEGIN####
44
//
45
// Author(s):     Red Hat, gthomas
46
// Contributors:  Red Hat, gthomas
47
// Date:          2001-09-14
48
// Purpose:       
49
// Description:   FUJITSU-specific definitions for generic stub
50
// Usage:         
51
//
52
//####DESCRIPTIONEND####
53
//
54
//========================================================================
55
 
56
#ifdef __cplusplus
57
extern "C" {
58
#endif
59
 
60
#define NUMREGS    (147)
61
 
62
#define REGSIZE( _x_ ) (4)
63
 
64
#define NUMREGBYTES (NUMREGS*4)
65
 
66
#ifndef TARGET_REGISTER_T_DEFINED
67
#define TARGET_REGISTER_T_DEFINED
68
typedef cyg_uint32 target_register_t;
69
#endif
70
 
71
// This information needs to match what GDB wants
72
enum regnames {
73
    R0, R1, R2, R3, R4, R5, R6, R7,
74
    R8, R9, R10, R11, R12, R13, R14, R15,
75
    R16, R17, R18, R19, R20, R21, R22, R23,
76
    R24, R25, R26, R27, R28, R29, R30, R31,
77
    R32, R33, R34, R35, R36, R37, R38, R39,
78
    R40, R41, R42, R43, R44, R45, R46, R47,
79
    R48, R49, R50, R51, R52, R53, R54, R55,
80
    R56, R57, R58, R59, R60, R61, R62, R63,
81
    FP0, FP1, FP2, FP3, FP4, FP5, FP6, FP7,
82
    FP8, FP9, FP10, FP11, FP12, FP13, FP14, FP15,
83
    FP16, FP17, FP18, FP19, FP20, FP21, FP22, FP23,
84
    FP24, FP25, FP26, FP27, FP28, FP29, FP30, FP31,
85
    FP32, FP33, FP34, FP35, FP36, FP37, FP38, FP39,
86
    FP40, FP41, FP42, FP43, FP44, FP45, FP46, FP47,
87
    FP48, FP49, FP50, FP51, FP52, FP53, FP54, FP55,
88
    FP56, FP57, FP58, FP59, FP60, FP61, FP62, FP63,
89
    PC, PSR, CCR, CCCR,
90
    _X132, _X133, _X134, _X135, _X136, _X137, _X138,
91
    _X139, _X140, _X141, _X142, _X143, _X144,
92
    LR, LCR
93
};
94
#define SP R1
95
 
96
typedef enum regnames regnames_t;
97
 
98
/* Given a trap value TRAP, return the corresponding signal. */
99
extern int __computeSignal (unsigned int trap_number);
100
 
101
/* Return the SPARC trap number corresponding to the last-taken trap. */
102
extern int __get_trap_number (void);
103
 
104
/* Return the currently-saved value corresponding to register REG. */
105
extern target_register_t get_register (regnames_t reg);
106
 
107
/* Store VALUE in the register corresponding to WHICH. */
108
extern void put_register (regnames_t which, target_register_t value);
109
 
110
/* Set the currently-saved pc register value to PC. This also updates NPC
111
   as needed. */
112
extern void set_pc (target_register_t pc);
113
 
114
/* Set things up so that the next user resume will execute one instruction.
115
   This may be done by setting breakpoints or setting a single step flag
116
   in the saved user registers, for example. */
117
void __single_step (void);
118
 
119
/* Clear the single-step state. */
120
void __clear_single_step (void);
121
 
122
/* If the breakpoint we hit is in the breakpoint() instruction, return a
123
   non-zero value. */
124
extern int __is_breakpoint_function (void);
125
 
126
/* Skip the current instruction. */
127
extern void __skipinst (void);
128
 
129
extern void __install_breakpoints (void);
130
 
131
extern void __clear_breakpoints (void);
132
 
133
extern int __is_bsp_syscall(void);
134
 
135
//------------------------------------------------------------------------
136
// Special definition of CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION
137
 
138
#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
139
// we can only do this at all if break support is enabled:
140
 
141
#define CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION( _old_ )                       \
142
do {                                                                        \
143
    HAL_DISABLE_INTERRUPTS(_old_);                                          \
144
    cyg_hal_gdb_place_break((target_register_t)&&cyg_hal_gdb_break_place ); \
145
} while ( 0 )
146
 
147
#endif // CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
148
 
149
 
150
#ifdef __cplusplus
151
} /* extern "C" */
152
#endif
153
 
154
#endif // ifndef CYGONCE_HAL_FRV_STUB_H

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.