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#ifndef CYGONCE_PLF_INTS_H
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#define CYGONCE_PLF_INTS_H
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//==========================================================================
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//
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// plf_ints.h
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//
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// HAL extended support for platform specific interrupts
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): gthomas
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// Contributors: gthomas
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// Date: 2001-02-24
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// Purpose: Define Interrupt support
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// Description: The interrupt details for the MB93091 (FRV400) are defined here.
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// Usage:
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// #include <cyg/hal/plf_ints.h>
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// ...
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//
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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// Define here extended support for this particular platform
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// Interrupts are mapped onto "channels" by the interrupt controller
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// The channel in turn is presented to the CPU as a "level" which can
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// be masked. The eCos interrupt names below are for the default mapping
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// of interrupt sources to channels.
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#define CYGNUM_HAL_INTERRUPT_TIMER0 CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_14
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#define CYGNUM_HAL_INTERRUPT_TIMER1 CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_13
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#define CYGNUM_HAL_INTERRUPT_TIMER2 CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_12
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#define CYGNUM_HAL_INTERRUPT_DMA0 CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_11
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#define CYGNUM_HAL_INTERRUPT_DMA1 CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_10
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#define CYGNUM_HAL_INTERRUPT_DMA2 CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_9
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#define CYGNUM_HAL_INTERRUPT_DMA3 CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_8
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#define CYGNUM_HAL_INTERRUPT_UART0 CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_2
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#define CYGNUM_HAL_INTERRUPT_UART1 CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_1
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#define CYGNUM_HAL_INTERRUPT_EXT0 CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_7
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#define CYGNUM_HAL_INTERRUPT_EXT1 CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_6
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#define CYGNUM_HAL_INTERRUPT_EXT2 CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_5
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#define CYGNUM_HAL_INTERRUPT_EXT3 CYGNUM_HAL_VECTOR_EXTERNAL_INTERRUPT_LEVEL_4
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#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_TIMER1
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#define CYGNUM_HAL_INTERRUPT_SERIALA CYGNUM_HAL_INTERRUPT_UART0
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#define CYGNUM_HAL_INTERRUPT_SERIALB CYGNUM_HAL_INTERRUPT_UART1
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#define CYGNUM_HAL_INTERRUPT_LAN CYGNUM_HAL_INTERRUPT_EXT2
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#define CYGNUM_HAL_INTERRUPT_PCIINTA CYGNUM_HAL_INTERRUPT_EXT1
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#define CYGNUM_HAL_INTERRUPT_PCIINTB CYGNUM_HAL_INTERRUPT_EXT0
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#define CYGNUM_HAL_INTERRUPT_PCIINTC CYGNUM_HAL_INTERRUPT_EXT1
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#define CYGNUM_HAL_INTERRUPT_PCIINTD CYGNUM_HAL_INTERRUPT_EXT0
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//----------------------------------------------------------------------------
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// Reset.
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#define HAL_PLATFORM_RESET() \
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CYG_MACRO_START \
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cyg_uint32 ctrl; \
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\
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/* By disabling interupts we will just hang in the loop below */ \
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/* if for some reason the software reset fails. */ \
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HAL_DISABLE_INTERRUPTS(ctrl); \
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\
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/* Software reset. */ \
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HAL_WRITE_UINT32(_FRV400_HW_RESET, _FRV400_HW_RESET_HR); \
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\
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for(;;); /* hang here forever if reset fails */ \
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CYG_MACRO_END
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#define HAL_PLATFORM_RESET_ENTRY 0xFF000000
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#endif // CYGONCE_PLF_INTS_H
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