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##=============================================================================
##
##      vectors.S
##
##      H8/300 exception vectors
##
##=============================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
##=============================================================================
#######DESCRIPTIONBEGIN####
##
## Author(s):   nickg
## Contributors:        nickg, dmoseley, dhowells
## Date:        2002-02-14
## Purpose:     H8/300 exception vectors
## Description: This file defines the code placed into the exception
##              vectors. It also contains the first level default VSRs
##              that save and restore state for both exceptions and
##              interrupts.
##
######DESCRIPTIONEND####
##
##=============================================================================
 
#include 
 
#ifdef CYGPKG_REDBOOT
#include 
#endif
 
#ifdef CYGPKG_KERNEL
 
#include 
 
#endif
 
#include 
#include 
 
 
##-----------------------------------------------------------------------------
 
//      .file   "vectors.S"
        .h8300h
 
#ifdef CYGPKG_CYGMON
##-----------------------------------------------------------------------------
## Macros for Stack handling when running Cygmon
 
.macro hal_cygmon_switch_app_stack
        #
        ; Switch to interrupt stack to handle exception
        #
 
        ; First, save some scratch registers
        mov.l   er0,@er0_save
        mov.l   er1,@er1_save
 
        ; Copy the exception frame
        mov.l   #__cygmon_interrupt_stack,er0
        mov.l   @sp,er1
        mov.l   er1,@-er0
 
        ; Save the pre-exception sp in the register image
        mov.l   sp,@-er0
 
        ; Actually switch the stack
        mov.l   er0,sp
 
        ; Now, restore the scratch registers
        mov.l   @er0_save,er0
        mov.l   @er1_save,er1
.endm
 
.macro hal_cygmon_restore_app_stack
        // For cygmon we are switching stacks immediately on exception.
        // We must wait until the very end before restoring the original stack.
 
        ; Save some scratch registers
        mov.l   er0,@er0_save
        mov.l   er1,@er1_save
 
        ; We need to restore the application stack pointer, but we also
        ; need to restore the exception frame.
        mov.l   @sp+,er0
        mov.l   @sp+,er1
        mov.l   er1,@er0
        mov.l   er0,sp                          // Restore the frame-adjusted SP
 
        ; Restore the scratch registers
        mov.l   @er0_save,er0
        mov.l   @er1_save,er1
.endm
 
#endif // CYGPKG_CYGMON
 
##-----------------------------------------------------------------------------
 
#if defined(CYG_HAL_STARTUP_ROM) || defined(CYGPKG_HAL_H8300_H8300H_SIM)
        .section .vectors,"a"
 
        .globl  reset_vector
 
reset_vector:
        ; Reset vector
        .long   CYG_LABEL_DEFN(_start)
        .space  6*4
        .long   __interrupt7
        .long   __interrupt8
        .long   __interrupt9
        .long   __interrupt10
        .long   __interrupt11
        .long   __interrupt12
        .long   __interrupt13
        .long   __interrupt14
        .long   __interrupt15
        .long   __interrupt16
        .long   __interrupt17
        .long   __interrupt18
        .long   __interrupt19
        .long   __interrupt20
        .long   __interrupt21
        .long   __interrupt22
        .long   __interrupt23
        .long   __interrupt24
        .long   __interrupt25
        .long   __interrupt26
        .long   __interrupt27
        .long   __interrupt28
        .long   __interrupt29
        .long   __interrupt30
        .long   __interrupt31
        .long   __interrupt32
        .long   __interrupt33
        .long   __interrupt34
        .long   __interrupt35
        .long   __interrupt36
        .long   __interrupt37
        .long   __interrupt38
        .long   __interrupt39
        .long   __interrupt40
        .long   __interrupt41
        .long   __interrupt42
        .long   __interrupt43
        .long   __interrupt44
        .long   __interrupt45
        .long   __interrupt46
        .long   __interrupt47
        .long   __interrupt48
        .long   __interrupt49
        .long   __interrupt50
        .long   __interrupt51
        .long   __interrupt52
        .long   __interrupt53
        .long   __interrupt54
        .long   __interrupt55
        .long   __interrupt56
        .long   __interrupt57
        .long   __interrupt58
        .long   __interrupt59
        .long   __interrupt60
        .long   __interrupt61
        .long   __interrupt62
        .long   __interrupt63
 
#endif
 
#define INTERRUPT_ENTRY(no) \
__interrupt##no:            \
        jsr     @interrupt_entry
 
        .section .int_fook_table,"a"
        .space  7*4
__interrupt_table:
INTERRUPT_ENTRY(7)
INTERRUPT_ENTRY(8)
INTERRUPT_ENTRY(9)
INTERRUPT_ENTRY(10)
INTERRUPT_ENTRY(11)
INTERRUPT_ENTRY(12)
INTERRUPT_ENTRY(13)
INTERRUPT_ENTRY(14)
INTERRUPT_ENTRY(15)
INTERRUPT_ENTRY(16)
INTERRUPT_ENTRY(17)
INTERRUPT_ENTRY(18)
INTERRUPT_ENTRY(19)
INTERRUPT_ENTRY(20)
INTERRUPT_ENTRY(21)
INTERRUPT_ENTRY(22)
INTERRUPT_ENTRY(23)
INTERRUPT_ENTRY(24)
INTERRUPT_ENTRY(25)
INTERRUPT_ENTRY(26)
INTERRUPT_ENTRY(27)
INTERRUPT_ENTRY(28)
INTERRUPT_ENTRY(29)
INTERRUPT_ENTRY(30)
INTERRUPT_ENTRY(31)
INTERRUPT_ENTRY(32)
INTERRUPT_ENTRY(33)
INTERRUPT_ENTRY(34)
INTERRUPT_ENTRY(35)
INTERRUPT_ENTRY(36)
INTERRUPT_ENTRY(37)
INTERRUPT_ENTRY(38)
INTERRUPT_ENTRY(39)
INTERRUPT_ENTRY(40)
INTERRUPT_ENTRY(41)
INTERRUPT_ENTRY(42)
INTERRUPT_ENTRY(43)
INTERRUPT_ENTRY(44)
INTERRUPT_ENTRY(45)
INTERRUPT_ENTRY(46)
INTERRUPT_ENTRY(47)
INTERRUPT_ENTRY(48)
INTERRUPT_ENTRY(49)
INTERRUPT_ENTRY(50)
INTERRUPT_ENTRY(51)
INTERRUPT_ENTRY(52)
INTERRUPT_ENTRY(53)
INTERRUPT_ENTRY(54)
INTERRUPT_ENTRY(55)
INTERRUPT_ENTRY(56)
INTERRUPT_ENTRY(57)
INTERRUPT_ENTRY(58)
INTERRUPT_ENTRY(59)
INTERRUPT_ENTRY(60)
INTERRUPT_ENTRY(61)
INTERRUPT_ENTRY(62)
INTERRUPT_ENTRY(63)
 
##-----------------------------------------------------------------------------
## Startup code
 
        .text
 
        .globl  CYG_LABEL_DEFN(_start)
CYG_LABEL_DEFN(_start):
        ; set up stack
 
        mov.l   #__interrupt_stack,sp
        ldc     #0x80,ccr
 
        ; Initialize hardware
        hal_cpu_init
        hal_mmu_init
        hal_memc_init
        hal_diag_init
        hal_intc_init
        hal_cache_init
        hal_timer_init
        hal_mon_init
 
#ifdef CYG_HAL_STARTUP_ROM
 
        ; Copy data from ROM to RAM
 
        mov.l   #CYG_LABEL_DEFN(__rom_data_start),er5
        mov.l   #CYG_LABEL_DEFN(__ram_data_start),er6
        mov.l   #CYG_LABEL_DEFN(__ram_data_end),er4
        sub.l   er6,er4
1:
        eepmov.w
        dec.w   #1,e4
        cmp.w   #-1,e4
        bhi     1b
 
#endif
 
        ; Setup Interrupt Vector (virtual)
        mov.l   #CYG_LABEL_DEFN(__rom_int_fook_start),er5
        mov.l   #CYG_LABEL_DEFN(__int_fook_start),er6
        mov.l   #CYG_LABEL_DEFN(__int_fook_end),er4
        sub.l   er6,er4
1:
        eepmov.w
        dec.w   #1,e4
        cmp.w   #-1,e4
        bhi     1b
 
        ; Clear BSS
        mov.l   #CYG_LABEL_DEFN(__bss_start),er5
        mov.l   er5,er6
        adds    #1,er6
        mov.l   #CYG_LABEL_DEFN(__bss_end),er4
        sub.l   #CYG_LABEL_DEFN(__bss_start),er4
 
        mov.b   #0,r0l
        mov.b   r0l,@er5
1:
        eepmov.w
        dec.w   #1,e4
        cmp.w   #-1,e4
        bhi     1b
 
        ; Call variant and platform HAL
        ; initialization routines.
 
        .extern CYG_LABEL_DEFN(hal_variant_init)
        jsr     @CYG_LABEL_DEFN(hal_variant_init)
 
        .extern CYG_LABEL_DEFN(hal_platform_init)
        jsr     @CYG_LABEL_DEFN(hal_platform_init)
 
        ; Call constructors
 
        .extern CYG_LABEL_DEFN(cyg_hal_invoke_constructors)
        jsr     @CYG_LABEL_DEFN(cyg_hal_invoke_constructors)
 
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
        .extern CYG_LABEL_DEFN(initialize_stub)
        jsr     @CYG_LABEL_DEFN(initialize_stub)
#endif
 
#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) \
    || defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)
        .extern CYG_LABEL_DEFN(hal_ctrlc_isr_init)
        jsr     @CYG_LABEL_DEFN(hal_ctrlc_isr_init)
#endif
 
 
        mov.b   #0x9a,r0l
        mov.b   r0l,@0xfee027
        ; Call cyg_start
        sub.l   er0,er0
 
        .extern CYG_LABEL_DEFN(cyg_start)
        jsr     @CYG_LABEL_DEFN(cyg_start)
 
9:
        bra     9b              ; Loop if we return
 
interrupt_entry:
        mov.l   er0,@-sp
        mov.l   @(4,sp),er0
        sub.l   #__interrupt_table,er0
        shlr.l  er0
        shlr.l  er0
        add.w   #7,r0
        mov.l   er0,@CYG_LABEL_DEFN(_intvector)
        mov.l   @sp+,er0
        adds    #4,sp
#ifdef CYGPKG_CYGMON
        hal_cygmon_switch_app_stack
#endif
        hal_cpu_save_all                        ; push all registers
        mov.l   @CYG_LABEL_DEFN(_intvector),er0
        shll.l  er0
        shll.l  er0
        mov.l   @(CYG_LABEL_DEFN(hal_vsr_table),er0),er0
        jmp     @er0
 
##-----------------------------------------------------------------------------
## The following macros are defined depending on whether the HAL is configured
## to support the kernel or not.
 
#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
 
        .extern CYG_LABEL_DEFN(cyg_scheduler_sched_lock)
 
        ; Increment the scheduler lock
 
        .macro increment_sched_lock reg=er0
        mov.l   @CYG_LABEL_DEFN(cyg_scheduler_sched_lock),\reg
        inc.l   #1,\reg
        mov.l   \reg,@CYG_LABEL_DEFN(cyg_scheduler_sched_lock)
        .endm
 
#else
 
        .macro increment_sched_lock reg=er0
        .endm
 
#endif
 
##-----------------------------------------------------------------------------
## Default interrupt VSR
 
        .text
        .globl  CYG_LABEL_DEFN(__default_interrupt_vsr)
CYG_LABEL_DEFN(__default_interrupt_vsr):
 
        ; We come here with all the registers pushed
        ; onto the stack.
 
        hal_diag_intr_start
 
        increment_sched_lock
 
#if defined(CYGPKG_CYGMON)
        // For Cygmon, we saved this back when we originally switched stacks.
        mov.l   @sp,er1                         ; A2 = saved thread state
#elif defined(CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK)
        ; Increment interrupt nesting counter
        mov.l   sp,er1
        mov.l   #__interrupt_stack,er0          ; A0 = interrupt stack top
        cmp.l   #__interrupt_stack_base,sp      ; compare with base of stack
        blt     1f                              ; if lt switch to int stack
        cmp.l   er0,sp                          ; compare sp with stack top
        ble     8f                              ; if le already on istack
1:
        mov.l   er0,sp                          ; switch to new SP
8:
        mov.l   er1,@-sp                        ; save old SP
        mov.l   @er1,er1
 
#else
        mov     @sp,er1                         ; A2 = saved thread state
#endif
 
        ; Here D3 contains the table byte offset of the vector to
        ; call.
 
#if defined(CYGPKG_KERNEL_INSTRUMENT) && defined(CYGDBG_KERNEL_INSTRUMENT_INTR)
 
        ; Call cyg_instrument to record that this interrupt is being raised.
 
        .extern CYG_LABEL_DEFN(cyg_instrument)
        mov.l   er1,er3
        mov.l   #0x0301,er0                     ; type = INTR,RAISE
        mov.l   @CYG_LABEL_DEFN(_intvector),er2         ; arg2 = table offset
        jsr     CYG_LABEL_DEFN(cyg_instrument)  ; call instrumentation
 
#endif
 
#ifdef CYGSEM_HAL_COMMON_INTERRUPTS_ALLOW_NESTING
 
        ; To allow nested interrupts, we set the IE bit. We do
        ; not touch the IPL bits, so only higher priority interrupts
        ; will be nested on top of us. Also, new interrupts will not
        ; be delivered until the ISR calls
        ; Cyg_Interrupt::acknowledge_interrupt(). At some future point
        ; we may want to do the ack stuff here to allow immediate nesting.
 
        andc    #0x7f,ccr
 
#endif
#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) || \
    defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)
 
        ; If we have Ctrl-C support enabled, save a pointer to the
        ; saved CPU state here so we can plant a breakpoint there if
        ; this is a ^C.
 
        .extern CYG_LABEL_DEFN(hal_saved_interrupt_state)
        mov.l   er3,@CYG_LABEL_DEFN(hal_saved_interrupt_state)
 
#endif
        mov.l   @CYG_LABEL_DEFN(_intvector),er0
        shll.l  er0
        shll.l  er0
        mov.l   @(CYG_LABEL_DEFN(hal_interrupt_handlers),er0),er2
 
        mov.l   @(CYG_LABEL_DEFN(hal_interrupt_data),er0),er1
 
        shlr.l  er0
        shlr.l  er0
 
        jsr     @er2
 
        ; on return d0 bit 1 will indicate whether a DSR is
        ; to be posted. Pass this together with a pointer to
        ; the interrupt object we have just used to the
        ; interrupt tidy up routine.
 
        ; D3 is defined to be saved across procedure calls, and
        ; should still contain the vector byte index. Similarly,
        ; A2 should still point to the saved machine state.
 
#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
        ; If interrupt was caused by GDB, the ISR call above
        ; is skipped by jumping here.
2:
#endif
 
#if defined(CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK) && !defined(CYGPKG_CYGMON)
 
        ; If we are returning from the last nested interrupt, move back
        ; to the thread stack. interrupt_end() must be called on the
        ; thread stack since it potentially causes a context switch.
 
        mov.l   @sp+,sp                         ; pop old sp
 
#endif
 
#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
 
        ; We only need to call _interrupt_end() when there is a kernel
        ; present to do any tidying up.
 
        ; Using the vector offset in D3, get the interrupt object pointer
        ; into D1.
        mov.l   @CYG_LABEL_DEFN(_intvector),er1
        shll.l  er1
        shll.l  er1
        mov.l   @(CYG_LABEL_DEFN(hal_interrupt_objects),er1),er1
 
        ; Even when this is not the last nested interrupt, we must call
        ; _interrupt_end() to post the DSR and decrement the scheduler
        ; lock.
 
        mov.l   er3,er2                         ; arg3 = saved state.
 
        jsr     @CYG_LABEL_DEFN(interrupt_end)  ; call interrupt end fn
#endif
 
 
#       show_interrupts
 
        hal_diag_restore
 
        hal_cpu_load_all
#ifdef CYGPKG_CYGMON
        hal_cygmon_restore_app_stack
#endif
        rte                                     ; and return
 
        .section        .bss
        .global CYG_LABEL_DEFN(_intvector)
CYG_LABEL_DEFN(_intvector):
        .long   0
 
        .text
##-----------------------------------------------------------------------------
## Execute pending DSRs on the interrupt stack with interrupts enabled.
## Note: this can only be called from code running on a thread stack
 
#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
        .extern CYG_LABEL_DEFN(cyg_interrupt_call_pending_DSRs)
        .global CYG_LABEL_DEFN(hal_interrupt_stack_call_pending_DSRs)
 
CYG_LABEL_DEFN(hal_interrupt_stack_call_pending_DSRs):
        mov.l   er5,@-sp                        ; save some work regs
        mov.l   er6,@-sp
        mov.l   sp,er6                          ; save current SP
        mov.l   #__interrupt_stack,sp           ; interrupt stack pointer
        stc     ccr,r5l                         ; save PSW
        hal_cpu_int_enable                      ; enable interrupts
 
        ; Call kernel code to invoke DSRs.
        jsr     @CYG_LABEL_DEFN(cyg_interrupt_call_pending_DSRs)
 
        ; On return the old SP in a2 and the old PSW in d2 will
        ; have been preserved by the calling conventions.
 
        hal_cpu_int_merge r5l                   ; Restore previous PSW
        mov.l   er6,sp                          ; restore old SP
        mov.l   @sp+,er6                        ; Retrieve old work regs
        mov.l   @sp+,er5
        rts                                     ; and return
 
#endif
 
#ifdef CYGPKG_CYGMON
        .section        .bss
er0_save:
        .long   0
er1_save:
        .long   0
er2_save:
        .long   0
er3_save:
        .long   0
er4_save:
        .long   0
er5_save:
        .long   0
er6_save:
        .long   0
sp_save:
        .long   0
#endif
 
##-----------------------------------------------------------------------------
## Default TRAP VSR
 
        .text
        .globl  CYG_LABEL_DEFN(__default_trap_vsr)
CYG_LABEL_DEFN(__default_trap_vsr):
 
#ifdef CYG_HAL_DIAG_EXCPT_END
        hal_diag_excpt_start
#endif
 
        mov.l   sp,er0
        mov.l   @CYG_LABEL_DEFN(_intvector),er1
 
        jsr     @CYG_LABEL_DEFN(cyg_hal_exception_handler)
 
#ifdef CYG_HAL_DIAG_EXCPT_END
        hal_diag_excpt_end
#endif
        hal_cpu_load_all
#ifdef CYGPKG_CYGMON
        hal_cygmon_restore_app_stack
#endif
        rte
 
##-----------------------------------------------------------------------------
## VSR table. The VSRs pointed to by this table are called from the stubs
## connected to the hardware.
 
#ifndef CYG_HAL_H8300_VSR_TABLE_DEFINED
 
        .data
 
        .globl  CYG_LABEL_DEFN(hal_vsr_table)
CYG_LABEL_DEFN(hal_vsr_table):
        .long   CYG_LABEL_DEFN(__default_trap_vsr)
        .long   0
        .long   0
        .long   0
        .long   0
        .long   0
        .long   0
        .long   CYG_LABEL_DEFN(__default_trap_vsr)
        .long   CYG_LABEL_DEFN(__default_trap_vsr)
        .long   CYG_LABEL_DEFN(__default_trap_vsr)
        .long   CYG_LABEL_DEFN(__default_trap_vsr)
        .long   CYG_LABEL_DEFN(__default_trap_vsr)
 
        .rept   64-12
        .long   CYG_LABEL_DEFN(__default_interrupt_vsr)
        .endr
#endif
 
##-----------------------------------------------------------------------------
## Interrupt tables
 
        .data
 
        .extern CYG_LABEL_DEFN(hal_default_isr)
 
        .globl  CYG_LABEL_DEFN(hal_interrupt_handlers)
CYG_LABEL_DEFN(hal_interrupt_handlers):
        .rept   CYG_ISR_TABLE_SIZE
        .long   CYG_LABEL_DEFN(hal_default_isr)
        .endr
 
        .globl  CYG_LABEL_DEFN(hal_interrupt_data)
CYG_LABEL_DEFN(hal_interrupt_data):
        .rept   CYG_ISR_TABLE_SIZE
        .long   0
        .endr
 
        .globl  CYG_LABEL_DEFN(hal_interrupt_objects)
CYG_LABEL_DEFN(hal_interrupt_objects):
        .rept   CYG_ISR_TABLE_SIZE
        .long   0
        .endr
 
 
##-----------------------------------------------------------------------------
## Temporary interrupt stack
 
        .section        .bss
 
        .balign 16
        .global _cyg_interrupt_stack_base
_cyg_interrupt_stack_base:
__interrupt_stack_base:
        .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
        .byte 0
        .endr
        .balign 16
        .global _cyg_interrupt_stack
_cyg_interrupt_stack:
__interrupt_stack:
 
#ifdef CYGPKG_CYGMON
        .balign 16
        .global __cygmon_interrupt_stack_base
__cygmon_interrupt_stack_base:
        .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
        .byte 0
        .endr
        .balign 16
        .global __cygmon_interrupt_stack
__cygmon_interrupt_stack:
#endif
 
        .long   0,0,0,0,0,0,0,0
 
##-----------------------------------------------------------------------------
 
        .data
        hal_diag_data
 
 
##-----------------------------------------------------------------------------
## end of vectors.S
 

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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [h8300/] [arch/] [v2_0/] [src/] [vectors.S] - Blame information for rev 174

Line No.	Rev	Author	Line
1	27	unneback	`##=============================================================================`
2			`##`
3			`## vectors.S`
4			`##`
5			`## H8/300 exception vectors`
6			`##`
7			`##=============================================================================`
8			`#####ECOSGPLCOPYRIGHTBEGIN####`
9			`## -------------------------------------------`
10			`## This file is part of eCos, the Embedded Configurable Operating System.`
11			`## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.`
12			`##`
13			`## eCos is free software; you can redistribute it and/or modify it under`
14			`## the terms of the GNU General Public License as published by the Free`
15			`## Software Foundation; either version 2 or (at your option) any later version.`
16			`##`
17			`## eCos is distributed in the hope that it will be useful, but WITHOUT ANY`
18			`## WARRANTY; without even the implied warranty of MERCHANTABILITY or`
19			`## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License`
20			`## for more details.`
21			`##`
22			`## You should have received a copy of the GNU General Public License along`
23			`## with eCos; if not, write to the Free Software Foundation, Inc.,`
24			`## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.`
25			`##`
26			`## As a special exception, if other files instantiate templates or use macros`
27			`## or inline functions from this file, or you compile this file and link it`
28			`## with other works to produce a work based on this file, this file does not`
29			`## by itself cause the resulting work to be covered by the GNU General Public`
30			`## License. However the source code for this file must still be made available`
31			`## in accordance with section (3) of the GNU General Public License.`
32			`##`
33			`## This exception does not invalidate any other reasons why a work based on`
34			`## this file might be covered by the GNU General Public License.`
35			`##`
36			`## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.`
37			`## at http://sources.redhat.com/ecos/ecos-license/`
38			`## -------------------------------------------`
39			`#####ECOSGPLCOPYRIGHTEND####`
40			`##=============================================================================`
41			`#######DESCRIPTIONBEGIN####`
42			`##`
43			`## Author(s): nickg`
44			`## Contributors: nickg, dmoseley, dhowells`
45			`## Date: 2002-02-14`
46			`## Purpose: H8/300 exception vectors`
47			`## Description: This file defines the code placed into the exception`
48			`## vectors. It also contains the first level default VSRs`
49			`## that save and restore state for both exceptions and`
50			`## interrupts.`
51			`##`
52			`######DESCRIPTIONEND####`
53			`##`
54			`##=============================================================================`
55
56			`#include`
57
58			`#ifdef CYGPKG_REDBOOT`
59			`#include`
60			`#endif`
61
62			`#ifdef CYGPKG_KERNEL`
63
64			`#include`
65
66			`#endif`
67
68			`#include`
69			`#include`
70
71
72			`##-----------------------------------------------------------------------------`
73
74			`// .file "vectors.S"`
75			`.h8300h`
76
77			`#ifdef CYGPKG_CYGMON`
78			`##-----------------------------------------------------------------------------`
79			`## Macros for Stack handling when running Cygmon`
80
81			`.macro hal_cygmon_switch_app_stack`
82			`#`
83			`; Switch to interrupt stack to handle exception`
84			`#`
85
86			`; First, save some scratch registers`
87			`mov.l er0,@er0_save`
88			`mov.l er1,@er1_save`
89
90			`; Copy the exception frame`
91			`mov.l #__cygmon_interrupt_stack,er0`
92			`mov.l @sp,er1`
93			`mov.l er1,@-er0`
94
95			`; Save the pre-exception sp in the register image`
96			`mov.l sp,@-er0`
97
98			`; Actually switch the stack`
99			`mov.l er0,sp`
100
101			`; Now, restore the scratch registers`
102			`mov.l @er0_save,er0`
103			`mov.l @er1_save,er1`
104			`.endm`
105
106			`.macro hal_cygmon_restore_app_stack`
107			`// For cygmon we are switching stacks immediately on exception.`
108			`// We must wait until the very end before restoring the original stack.`
109
110			`; Save some scratch registers`
111			`mov.l er0,@er0_save`
112			`mov.l er1,@er1_save`
113
114			`; We need to restore the application stack pointer, but we also`
115			`; need to restore the exception frame.`
116			`mov.l @sp+,er0`
117			`mov.l @sp+,er1`
118			`mov.l er1,@er0`
119			`mov.l er0,sp // Restore the frame-adjusted SP`
120
121			`; Restore the scratch registers`
122			`mov.l @er0_save,er0`
123			`mov.l @er1_save,er1`
124			`.endm`
125
126			`#endif // CYGPKG_CYGMON`
127
128			`##-----------------------------------------------------------------------------`
129
130			`#if defined(CYG_HAL_STARTUP_ROM) \|\| defined(CYGPKG_HAL_H8300_H8300H_SIM)`
131			`.section .vectors,"a"`
132
133			`.globl reset_vector`
134
135			`reset_vector:`
136			`; Reset vector`
137			`.long CYG_LABEL_DEFN(_start)`
138			`.space 6*4`
139			`.long __interrupt7`
140			`.long __interrupt8`
141			`.long __interrupt9`
142			`.long __interrupt10`
143			`.long __interrupt11`
144			`.long __interrupt12`
145			`.long __interrupt13`
146			`.long __interrupt14`
147			`.long __interrupt15`
148			`.long __interrupt16`
149			`.long __interrupt17`
150			`.long __interrupt18`
151			`.long __interrupt19`
152			`.long __interrupt20`
153			`.long __interrupt21`
154			`.long __interrupt22`
155			`.long __interrupt23`
156			`.long __interrupt24`
157			`.long __interrupt25`
158			`.long __interrupt26`
159			`.long __interrupt27`
160			`.long __interrupt28`
161			`.long __interrupt29`
162			`.long __interrupt30`
163			`.long __interrupt31`
164			`.long __interrupt32`
165			`.long __interrupt33`
166			`.long __interrupt34`
167			`.long __interrupt35`
168			`.long __interrupt36`
169			`.long __interrupt37`
170			`.long __interrupt38`
171			`.long __interrupt39`
172			`.long __interrupt40`
173			`.long __interrupt41`
174			`.long __interrupt42`
175			`.long __interrupt43`
176			`.long __interrupt44`
177			`.long __interrupt45`
178			`.long __interrupt46`
179			`.long __interrupt47`
180			`.long __interrupt48`
181			`.long __interrupt49`
182			`.long __interrupt50`
183			`.long __interrupt51`
184			`.long __interrupt52`
185			`.long __interrupt53`
186			`.long __interrupt54`
187			`.long __interrupt55`
188			`.long __interrupt56`
189			`.long __interrupt57`
190			`.long __interrupt58`
191			`.long __interrupt59`
192			`.long __interrupt60`
193			`.long __interrupt61`
194			`.long __interrupt62`
195			`.long __interrupt63`
196
197			`#endif`
198
199			`#define INTERRUPT_ENTRY(no) \`
200			`__interrupt##no: \`
201			`jsr @interrupt_entry`
202
203			`.section .int_fook_table,"a"`
204			`.space 7*4`
205			`__interrupt_table:`
206			`INTERRUPT_ENTRY(7)`
207			`INTERRUPT_ENTRY(8)`
208			`INTERRUPT_ENTRY(9)`
209			`INTERRUPT_ENTRY(10)`
210			`INTERRUPT_ENTRY(11)`
211			`INTERRUPT_ENTRY(12)`
212			`INTERRUPT_ENTRY(13)`
213			`INTERRUPT_ENTRY(14)`
214			`INTERRUPT_ENTRY(15)`
215			`INTERRUPT_ENTRY(16)`
216			`INTERRUPT_ENTRY(17)`
217			`INTERRUPT_ENTRY(18)`
218			`INTERRUPT_ENTRY(19)`
219			`INTERRUPT_ENTRY(20)`
220			`INTERRUPT_ENTRY(21)`
221			`INTERRUPT_ENTRY(22)`
222			`INTERRUPT_ENTRY(23)`
223			`INTERRUPT_ENTRY(24)`
224			`INTERRUPT_ENTRY(25)`
225			`INTERRUPT_ENTRY(26)`
226			`INTERRUPT_ENTRY(27)`
227			`INTERRUPT_ENTRY(28)`
228			`INTERRUPT_ENTRY(29)`
229			`INTERRUPT_ENTRY(30)`
230			`INTERRUPT_ENTRY(31)`
231			`INTERRUPT_ENTRY(32)`
232			`INTERRUPT_ENTRY(33)`
233			`INTERRUPT_ENTRY(34)`
234			`INTERRUPT_ENTRY(35)`
235			`INTERRUPT_ENTRY(36)`
236			`INTERRUPT_ENTRY(37)`
237			`INTERRUPT_ENTRY(38)`
238			`INTERRUPT_ENTRY(39)`
239			`INTERRUPT_ENTRY(40)`
240			`INTERRUPT_ENTRY(41)`
241			`INTERRUPT_ENTRY(42)`
242			`INTERRUPT_ENTRY(43)`
243			`INTERRUPT_ENTRY(44)`
244			`INTERRUPT_ENTRY(45)`
245			`INTERRUPT_ENTRY(46)`
246			`INTERRUPT_ENTRY(47)`
247			`INTERRUPT_ENTRY(48)`
248			`INTERRUPT_ENTRY(49)`
249			`INTERRUPT_ENTRY(50)`
250			`INTERRUPT_ENTRY(51)`
251			`INTERRUPT_ENTRY(52)`
252			`INTERRUPT_ENTRY(53)`
253			`INTERRUPT_ENTRY(54)`
254			`INTERRUPT_ENTRY(55)`
255			`INTERRUPT_ENTRY(56)`
256			`INTERRUPT_ENTRY(57)`
257			`INTERRUPT_ENTRY(58)`
258			`INTERRUPT_ENTRY(59)`
259			`INTERRUPT_ENTRY(60)`
260			`INTERRUPT_ENTRY(61)`
261			`INTERRUPT_ENTRY(62)`
262			`INTERRUPT_ENTRY(63)`
263
264			`##-----------------------------------------------------------------------------`
265			`## Startup code`
266
267			`.text`
268
269			`.globl CYG_LABEL_DEFN(_start)`
270			`CYG_LABEL_DEFN(_start):`
271			`; set up stack`
272
273			`mov.l #__interrupt_stack,sp`
274			`ldc #0x80,ccr`
275
276			`; Initialize hardware`
277			`hal_cpu_init`
278			`hal_mmu_init`
279			`hal_memc_init`
280			`hal_diag_init`
281			`hal_intc_init`
282			`hal_cache_init`
283			`hal_timer_init`
284			`hal_mon_init`
285
286			`#ifdef CYG_HAL_STARTUP_ROM`
287
288			`; Copy data from ROM to RAM`
289
290			`mov.l #CYG_LABEL_DEFN(__rom_data_start),er5`
291			`mov.l #CYG_LABEL_DEFN(__ram_data_start),er6`
292			`mov.l #CYG_LABEL_DEFN(__ram_data_end),er4`
293			`sub.l er6,er4`
294			`1:`
295			`eepmov.w`
296			`dec.w #1,e4`
297			`cmp.w #-1,e4`
298			`bhi 1b`
299
300			`#endif`
301
302			`; Setup Interrupt Vector (virtual)`
303			`mov.l #CYG_LABEL_DEFN(__rom_int_fook_start),er5`
304			`mov.l #CYG_LABEL_DEFN(__int_fook_start),er6`
305			`mov.l #CYG_LABEL_DEFN(__int_fook_end),er4`
306			`sub.l er6,er4`
307			`1:`
308			`eepmov.w`
309			`dec.w #1,e4`
310			`cmp.w #-1,e4`
311			`bhi 1b`
312
313			`; Clear BSS`
314			`mov.l #CYG_LABEL_DEFN(__bss_start),er5`
315			`mov.l er5,er6`
316			`adds #1,er6`
317			`mov.l #CYG_LABEL_DEFN(__bss_end),er4`
318			`sub.l #CYG_LABEL_DEFN(__bss_start),er4`
319
320			`mov.b #0,r0l`
321			`mov.b r0l,@er5`
322			`1:`
323			`eepmov.w`
324			`dec.w #1,e4`
325			`cmp.w #-1,e4`
326			`bhi 1b`
327
328			`; Call variant and platform HAL`
329			`; initialization routines.`
330
331			`.extern CYG_LABEL_DEFN(hal_variant_init)`
332			`jsr @CYG_LABEL_DEFN(hal_variant_init)`
333
334			`.extern CYG_LABEL_DEFN(hal_platform_init)`
335			`jsr @CYG_LABEL_DEFN(hal_platform_init)`
336
337			`; Call constructors`
338
339			`.extern CYG_LABEL_DEFN(cyg_hal_invoke_constructors)`
340			`jsr @CYG_LABEL_DEFN(cyg_hal_invoke_constructors)`
341
342			`#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS`
343			`.extern CYG_LABEL_DEFN(initialize_stub)`
344			`jsr @CYG_LABEL_DEFN(initialize_stub)`
345			`#endif`
346
347			`#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) \`
348			`\|\| defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)`
349			`.extern CYG_LABEL_DEFN(hal_ctrlc_isr_init)`
350			`jsr @CYG_LABEL_DEFN(hal_ctrlc_isr_init)`
351			`#endif`
352
353
354			`mov.b #0x9a,r0l`
355			`mov.b r0l,@0xfee027`
356			`; Call cyg_start`
357			`sub.l er0,er0`
358
359			`.extern CYG_LABEL_DEFN(cyg_start)`
360			`jsr @CYG_LABEL_DEFN(cyg_start)`
361
362			`9:`
363			`bra 9b ; Loop if we return`
364
365			`interrupt_entry:`
366			`mov.l er0,@-sp`
367			`mov.l @(4,sp),er0`
368			`sub.l #__interrupt_table,er0`
369			`shlr.l er0`
370			`shlr.l er0`
371			`add.w #7,r0`
372			`mov.l er0,@CYG_LABEL_DEFN(_intvector)`
373			`mov.l @sp+,er0`
374			`adds #4,sp`
375			`#ifdef CYGPKG_CYGMON`
376			`hal_cygmon_switch_app_stack`
377			`#endif`
378			`hal_cpu_save_all ; push all registers`
379			`mov.l @CYG_LABEL_DEFN(_intvector),er0`
380			`shll.l er0`
381			`shll.l er0`
382			`mov.l @(CYG_LABEL_DEFN(hal_vsr_table),er0),er0`
383			`jmp @er0`
384
385			`##-----------------------------------------------------------------------------`
386			`## The following macros are defined depending on whether the HAL is configured`
387			`## to support the kernel or not.`
388
389			`#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT`
390
391			`.extern CYG_LABEL_DEFN(cyg_scheduler_sched_lock)`
392
393			`; Increment the scheduler lock`
394
395			`.macro increment_sched_lock reg=er0`
396			`mov.l @CYG_LABEL_DEFN(cyg_scheduler_sched_lock),\reg`
397			`inc.l #1,\reg`
398			`mov.l \reg,@CYG_LABEL_DEFN(cyg_scheduler_sched_lock)`
399			`.endm`
400
401			`#else`
402
403			`.macro increment_sched_lock reg=er0`
404			`.endm`
405
406			`#endif`
407
408			`##-----------------------------------------------------------------------------`
409			`## Default interrupt VSR`
410
411			`.text`
412			`.globl CYG_LABEL_DEFN(__default_interrupt_vsr)`
413			`CYG_LABEL_DEFN(__default_interrupt_vsr):`
414
415			`; We come here with all the registers pushed`
416			`; onto the stack.`
417
418			`hal_diag_intr_start`
419
420			`increment_sched_lock`
421
422			`#if defined(CYGPKG_CYGMON)`
423			`// For Cygmon, we saved this back when we originally switched stacks.`
424			`mov.l @sp,er1 ; A2 = saved thread state`
425			`#elif defined(CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK)`
426			`; Increment interrupt nesting counter`
427			`mov.l sp,er1`
428			`mov.l #__interrupt_stack,er0 ; A0 = interrupt stack top`
429			`cmp.l #__interrupt_stack_base,sp ; compare with base of stack`
430			`blt 1f ; if lt switch to int stack`
431			`cmp.l er0,sp ; compare sp with stack top`
432			`ble 8f ; if le already on istack`
433			`1:`
434			`mov.l er0,sp ; switch to new SP`
435			`8:`
436			`mov.l er1,@-sp ; save old SP`
437			`mov.l @er1,er1`
438
439			`#else`
440			`mov @sp,er1 ; A2 = saved thread state`
441			`#endif`
442
443			`; Here D3 contains the table byte offset of the vector to`
444			`; call.`
445
446			`#if defined(CYGPKG_KERNEL_INSTRUMENT) && defined(CYGDBG_KERNEL_INSTRUMENT_INTR)`
447
448			`; Call cyg_instrument to record that this interrupt is being raised.`
449
450			`.extern CYG_LABEL_DEFN(cyg_instrument)`
451			`mov.l er1,er3`
452			`mov.l #0x0301,er0 ; type = INTR,RAISE`
453			`mov.l @CYG_LABEL_DEFN(_intvector),er2 ; arg2 = table offset`
454			`jsr CYG_LABEL_DEFN(cyg_instrument) ; call instrumentation`
455
456			`#endif`
457
458			`#ifdef CYGSEM_HAL_COMMON_INTERRUPTS_ALLOW_NESTING`
459
460			`; To allow nested interrupts, we set the IE bit. We do`
461			`; not touch the IPL bits, so only higher priority interrupts`
462			`; will be nested on top of us. Also, new interrupts will not`
463			`; be delivered until the ISR calls`
464			`; Cyg_Interrupt::acknowledge_interrupt(). At some future point`
465			`; we may want to do the ack stuff here to allow immediate nesting.`
466
467			`andc #0x7f,ccr`
468
469			`#endif`
470			`#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) \|\| \`
471			`defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)`
472
473			`; If we have Ctrl-C support enabled, save a pointer to the`
474			`; saved CPU state here so we can plant a breakpoint there if`
475			`; this is a ^C.`
476
477			`.extern CYG_LABEL_DEFN(hal_saved_interrupt_state)`
478			`mov.l er3,@CYG_LABEL_DEFN(hal_saved_interrupt_state)`
479
480			`#endif`
481			`mov.l @CYG_LABEL_DEFN(_intvector),er0`
482			`shll.l er0`
483			`shll.l er0`
484			`mov.l @(CYG_LABEL_DEFN(hal_interrupt_handlers),er0),er2`
485
486			`mov.l @(CYG_LABEL_DEFN(hal_interrupt_data),er0),er1`
487
488			`shlr.l er0`
489			`shlr.l er0`
490
491			`jsr @er2`
492
493			`; on return d0 bit 1 will indicate whether a DSR is`
494			`; to be posted. Pass this together with a pointer to`
495			`; the interrupt object we have just used to the`
496			`; interrupt tidy up routine.`
497
498			`; D3 is defined to be saved across procedure calls, and`
499			`; should still contain the vector byte index. Similarly,`
500			`; A2 should still point to the saved machine state.`
501
502			`#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT`
503			`; If interrupt was caused by GDB, the ISR call above`
504			`; is skipped by jumping here.`
505			`2:`
506			`#endif`
507
508			`#if defined(CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK) && !defined(CYGPKG_CYGMON)`
509
510			`; If we are returning from the last nested interrupt, move back`
511			`; to the thread stack. interrupt_end() must be called on the`
512			`; thread stack since it potentially causes a context switch.`
513
514			`mov.l @sp+,sp ; pop old sp`
515
516			`#endif`
517
518			`#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT`
519
520			`; We only need to call _interrupt_end() when there is a kernel`
521			`; present to do any tidying up.`
522
523			`; Using the vector offset in D3, get the interrupt object pointer`
524			`; into D1.`
525			`mov.l @CYG_LABEL_DEFN(_intvector),er1`
526			`shll.l er1`
527			`shll.l er1`
528			`mov.l @(CYG_LABEL_DEFN(hal_interrupt_objects),er1),er1`
529
530			`; Even when this is not the last nested interrupt, we must call`
531			`; _interrupt_end() to post the DSR and decrement the scheduler`
532			`; lock.`
533
534			`mov.l er3,er2 ; arg3 = saved state.`
535
536			`jsr @CYG_LABEL_DEFN(interrupt_end) ; call interrupt end fn`
537			`#endif`
538
539
540			`# show_interrupts`
541
542			`hal_diag_restore`
543
544			`hal_cpu_load_all`
545			`#ifdef CYGPKG_CYGMON`
546			`hal_cygmon_restore_app_stack`
547			`#endif`
548			`rte ; and return`
549
550			`.section .bss`
551			`.global CYG_LABEL_DEFN(_intvector)`
552			`CYG_LABEL_DEFN(_intvector):`
553			`.long 0`
554
555			`.text`
556			`##-----------------------------------------------------------------------------`
557			`## Execute pending DSRs on the interrupt stack with interrupts enabled.`
558			`## Note: this can only be called from code running on a thread stack`
559
560			`#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK`
561			`.extern CYG_LABEL_DEFN(cyg_interrupt_call_pending_DSRs)`
562			`.global CYG_LABEL_DEFN(hal_interrupt_stack_call_pending_DSRs)`
563
564			`CYG_LABEL_DEFN(hal_interrupt_stack_call_pending_DSRs):`
565			`mov.l er5,@-sp ; save some work regs`
566			`mov.l er6,@-sp`
567			`mov.l sp,er6 ; save current SP`
568			`mov.l #__interrupt_stack,sp ; interrupt stack pointer`
569			`stc ccr,r5l ; save PSW`
570			`hal_cpu_int_enable ; enable interrupts`
571
572			`; Call kernel code to invoke DSRs.`
573			`jsr @CYG_LABEL_DEFN(cyg_interrupt_call_pending_DSRs)`
574
575			`; On return the old SP in a2 and the old PSW in d2 will`
576			`; have been preserved by the calling conventions.`
577
578			`hal_cpu_int_merge r5l ; Restore previous PSW`
579			`mov.l er6,sp ; restore old SP`
580			`mov.l @sp+,er6 ; Retrieve old work regs`
581			`mov.l @sp+,er5`
582			`rts ; and return`
583
584			`#endif`
585
586			`#ifdef CYGPKG_CYGMON`
587			`.section .bss`
588			`er0_save:`
589			`.long 0`
590			`er1_save:`
591			`.long 0`
592			`er2_save:`
593			`.long 0`
594			`er3_save:`
595			`.long 0`
596			`er4_save:`
597			`.long 0`
598			`er5_save:`
599			`.long 0`
600			`er6_save:`
601			`.long 0`
602			`sp_save:`
603			`.long 0`
604			`#endif`
605
606			`##-----------------------------------------------------------------------------`
607			`## Default TRAP VSR`
608
609			`.text`
610			`.globl CYG_LABEL_DEFN(__default_trap_vsr)`
611			`CYG_LABEL_DEFN(__default_trap_vsr):`
612
613			`#ifdef CYG_HAL_DIAG_EXCPT_END`
614			`hal_diag_excpt_start`
615			`#endif`
616
617			`mov.l sp,er0`
618			`mov.l @CYG_LABEL_DEFN(_intvector),er1`
619
620			`jsr @CYG_LABEL_DEFN(cyg_hal_exception_handler)`
621
622			`#ifdef CYG_HAL_DIAG_EXCPT_END`
623			`hal_diag_excpt_end`
624			`#endif`
625			`hal_cpu_load_all`
626			`#ifdef CYGPKG_CYGMON`
627			`hal_cygmon_restore_app_stack`
628			`#endif`
629			`rte`
630
631			`##-----------------------------------------------------------------------------`
632			`## VSR table. The VSRs pointed to by this table are called from the stubs`
633			`## connected to the hardware.`
634
635			`#ifndef CYG_HAL_H8300_VSR_TABLE_DEFINED`
636
637			`.data`
638
639			`.globl CYG_LABEL_DEFN(hal_vsr_table)`
640			`CYG_LABEL_DEFN(hal_vsr_table):`
641			`.long CYG_LABEL_DEFN(__default_trap_vsr)`
642			`.long 0`
643			`.long 0`
644			`.long 0`
645			`.long 0`
646			`.long 0`
647			`.long 0`
648			`.long CYG_LABEL_DEFN(__default_trap_vsr)`
649			`.long CYG_LABEL_DEFN(__default_trap_vsr)`
650			`.long CYG_LABEL_DEFN(__default_trap_vsr)`
651			`.long CYG_LABEL_DEFN(__default_trap_vsr)`
652			`.long CYG_LABEL_DEFN(__default_trap_vsr)`
653
654			`.rept 64-12`
655			`.long CYG_LABEL_DEFN(__default_interrupt_vsr)`
656			`.endr`
657			`#endif`
658
659			`##-----------------------------------------------------------------------------`
660			`## Interrupt tables`
661
662			`.data`
663
664			`.extern CYG_LABEL_DEFN(hal_default_isr)`
665
666			`.globl CYG_LABEL_DEFN(hal_interrupt_handlers)`
667			`CYG_LABEL_DEFN(hal_interrupt_handlers):`
668			`.rept CYG_ISR_TABLE_SIZE`
669			`.long CYG_LABEL_DEFN(hal_default_isr)`
670			`.endr`
671
672			`.globl CYG_LABEL_DEFN(hal_interrupt_data)`
673			`CYG_LABEL_DEFN(hal_interrupt_data):`
674			`.rept CYG_ISR_TABLE_SIZE`
675			`.long 0`
676			`.endr`
677
678			`.globl CYG_LABEL_DEFN(hal_interrupt_objects)`
679			`CYG_LABEL_DEFN(hal_interrupt_objects):`
680			`.rept CYG_ISR_TABLE_SIZE`
681			`.long 0`
682			`.endr`
683
684
685			`##-----------------------------------------------------------------------------`
686			`## Temporary interrupt stack`
687
688			`.section .bss`
689
690			`.balign 16`
691			`.global _cyg_interrupt_stack_base`
692			`_cyg_interrupt_stack_base:`
693			`__interrupt_stack_base:`
694			`.rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE`
695			`.byte 0`
696			`.endr`
697			`.balign 16`
698			`.global _cyg_interrupt_stack`
699			`_cyg_interrupt_stack:`
700			`__interrupt_stack:`
701
702			`#ifdef CYGPKG_CYGMON`
703			`.balign 16`
704			`.global __cygmon_interrupt_stack_base`
705			`__cygmon_interrupt_stack_base:`
706			`.rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE`
707			`.byte 0`
708			`.endr`
709			`.balign 16`
710			`.global __cygmon_interrupt_stack`
711			`__cygmon_interrupt_stack:`
712			`#endif`
713
714			`.long 0,0,0,0,0,0,0,0`
715
716			`##-----------------------------------------------------------------------------`
717
718			`.data`
719			`hal_diag_data`
720
721
722			`##-----------------------------------------------------------------------------`
723			`## end of vectors.S`
724