OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [h8300/] [h8300h/] [v2_0/] [include/] [variant.inc] - Blame information for rev 307

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 27 unneback
#ifndef CYGONCE_HAL_VARIANT_INC
2
#define CYGONCE_HAL_VARIANT_INC
3
##=============================================================================
4
##
5
##      variant.inc
6
##
7
##      H8/300H assembler header file
8
##
9
##=============================================================================
10
#####ECOSGPLCOPYRIGHTBEGIN####
11
## -------------------------------------------
12
## This file is part of eCos, the Embedded Configurable Operating System.
13
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
14
##
15
## eCos is free software; you can redistribute it and/or modify it under
16
## the terms of the GNU General Public License as published by the Free
17
## Software Foundation; either version 2 or (at your option) any later version.
18
##
19
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
20
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
21
## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
22
## for more details.
23
##
24
## You should have received a copy of the GNU General Public License along
25
## with eCos; if not, write to the Free Software Foundation, Inc.,
26
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27
##
28
## As a special exception, if other files instantiate templates or use macros
29
## or inline functions from this file, or you compile this file and link it
30
## with other works to produce a work based on this file, this file does not
31
## by itself cause the resulting work to be covered by the GNU General Public
32
## License. However the source code for this file must still be made available
33
## in accordance with section (3) of the GNU General Public License.
34
##
35
## This exception does not invalidate any other reasons why a work based on
36
## this file might be covered by the GNU General Public License.
37
##
38
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
39
## at http://sources.redhat.com/ecos/ecos-license/
40
## -------------------------------------------
41
#####ECOSGPLCOPYRIGHTEND####
42
##=============================================================================
43
#######DESCRIPTIONBEGIN####
44
##
45
## Author(s):   nickg
46
## Contributors:        nickg
47
## Date:        1999-04-06
48
## Purpose:     H8/300H definitions.
49
## Description: This file contains various definitions and macros that are
50
##              useful for writing assembly code for the H8/300H CPU variant.
51
## Usage:
52
##              #include 
53
##              ...
54
##
55
##
56
######DESCRIPTIONEND####
57
##
58
##=============================================================================
59
 
60
#include 
61
 
62
#include 
63
 
64
 
65
#------------------------------------------------------------------------------
66
# Register definitions
67
 
68
#define SYSCR 0xfee012
69
 
70
#------------------------------------------------------------------------------
71
# CPU state save and restore macros
72
 
73
        .macro  hal_cpu_save_all
74
        stc     ccr,@-sp
75
        subs    #2,sp
76
        subs    #4,sp
77
        mov.l   er6,@-sp                # push all registers
78
        mov.l   er5,@-sp
79
        mov.l   er4,@-sp
80
        mov.l   er3,@-sp
81
        mov.l   er2,@-sp
82
        mov.l   er1,@-sp
83
        mov.l   er0,@-sp
84
        .endm
85
 
86
        .macro  hal_cpu_load_all
87
        mov.l   @sp+,er0                # pop regs
88
        mov.l   @sp+,er1
89
        mov.l   @sp+,er2
90
        mov.l   @sp+,er3
91
        mov.l   @sp+,er4
92
        mov.l   @sp+,er5
93
        mov.l   @sp+,er6
94
        adds    #4,sp
95
        adds    #2,sp
96
        ldc     @sp+,ccr
97
        .endm
98
 
99
 
100
# Location of PC in saved register context (HAL_SavedRegisters)
101
#define SAVED_CONTEXT_PC_OFFSET          36
102
 
103
##-----------------------------------------------------------------------------
104
# Default interrupt decoding macros.
105
 
106
#ifndef CYGPKG_HAL_H8300_INTC_DEFINED
107
 
108
#define CYG_ISR_TABLE_SIZE       64
109
 
110
        .macro  hal_intc_init
111
        mov.b   @SYSCR,r0l
112
        bclr    #3,r0l
113
        mov.b   r0l,@SYSCR
114
        .endm
115
 
116
#define CYGPKG_HAL_H8300_INTC_DEFINED
117
 
118
#endif
119
 
120
 
121
 
122
#ifndef CYGPKG_HAL_H8300_MON_DEFINED
123
 
124
        .macro  hal_mon_init
125
        .endm
126
 
127
#if !(defined(CYG_HAL_STARTUP_ROM)              || \
128
        defined(CYGPKG_HAL_H8300_H8300H_SIM)    || \
129
        !defined(CYGSEM_HAL_USE_ROM_MONITOR))
130
 
131
#define CYG_HAL_H8300_VSR_TABLE_DEFINED
132
 
133
#endif
134
 
135
 
136
 
137
#define CYGPKG_HAL_H8300_MON_DEFINED
138
 
139
#endif
140
 
141
 
142
 
143
#------------------------------------------------------------------------------
144
#endif // ifndef CYGONCE_HAL_VARIANT_INC
145
# end of variant.inc

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.