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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [h8300/] [sim/] [v2_0/] [include/] [pkgconf/] [mlt_h8300_h8300h_sim_ram.h] - Blame information for rev 174

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1 27 unneback
// eCos memory layout - Wed Nov 24 13:10:23 1999
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// This is a generated file - changes will be lost if ConfigTool(MLT) is run
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#ifndef __ASSEMBLER__
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#include <cyg/infra/cyg_type.h>
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#include <stddef.h>
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#endif
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#define CYGMEM_REGION_ram (0x200000)
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#define CYGMEM_REGION_ram_SIZE (0x200000)
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#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
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#ifndef __ASSEMBLER__
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extern char CYG_LABEL_NAME (__heap1) [];
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#endif
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#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
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#define CYGMEM_SECTION_heap1_SIZE (0x300000 - (size_t) CYG_LABEL_NAME (__heap1))

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