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#ifndef CYGONCE_HAL_HAL_ARCH_H
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#define CYGONCE_HAL_HAL_ARCH_H
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//=============================================================================
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//
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// hal_arch.h
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//
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// Architecture specific abstractions
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//
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//=============================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): proven
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// Contributors:proven, pjo, nickg
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// Date: 1998-10-05
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// Purpose: Define architecture abstractions
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// Usage: #include <cyg/hal/hal_arch.h>
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//
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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#include <pkgconf/hal.h>
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#include <cyg/infra/cyg_type.h>
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#include <cyg/hal/var_arch.h>
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//-----------------------------------------------------------------------------
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// Processor saved states. This structure is also defined in i386.inc for
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// assembly code. Do not change this without changing that (or vice versa).
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#ifdef CYGHWR_HAL_I386_FPU
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typedef struct
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{
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cyg_uint32 fpstate_valid;
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cyg_uint32 fpstate[108/sizeof(cyg_uint32)];
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#ifdef CYGHWR_HAL_I386_PENTIUM_SSE
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cyg_uint32 xmm0[4];
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cyg_uint32 xmm1[4];
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cyg_uint32 xmm2[4];
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cyg_uint32 xmm3[4];
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cyg_uint32 xmm4[4];
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cyg_uint32 xmm5[4];
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cyg_uint32 xmm6[4];
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cyg_uint32 xmm7[4];
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cyg_uint32 mxcsr;
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#endif
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} HAL_FPU_Context;
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#endif
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typedef struct
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{
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#ifdef CYGHWR_HAL_I386_FPU
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#ifdef CYGHWR_HAL_I386_FPU_SWITCH_LAZY
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HAL_FPU_Context *fpucontext;
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#else
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HAL_FPU_Context fpucontext;
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#endif
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#endif
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cyg_uint32 edi;
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cyg_uint32 esi;
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cyg_uint32 ebp;
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cyg_uint32 esp;
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cyg_uint32 ebx;
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cyg_uint32 edx;
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cyg_uint32 ecx;
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cyg_uint32 eax;
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cyg_uint32 vector; // if saved on interrupt contains intr vector
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cyg_uint32 pc;
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cyg_uint32 cs;
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cyg_uint32 eflags;
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} HAL_SavedRegisters;
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//-----------------------------------------------------------------------------
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// Exception handling function.
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// This function is defined by the kernel according to this prototype. It is
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// invoked from the HAL to deal with any CPU exceptions that the HAL does
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// not want to deal with itself. It usually invokes the kernel's exception
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// delivery mechanism.
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externC void cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data );
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//-----------------------------------------------------------------------------
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// Bit manipulation routines
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#define HAL_LSBIT_INDEX(index, mask) \
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CYG_MACRO_START \
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asm volatile( "bsfl %1,%0\n" \
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: "=r" (index) \
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: "r" (mask) \
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); \
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CYG_MACRO_END
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#define HAL_MSBIT_INDEX(index, mask) \
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CYG_MACRO_START \
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asm volatile( "bsrl %1,%0\n" \
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: "=r" (index) \
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: "r" (mask) \
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); \
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CYG_MACRO_END
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//-----------------------------------------------------------------------------
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// Context Initialization
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// Initialize the context of a thread.
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// Arguments:
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// _sp_ name of variable containing current sp, will be written with new sp
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// _thread_ thread object address, passed as argument to entry point
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// _entry_ entry point address.
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// _id_ bit pattern used in initializing registers, for debugging.
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#ifndef CYG_HAL_DEFAULT_CS
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#define CYG_HAL_DEFAULT_CS 0x0008
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#endif
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#ifdef CYGHWR_HAL_I386_FPU
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# ifdef CYGHWR_HAL_I386_FPU_SWITCH_LAZY
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# define HAL_THREAD_INIT_FPU_CONTEXT_SPACE( __sp, __fpspace ) \
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__sp -= sizeof(HAL_FPU_Context); \
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__fpspace = __sp;
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# define HAL_THREAD_INIT_FPU_CONTEXT( __regs, __fpspace ) \
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CYG_MACRO_START \
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cyg_ucount8 __i; \
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HAL_FPU_Context *__fpspace_ = (HAL_FPU_Context *)(__fpspace); \
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(__regs)->fpucontext = __fpspace_; \
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__fpspace_->fpstate_valid = 0; \
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for( __i = 0; __i < (sizeof(__fpspace_->fpstate)/sizeof(cyg_uint32)); __i++ ) \
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__fpspace_->fpstate[__i] = 0; \
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CYG_MACRO_END
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# else
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# define HAL_THREAD_INIT_FPU_CONTEXT_SPACE( __sp, __fpspace ) \
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(__fpspace) = (__fpspace);
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# define HAL_THREAD_INIT_FPU_CONTEXT( __regs, __fpspace ) \
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CYG_MACRO_START \
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cyg_ucount8 __i; \
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HAL_FPU_Context *__fpspace_ = &((__regs)->fpucontext); \
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__fpspace_->fpstate_valid = 0; \
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for( __i = 0; __i < (sizeof(__fpspace_->fpstate)/sizeof(cyg_uint32)); __i++ ) \
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__fpspace_->fpstate[__i] = 0; \
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CYG_MACRO_END
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# endif
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#else
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# define HAL_THREAD_INIT_FPU_CONTEXT_SPACE( __sp, __fpspace ) \
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(__fpspace) = (__fpspace);
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# define HAL_THREAD_INIT_FPU_CONTEXT( __regs, __fpspace )
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#endif
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#define HAL_THREAD_INIT_CONTEXT( _sparg_, _thread_, _entry_, _id_ ) \
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CYG_MACRO_START \
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register CYG_WORD* _sp_ = ((CYG_WORD*)((_sparg_) &~15)); \
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register CYG_WORD *_fpspace_ = NULL; \
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register HAL_SavedRegisters *_regs_; \
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\
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HAL_THREAD_INIT_FPU_CONTEXT_SPACE( _sp_, _fpspace_ ); \
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*(--_sp_) = (CYG_WORD)(0); \
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*(--_sp_) = (CYG_WORD)(0); \
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*(--_sp_) = (CYG_WORD)(_thread_); \
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*(--_sp_) = (CYG_WORD)(0); \
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\
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_regs_ = (HAL_SavedRegisters *) \
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((unsigned long)_sp_ - sizeof(HAL_SavedRegisters)); \
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HAL_THREAD_INIT_FPU_CONTEXT( _regs_, _fpspace_ ); \
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_regs_->eflags = (CYG_WORD)(0x00000200); \
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_regs_->cs = (CYG_WORD)(CYG_HAL_DEFAULT_CS); \
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_regs_->pc = (CYG_WORD)(_entry_); \
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_regs_->vector = (CYG_WORD)(_id_); \
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_regs_->esp = (CYG_WORD) _sp_-4; \
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_regs_->ebp = (CYG_WORD)(_id_); \
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_regs_->esi = (CYG_WORD)(_id_); \
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_regs_->edi = (CYG_WORD)(_id_); \
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_regs_->eax = (CYG_WORD)(_id_); \
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_regs_->ebx = (CYG_WORD)(_id_); \
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_regs_->ecx = (CYG_WORD)(_id_); \
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_regs_->edx = (CYG_WORD)(_id_); \
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(_sparg_) = (CYG_ADDRESS) _regs_; \
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CYG_MACRO_END
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//-----------------------------------------------------------------------------
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// Context switch macros.
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// The arguments are pointers to locations where the stack pointer
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// of the current thread is to be stored, and from where the sp of the
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// next thread is to be fetched.
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externC void hal_thread_switch_context( CYG_ADDRESS to, CYG_ADDRESS from );
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externC void hal_thread_load_context( CYG_ADDRESS to )
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__attribute__ ((noreturn));
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#define HAL_THREAD_SWITCH_CONTEXT(_fspptr_,_tspptr_) \
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hal_thread_switch_context((CYG_ADDRESS)_tspptr_,(CYG_ADDRESS)_fspptr_);
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#define HAL_THREAD_LOAD_CONTEXT(_tspptr_) \
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hal_thread_load_context( (CYG_ADDRESS)_tspptr_ );
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//-----------------------------------------------------------------------------
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// Execution reorder barrier.
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// When optimizing the compiler can reorder code. In multithreaded systems
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// where the order of actions is vital, this can sometimes cause problems.
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// This macro may be inserted into places where reordering should not happen.
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#define HAL_REORDER_BARRIER() asm volatile ( "" : : : "memory" )
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//-----------------------------------------------------------------------------
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// Breakpoint support
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// HAL_BREAKPOINT() is a code sequence that will cause a breakpoint to happen
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// if executed.
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// HAL_BREAKINST is the value of the breakpoint instruction and
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// HAL_BREAKINST_SIZE is its size in bytes.
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#define HAL_BREAKPOINT(_label_) \
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CYG_MACRO_START \
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asm volatile (" .globl " #_label_ ";" \
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#_label_":" \
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"int $3" \
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); \
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CYG_MACRO_END
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#define HAL_BREAKINST 0xCC
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#define HAL_BREAKINST_SIZE 1
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//-----------------------------------------------------------------------------
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// Thread register state manipulation for GDB support.
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// Translate a stack pointer as saved by the thread context macros above into
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// a pointer to a HAL_SavedRegisters structure.
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#define HAL_THREAD_GET_SAVED_REGISTERS( _sp_, _regs_ ) \
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(_regs_) = (HAL_SavedRegisters *)(_sp_)
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// Copy a set of registers from a HAL_SavedRegisters structure into a
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// GDB ordered array.
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externC void hal_get_gdb_registers(CYG_ADDRWORD *, HAL_SavedRegisters *);
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externC void hal_set_gdb_registers(HAL_SavedRegisters *, CYG_ADDRWORD *);
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#define HAL_GET_GDB_REGISTERS( _aregval_, _regs_ ) \
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hal_get_gdb_registers((CYG_ADDRWORD *)(_aregval_), (_regs_))
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// Copy a GDB ordered array into a HAL_SavedRegisters structure.
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#define HAL_SET_GDB_REGISTERS( _regs_ , _aregval_ ) \
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hal_set_gdb_registers((_regs_), (CYG_ADDRWORD *)(_aregval_))
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//-----------------------------------------------------------------------------
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// HAL setjmp
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#define CYGARC_JMP_BUF_SP 0
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#define CYGARC_JMP_BUF_EBP 1
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#define CYGARC_JMP_BUF_EBX 2
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#define CYGARC_JMP_BUF_ESI 3
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#define CYGARC_JMP_BUF_EDI 4
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#define CYGARC_JMP_BUF_PC 5
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#define CYGARC_JMP_BUF_SIZE 6
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typedef cyg_uint32 hal_jmp_buf[CYGARC_JMP_BUF_SIZE];
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externC int hal_setjmp(hal_jmp_buf env);
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externC void hal_longjmp(hal_jmp_buf env, int val);
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//-----------------------------------------------------------------------------
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// Idle thread code.
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// This macro is called in the idle thread loop, and gives the HAL the
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// chance to insert code. Typical idle thread behaviour might be to halt the
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// processor.
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externC void hal_idle_thread_action(cyg_uint32 loop_count);
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#define HAL_IDLE_THREAD_ACTION(_count_) hal_idle_thread_action(_count_)
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//-----------------------------------------------------------------------------
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// Minimal and sensible stack sizes: the intention is that applications
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// will use these to provide a stack size in the first instance prior to
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// proper analysis. Idle thread stack should be this big.
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// THESE ARE NOT INTENDED TO BE MICROMETRICALLY ACCURATE FIGURES.
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// THEY ARE HOWEVER ENOUGH TO START PROGRAMMING.
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// YOU MUST MAKE YOUR STACKS LARGER IF YOU HAVE LARGE "AUTO" VARIABLES!
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// This is not a config option because it should not be adjusted except
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// under "enough rope" sort of disclaimers.
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// Stack frame overhead per call. Four arguments, 3 local registers
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// (edi, esi, ebx), four local variables and return address.
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#define CYGNUM_HAL_STACK_FRAME_SIZE (12 * 4)
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// Stack needed for a context switch ( sizeof(HAL_SavedRegisters) ).
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#ifdef CYGHWR_HAL_I386_FPU
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# define CYGNUM_HAL_STACK_CONTEXT_SIZE ((4 * 12) + 108)
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#else
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# define CYGNUM_HAL_STACK_CONTEXT_SIZE (4 * 12)
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#endif
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// Interrupt + call to ISR, interrupt_end() and the DSR
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#define CYGNUM_HAL_STACK_INTERRUPT_SIZE \
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((4*CYGNUM_HAL_STACK_CONTEXT_SIZE) + 4 * CYGNUM_HAL_STACK_FRAME_SIZE)
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329 |
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|
330 |
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// We define a minimum stack size as the minimum any thread could ever
|
331 |
|
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// legitimately get away with. We can throw asserts if users ask for less
|
332 |
|
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// than this. Allow enough for three interrupt sources - clock, serial and
|
333 |
|
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// one other
|
334 |
|
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|
335 |
|
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#if defined(CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK)
|
336 |
|
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|
337 |
|
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// An interrupt stack which is large enough for all possible interrupt
|
338 |
|
|
// conditions (and only used for that purpose) exists. "User" stacks
|
339 |
|
|
// can therefore be much smaller
|
340 |
|
|
|
341 |
|
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# define CYGNUM_HAL_STACK_SIZE_MINIMUM \
|
342 |
|
|
(2*CYGNUM_HAL_STACK_FRAME_SIZE + 2*CYGNUM_HAL_STACK_INTERRUPT_SIZE)
|
343 |
|
|
|
344 |
|
|
#else
|
345 |
|
|
|
346 |
|
|
// No separate interrupt stack exists. Make sure all threads contain
|
347 |
|
|
// a stack sufficiently large
|
348 |
|
|
|
349 |
|
|
# define CYGNUM_HAL_STACK_SIZE_MINIMUM \
|
350 |
|
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(((2+3+10)*CYGNUM_HAL_STACK_INTERRUPT_SIZE) + \
|
351 |
|
|
(2*CYGNUM_HAL_STACK_FRAME_SIZE))
|
352 |
|
|
|
353 |
|
|
#endif
|
354 |
|
|
|
355 |
|
|
// Now make a reasonable choice for a typical thread size. Pluck figures
|
356 |
|
|
// from thin air and say 15 call frames with an average of 16 words of
|
357 |
|
|
// automatic variables per call frame
|
358 |
|
|
|
359 |
|
|
#define CYGNUM_HAL_STACK_SIZE_TYPICAL \
|
360 |
|
|
(CYGNUM_HAL_STACK_SIZE_MINIMUM + \
|
361 |
|
|
15 * (CYGNUM_HAL_STACK_FRAME_SIZE+(16*4)))
|
362 |
|
|
|
363 |
|
|
//--------------------------------------------------------------------------
|
364 |
|
|
// Memory access macros
|
365 |
|
|
|
366 |
|
|
#define CYGARC_CACHED_ADDRESS(x) (x)
|
367 |
|
|
#define CYGARC_UNCACHED_ADDRESS(x) (x)
|
368 |
|
|
#define CYGARC_PHYSICAL_ADDRESS(x) (x)
|
369 |
|
|
|
370 |
|
|
//--------------------------------------------------------------------------
|
371 |
|
|
// Region size finder
|
372 |
|
|
|
373 |
|
|
#if CYGINT_HAL_I386_MEM_REAL_REGION_TOP
|
374 |
|
|
|
375 |
|
|
externC cyg_uint8 *hal_i386_mem_real_region_top( cyg_uint8 *_regionend_ );
|
376 |
|
|
|
377 |
|
|
# define HAL_MEM_REAL_REGION_TOP( _regionend_ ) \
|
378 |
|
|
hal_i386_mem_real_region_top( _regionend_ )
|
379 |
|
|
#endif
|
380 |
|
|
|
381 |
|
|
//--------------------------------------------------------------------------
|
382 |
|
|
// Macros for switching context between two eCos instances (jump from
|
383 |
|
|
// code in ROM to code in RAM or vice versa).
|
384 |
|
|
|
385 |
|
|
#define CYGARC_HAL_SAVE_GP()
|
386 |
|
|
#define CYGARC_HAL_RESTORE_GP()
|
387 |
|
|
|
388 |
|
|
//--------------------------------------------------------------------------
|
389 |
|
|
#endif // CYGONCE_HAL_HAL_ARCH_H
|
390 |
|
|
// End of hal_arch.h
|