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##=============================================================================
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##
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## i386.inc
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##
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## i386 assembler header file
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##
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##=============================================================================
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#####ECOSGPLCOPYRIGHTBEGIN####
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## -------------------------------------------
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## This file is part of eCos, the Embedded Configurable Operating System.
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## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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##
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## eCos is free software; you can redistribute it and/or modify it under
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## the terms of the GNU General Public License as published by the Free
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## Software Foundation; either version 2 or (at your option) any later version.
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##
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## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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## WARRANTY; without even the implied warranty of MERCHANTABILITY or
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## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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## for more details.
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##
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## You should have received a copy of the GNU General Public License along
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## with eCos; if not, write to the Free Software Foundation, Inc.,
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## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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##
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## As a special exception, if other files instantiate templates or use macros
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## or inline functions from this file, or you compile this file and link it
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## with other works to produce a work based on this file, this file does not
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## by itself cause the resulting work to be covered by the GNU General Public
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## License. However the source code for this file must still be made available
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## in accordance with section (3) of the GNU General Public License.
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##
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## This exception does not invalidate any other reasons why a work based on
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## this file might be covered by the GNU General Public License.
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##
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## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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## at http://sources.redhat.com/ecos/ecos-license/
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## -------------------------------------------
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#####ECOSGPLCOPYRIGHTEND####
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##=============================================================================
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#######DESCRIPTIONBEGIN####
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##
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## Author(s): jskov
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## Contributors:jskov
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## Date: 1999-01-20
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## Purpose: i386 definitions.
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## Description: This file contains various definitions and macros that are
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## useful for writing assembly code for the i386
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## Usage:
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## #include
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## ...
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##
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##
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######DESCRIPTIONEND####
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##
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##=============================================================================
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#------------------------------------------------------------------------------
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# Exception, interrupt and thread context save area layout
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# The layout of this structure is also defined in "hal_arch.h", for C
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# code. Do not change this without changing that (or vice versa).
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# See SYSV ABI4, i386 supplement (page 37-38)
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# http://www.mit.edu/afs/sipb/contrib/doc/specs/software/sysv-abi/i386-psABI-4.pdf
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# Callee save registers (eax, ecx, and edx are scratch registers)
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#ifdef CYGHWR_HAL_I386_FPU
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#ifdef CYGHWR_HAL_I386_FPU_SWITCH_LAZY
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.equ i386reg_fpucontext, 0
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.equ i386reg_edi, i386reg_fpucontext+4
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#else
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.equ i386reg_fpstate_valid, 0
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.equ i386reg_fpstate, i386reg_fpstate_valid+4
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#ifdef CYGHWR_HAL_I386_PENTIUM_SSE
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.equ i386reg_simd_xmm0, i386reg_fpstate+108
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.equ i386reg_simd_xmm1, i386reg_simd_xmm0+16
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.equ i386reg_simd_xmm2, i386reg_simd_xmm1+16
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.equ i386reg_simd_xmm3, i386reg_simd_xmm2+16
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.equ i386reg_simd_xmm4, i386reg_simd_xmm3+16
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.equ i386reg_simd_xmm5, i386reg_simd_xmm4+16
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.equ i386reg_simd_xmm6, i386reg_simd_xmm5+16
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.equ i386reg_simd_xmm7, i386reg_simd_xmm6+16
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.equ i386reg_simd_mxcsr, i386reg_simd_xmm7+16
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.equ i386reg_fpstate_size, i386reg_simd_mxcsr+4
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#else
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.equ i386reg_fpstate_size, i386reg_fpstate+108
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#endif
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.equ i386reg_edi, i386reg_fpstate_size
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#endif
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#else
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.equ i386reg_edi, 0
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# endif
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.equ i386reg_esi, i386reg_edi+4
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.equ i386reg_ebp, i386reg_esi+4
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.equ i386reg_esp, i386reg_ebp+4
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.equ i386reg_ebx, i386reg_esp+4
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.equ i386reg_edx, i386reg_ebx+4
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.equ i386reg_ecx, i386reg_edx+4
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.equ i386reg_eax, i386reg_ecx+4
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.equ i386reg_vector, i386reg_eax+4
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.equ i386reg_eip, i386reg_vector+4
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.equ i386reg_cs, i386reg_eip+4
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.equ i386reg_eflags, i386reg_cs+4
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.equ i386reg_context_size, i386reg_eflags+4
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#if defined(CYGHWR_HAL_I386_FPU) && defined(CYGHWR_HAL_I386_FPU_SWITCH_LAZY)
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.equ i386reg_fpucontext_valid, 0
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.equ i386reg_fpucontext_state, i386reg_fpucontext_valid+4
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#ifdef CYGHWR_HAL_I386_PENTIUM_SSE
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.equ i386reg_simd_xmm0, i386reg_fpucontext_state+108
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.equ i386reg_simd_xmm1, i386reg_simd_xmm0+16
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.equ i386reg_simd_xmm2, i386reg_simd_xmm1+16
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.equ i386reg_simd_xmm3, i386reg_simd_xmm2+16
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.equ i386reg_simd_xmm4, i386reg_simd_xmm3+16
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.equ i386reg_simd_xmm5, i386reg_simd_xmm4+16
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.equ i386reg_simd_xmm6, i386reg_simd_xmm5+16
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.equ i386reg_simd_xmm7, i386reg_simd_xmm6+16
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.equ i386reg_simd_mxcsr, i386reg_simd_xmm7+16
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.equ i386reg_fpucontext_size, i386reg_simd_mxcsr+4
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#else
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.equ i386reg_fpucontext_size, i386reg_fpucontext_state+108
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#endif
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#endif
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#------------------------------------------------------------------------------
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# end of i386.inc
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