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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [i386/] [pc/] [v2_0/] [src/] [plf_misc.c] - Blame information for rev 587

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//==========================================================================
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//
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//      plf_misc.c
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//
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//      HAL platform miscellaneous functions
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    nickg
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// Contributors: nickg, jlarmour, pjo
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// Date:         1999-01-21
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// Purpose:      HAL miscellaneous functions
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// Description:  This file contains miscellaneous functions provided by the
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//               HAL.
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//
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//####DESCRIPTIONEND####
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//
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//========================================================================*/
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#include <pkgconf/hal.h>
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#include <cyg/infra/cyg_type.h>         // Base types
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#include <cyg/infra/cyg_trac.h>         // tracing macros
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#include <cyg/infra/cyg_ass.h>          // assertion macros
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#include <cyg/hal/hal_arch.h>           // architectural definitions
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#include <cyg/hal/hal_intr.h>           // Interrupt handling
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#include <cyg/hal/hal_cache.h>          // Cache handling
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#include <cyg/hal/plf_misc.h>
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#include <cyg/hal/hal_io.h>
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#ifdef  CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT
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#include <cyg/hal/hal_if.h>
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#endif
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#ifdef CYGPKG_KERNEL
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#include <pkgconf/kernel.h>
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#include <cyg/kernel/ktypes.h>
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#include <cyg/kernel/kapi.h>
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#endif /* CYGPKG_KERNEL */
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/*------------------------------------------------------------------------*/
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extern void patch_dbg_syscalls(void * vector);
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extern void hal_pcmb_init(void);
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#ifdef CYGPKG_HAL_SMP_SUPPORT
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__externC void cyg_hal_smp_init(void);
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#endif
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//----------------------------------------------------------------------------
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// ISR tables
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volatile CYG_ADDRESS    hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT];
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volatile CYG_ADDRWORD   hal_interrupt_data[CYGNUM_HAL_ISR_COUNT];
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volatile CYG_ADDRESS    hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT];
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//-----------------------------------------------------------------------------
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// IDT interrupt gate initialization
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externC void cyg_hal_pc_set_idt_entry(CYG_ADDRESS routine,short *idtEntry)
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{
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   idtEntry[0]=routine & 0xFFFF;
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   idtEntry[1]=8;
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   idtEntry[2]=0x8E00;
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   idtEntry[3]=routine >> 16;
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}
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/*------------------------------------------------------------------------*/
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void hal_platform_init(void)
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{
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    int vector;
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    HAL_ICACHE_INVALIDATE_ALL();
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    HAL_ICACHE_ENABLE();
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    HAL_DCACHE_INVALIDATE_ALL();
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    HAL_DCACHE_ENABLE();
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    // Call motherboard init function
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    hal_pcmb_init();
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    // ISR table setup: plant the default ISR in all interrupt handlers
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    // and the default interrupt VSR in the equivalent VSR table slots.
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    for (vector = CYGNUM_HAL_ISR_MIN; vector <= CYGNUM_HAL_ISR_MAX; vector++)
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    {
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        cyg_uint32 index;
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        HAL_TRANSLATE_VECTOR( vector, index );
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        hal_interrupt_handlers[index] = (CYG_ADDRESS) HAL_DEFAULT_ISR;
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        HAL_VSR_SET( vector, &__default_interrupt_vsr, NULL );
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    }
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#if !defined(CYG_HAL_STARTUP_RAM)
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    for (vector = CYGNUM_HAL_EXCEPTION_MIN;
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         vector <= CYGNUM_HAL_EXCEPTION_MAX;
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         vector++)
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    {
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#if defined(CYGHWR_HAL_I386_FPU_SWITCH_LAZY)
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        // If we are doing lazy FPU switching, the FPU switch VSR has
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        // already been installed, so avoid overwriting it.
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        if( vector != CYGNUM_HAL_VECTOR_NO_DEVICE )
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#endif
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        {
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            HAL_VSR_SET( vector, &__default_exception_vsr, NULL );
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        }
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    }
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#endif
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#ifdef CYGPKG_REDBOOT
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    // Start the timer device running if we are in a RedBoot
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    // configuration. 
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    HAL_CLOCK_INITIALIZE( CYGNUM_HAL_RTC_PERIOD );
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#endif    
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    hal_if_init();
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#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) || \
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    defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)
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    {
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        void hal_ctrlc_isr_init(void);
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        hal_ctrlc_isr_init();
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    }
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#endif
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#ifdef CYGPKG_HAL_SMP_SUPPORT
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    cyg_hal_smp_init();
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#endif
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}
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/*------------------------------------------------------------------------*/
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void hal_pc_reset(void)
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{
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    /* Use Intel's IDT triple-fault trick. */
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    asm("movl $badIdt, %eax\n"
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        "lidt (%eax)\n"
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        "int $3\n"
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        "hlt\n"
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        ".align 4\n"
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        "badIdt:\n"
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        ".word          0\n"
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        ".long          0\n"
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        ) ;
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}
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/*------------------------------------------------------------------------*/
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void
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hal_delay_us(int us)
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{
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    while( us > 0 )
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    {
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        cyg_uint32 us1 = us;
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        cyg_int32 ticks;
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        cyg_uint32 cval1, cval2;
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        // Wait in bursts of 1s to avoid overflow problems with the
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        // multiply by 1000 below.
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        if( us1 > 1000000 )
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            us1 = 1000000;
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        us -= us1;
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        // The PC clock ticks at 838ns per tick. So we convert the us
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        // value we were given to clock ticks and wait for that many
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        // to pass.
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        ticks = (us1 * 1000UL) / 838UL;
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        HAL_CLOCK_READ( &cval1 );
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        // We just loop, waiting for clock ticks to happen,
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        // and subtracting them from ticks when they do.
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        while( ticks > 0 )
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        {
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            cyg_int32 diff;
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            HAL_CLOCK_READ( &cval2 );
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            diff = cval2 - cval1;
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            // Cope with counter wrap-around.
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            if( diff < 0 )
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                diff += CYGNUM_HAL_RTC_PERIOD;
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            ticks -= diff;
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            cval1 = cval2;
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        }
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    }
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}
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/*------------------------------------------------------------------------*/
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/* End of plf_misc.c                                                      */

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